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LEDeep, LLC Snapshot

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LEDeep, LLC Snapshot

z

Power-Factor Corrected Solid-State Lighting for

use in high-power LED applications, which

improves the efficiency of SSL.

z

Early stage, seeking seed funding

z

Founded 2004

z

Sole Proprietor

z

New York State Limited Liability Company

z

Patents Pending

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(3)

Why Solid-State Lighting...

$0 $500 $1,000 $1,500 $2,000 $2,500 2008 2009 2010 2011 U S $ M illio n s Illumination HDTV

(4)

Opportunity for PFC-SSL

z

High-Power LED Market Estimates

(US$MM)

− Flat Panel HD-TVs can use 5000 LEDs per TV, which is a prime

target for a PFC-IC for use with discrete LEDs.

− General Illumination applications would benefit from a full custom

PFC-SSL IC, with PFC and LEDs integrated on a single chip.

z

Technology Trends

→ Incandescent → Fluorescent

→ Compact Fluorescent

→ Solid State Lighting (“SSL”) LEDs

(5)

Challenges to Solid State Lighting

z

SSL without Direct AC (Typical)

AC to DC conversion losses of approx 7%

z

SSL with Direct AC without PFC (Competitor)

Saves approx. 7% AC-DC energy losses

Smaller lamp size – no power “brick”

Socket compatible with Incandescents/CFLs

z

SSL with Direct AC and with PFC (LEDeep)

Less noise on power line

(6)

LEDeep Technology Overview

z

Power-Factor-Corrected Solid-State Lighting

Directly power LEDs from the grid.

z Eliminates the AC to DC power conversion

z Electric utilities charge more for non-unity power factors,

and the PFC is a near unity PF usage

z Power supply monitoring allows PFC to assist the whole

circuit to have improved PF.

z Helps fix poor PF from other devices on the same utility

circuit, including Compact Fluorescent lamps, motors, compressors.

(7)

PFC correction circuit turns on the number of LEDs

that draws a near-linear current as the AC voltage varies from 0 volts to

115/230 Volts.

Pseudo-resistive load

Adding intelligent controls allows for this topology to absorb the noise from

other energy consumers to help the overall circuit have a unity power-factor.

(8)

PFC-SSL Integration Nodes

z

No Integration: Discrete PFC with Discrete LEDs

− Low NRE, high component costs, Low volume app.

z

Mixed Integration: PFC IC with Discrete LEDs

− Moderate NRE, Moderate component costs, TV app.

z

Full Integration: PFC-SSL Integrated Circuit

− Single Chip solution (3 pads on IC) − High NRE, low component cost

(9)

Potential Applications of PFC-SSL

z

Current

Power-Factor-Corrected Solid-State Lighting

z HD TV Back-lighting

− PFC-IC with discrete LEDs

z General Purpose Lighting

− Full PFC-SSL IC with integrated LEDs. z

Future

Additional applications are possible. LEDeep has

targeted some new applications which cannot be

discuss at this time without a CDA.

(10)

Development Strategy

z

Option 1: Printed Circuit Board, No Integration

6 months from $ to PFC PCB, $500K NRE

z

Option 2: Mixed Integration

1 Year from $ to PFC IC, $1MM NRE

z

Option 3: Full Integration

(11)

IP Strategy

z A divisional patent application can be filed with claims related

to PFC-SSL, and additional patent applications can be filed.

z Original US Pat App. 2007/0276455 as a base for divisional

patent application claiming PFC-SSL:

− “... A final aspect of the invention provides various

circuits that may be used to power the LEDs used in the present systems and devices. ... FIG. 15 shows a direct line voltage power supply that has a useful

near unity power factor LED transfer function which is useful to remove the need for a switching power supply utilizing resistor ladder network to creates bias for transistors. ...”

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Management

z

Peter Fiset

BS Chem. Eng., U. Michigan, Ann Arbor.

MS Comp. Sys. Eng., Rensselaer Polytechnic

Institute., Troy, NY

Previously developed solid-state storage

devices, IT infrastructure, micro-controller

applications, power supply design.

z

Additional management hired upon conversion

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Funding Sought

6 Months

− $500K for Option 1: Printed Circuit Board PFC − Contract engineer to assist

z

1 Year

− $1MM for Option 2: PFC IC, Mixed Integration − Contract IC engineer(s) for Analog IC design.

z

2 Year

− $5MM for Option 3: PFC-SSL, Full Integration

References

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