FPGA BASED IMAGE SECURITY AND
AUTHENTICATION IN DIGITAL
CAMERA USING INVISIBLE
WATERMARKING TECHNIQUE
1
A. MOHAMED ZUHAIR M.E., LECTURER, 2
C. MOHAMED YOUSUF M.E., LECTURER,
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING C.ABDUL HAKEEM COLLEGE OF ENGINEERING AND TECHNOLOGY
HAKEEM NAGAR,MELVISHARAM-632509, VELLORE,TAMILNADU,INDIA
Abstract
For effective digital rights management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. Here, we present a novel system in the form of a digital camera that embeds biometric data into an image. Incorporation of encryption and watermarking together in the digital camera will assist in protecting and authenticating image files and Watermarking the digital content with origin information or intended recipient identification secures content from electronic data theft. The invisible watermarking algorithm used here allows for verification of the image as well as the identity of the carrier. In this paper, we present an architecture and a hardware efficient FPGA based invisible watermark module towards the development of the complete digital camera.
Keywords: VLSI Architecture, Multimedia Content security, Watermarking, FPGA
1.Introduction:
In order to improve document and border security, it is proposed to include biometric data such as fingerprints, signatures, etc., in the electronic passport . The key objectives of the passport are to identify the owner, authenticate the document, and copyright the passport [1]. However, there are continuous risks of unauthorized access and modification to the data contained within the passport.
We propose that an effective solution to combating unauthorized access such as “skimming” and “eavesdropping” is the judicious use of watermarking [2] and encryption [3]. We have introduced the concept of a secure digital camera (SDC) that has both watermarking and encryption capabilities in [2]. In this paper we present a novel architecture of an invisible watermarking unit which will be integrated in our previous SDC work. We employed the use of parallelism and resource-sharing to meet the timing and area constraints.
2. Visible and Invisible Watermarking
either in spatial domain or in frequency domain. Transformation techniques [8][4] like DCT (Discrete cosine transform), FFT (Fast Fourier transform), DWT (Discrete Wavelet Transform) are used to transform the multimedia from spatial domain to frequency domain. Transformation of multimedia content involves complex process like computation in multidimensional resulting high complexity of watermark embedding algorithms. A watermark embedded in such process with stands most of the general image processing attacks. Computational watermark extraction techniques are required to extract the watermark under dispute conditions. It does not perceptually distort the original content. Use of both visible and invisible watermarks makes the content robust against attacks.
3. Architecture of the Watermarking unit
The architecture of the visible watermark algorithm will be discussed in this section. The block diagram of the architecture of the watermarking unit is shown in Fig. 2.
the 1D row DCT. The final controller for the watermarking unit controls the DCT module. The buffer stores the 1D row DCT coefficient before the column DCT is computed. The block diagram
of the DCT module is shown in Fig. 3.
4.2 Perceptual Analyzer Module
The perceptual analyzer module architecture that evaluates Eqn. 2 and Eqn. 4 is presented in Fig. 4. The perceptual analyzer is made of three sub-modules. The mean calculator is the first sub module and it is used to compute the mean of the AC-DCT coefficients. The second sub module called the variance calculator module is used to calculate the variance in the AC-DCT coefficients. The DC-DCT mean calculator is the third sub module and is used to calculate the DC mean. The cij’s represent the DCT coefficients of the host image and N is the number of 8x8 DCT blocks.
4.3 Edge Detection Module
4.4 Scaling Factor Module
This module computes the scaling factors using Eqn. 6. A Taylor series approximation is used to evaluate the equation[7]. The values obtained from the evaluation are later scaled to a specific range by the scaling module. The block diagram of the scaling factor module is shown in Fig. 6.
4.5 Insertion Module
The insertion module (Fig. 7) serves the purpose of inserting the watermark into the original image. Insertion is carried out using the values provided by the edge detection, and the scaling factor modules[5]. This module is made of two multipliers and an adder for evaluating Eqn. 5. The architecture for the insertion module is shown below.
5. Secure biometric data processing in our sdc
The passport image is watermarked with biometric data during the “enrollment process” as shown in Fig. 1. When an individual applies for a passport or ID card, our proposed SDC is used to invisibly watermark the individual’s binary biometric data into the applicant’s image captured by it[2]. The “verification process” is needed during the authentication of the individual’s identity and picture. At the checkpoint, the image is acquired by scanning the passport and the encrypted compound biometric data is extracted from the acquired image and decrypted using the original key that was earlier stored in a secure external storage, as shown Fig. 2.
6. Secure invisible watermarking algorithm
As presented in Fig. 3, the algorithm inserts a binary image as a watermark into the host image (passport photo)[3]. The watermark is inserted in the perceptually significant components so that the watermarked image is robust with respect to common attacks. After the preprocessing phase, the host image I is divided into 8 × 8 blocks and the DCT (discrete cosine transform) of each block is calculated. For the insertion phase, the DC component c00 and the three low frequency components c00, c10, and c11 are considered for insertion. The watermark (biometric image) is partitioned to the same number of blocks as the host image (passport photo) with a block size of 2×2. If the watermark’s binary value in block k is wij (k) the
insertion process is carried out as, 8i, j, and k [5], A value of 0.1 is used for _ac and 0.02 for _dc.
7. Our proposed VLSI architecture
are read from storage to the input register for their DCT coefficients to be calculated. The first DCT operation is carried as a pipelined operation. If the DCT coefficient of all the coefficients of a block is not completed, there is a transition from state S2 to state S0. Transition is made to state S3 for the second DCT operation after the completion of the 1D DCT operation on the original image pixel (I) of the block[5]. Due to the use of transpose buffer and the multiplexer, as discussed in the previous section, the input to the second DCT is done in a parallel fashion. The 2-D DCT coefficients (cij ) of the original image are obtained in state S4. The watermarking process is performed on (cij ) in state S5 and then written to RAM or displayed in state S5. If all the coefficients of the block are watermarked, a transition occurs to the initial state.
8. Implementation result and conclusion
The prototype will be implemented in VHDL and synthesized using Xilinx Vertex II technology with an xc2v500-6fg256 target device. This paper introduced the concept of a digital camera for image security and authentication[5]. The architecture and the FPGA implementation of the watermark unit were presented towards the implementation of the digital camera. We plan to implement the AES for the cryptosystem, to be incorporated with the watermark unit. We presented the architecture of an invisible watermarking unit for biometric applications that will be employed in our SDC,
9. References
[1] Saraju P. Mohanty ,O. B. Adamo, and Elias Kougianos, Electrical Engineering Technology University of North Texas, TX 76203. Vlsi Architecture of an invisible watermarking unit for a biometric based security system in a digital camera
[2] O. B. Adamo, S. P. Mohanty, E. Kougianos, M. Varanasi, and W. Cai, “VLSI Architecture and FPGA Prototyping of a Digital Camera for Image Security and Authentication,” in Proc. of the IEEE Region 5 Technology and Science Conference, 2006, pp. 154–158.
[3] N. M. Kosaraju, M. Varanasi, and S. P. Mohanty, “A High Performance VLSI Architecture for Advanced Encryption Standard(AES) Algorithm,” in Proc. of 19th IEEE International Conference on VLSI Design, 2006.
[4] Christoph Busch, Wolfgang funk, Stephen Nolthusen, (January 1999), Digital watermarking from concepts to Real time video appliocation, IEEE computer graphics and Applications, ISSN 0272-1715(visible and invisible)
[5] S. P. Mohanty, “Digital Watamerking of Images,” M.S. thesis, Department of Electrical Engineering, Indian Institute of Science, Bangalore, India, 1999.
[6] www.watermarkingworld.com
[7] Fred Mintzer, Jeffrey Lotspiech, Norishige Morimoto, (December 1997), Safeguarding Digital library contents and users, Digital library magazine. [8] P.W. Chan and Michael R Lyu (January 2002) A new scheme for robust blind digital video watermarking: approach, evaluation and experimentation, fall 2002 project.
