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COMP SCI 3SH3: Operating System Concepts; Term 2 (Winter 2006)

Test 3 March 20, 2006; Time: 50 Minutes ; 7 Questions; 100 marks

Instructor: Dr. Kamran Sartipi

Name: Student ID#:

Question 1 (Deadlock): [28 marks]

Consider five processes P0 to P4 that usefour resource types with the following snapshot at time T0. Answer the following questions:

Allocation Request Available A B CD A B CD A B CD

P0 0 1 0 2 0 2 0 0 4 0 0 3

P1 2 0 0 1 1 0 1 1

P2 1 0 1 0 0 1 0 1

P3 2 1 0 1 0 0 0 0

P4 0 0 2 1 0 0 3 1

A. In the context of deadlock detection, do the processes need to declare the number of resources they NEED to complete their work (Yes or No)? Why? [4 marks]

Answer: No. Because the information about the NEEDed resources is used in the context of deadline avoidance to determine whether the new allocation of resources to the

processes puts the system in an unsafe state or not.

In the Deadlock Detection algorithm, we do not care whether the new allocation of the resources to the processes will cause the system to enter a deadlock state. We do not prevent or avoid a deadlock state, we just detect whether the system is in deadlock state or not; if yes then we try to recover from a deadlock state.

B. In the above table, briefly explain whether the following equation among the matrices is correct or not? Allocation + Request = Maximum need [4 marks]

Answer: No. the matrix request indicates the current needs of the processes, not the maximum need.

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Answer: since the deadlock algorithms are very expensive (they cause lots of overhead on operating system), the sophisticated operating systems such as Unix rely on their accurate resource scheduling algorithms as a means to maintain a deadlock-free system. Also, periodically the system administrator performs deadlock detection and recovery to prevent potential processes to be stuck in a deadlock state for a long time.

D. At time T1 > T0 process P0 requests 3 resources of type C and process P3 requests 2 resources of type A. The operating system does not grant the resource requests before time T2 > T1. Below draw two tables that show the changes that will occur at “time T1”

and at “time T2”. [8 marks]

Allocation Request Available

T1:

A B CD A B CD A B CD P0 0 1 0 2 0 2

3

0 4 0 0 3

P1 2 0 0 1 1 0 1 1

P2 1 0 1 0 0 1 0 1

P3 2 1 0 1

2

0 0 0

P4 0 0 2 1 0 0 3 1

T2:

A B CD A B CD A B CD P0 0 1 0 2 0 2 3 0

1

0 0

0

P1

3

0 0

2

0

0 1

0

P2 1 0 1

1

0 1 0

0

P3

4

1 0 1

0

0 0 0

P4 0 0 2

2

0 0 3

0

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Available: 1 0 0 0 (P3 can terminate without any additional resource)  5 1 0 1 (P2 can terminate with 0 1 0 0 resources from Available)  6 1 1 2 (P1 can terminate with 0 0 1 0 resources from Available) 

9 1 1 4 (DEADLOCK, see below)

None of the processes P0 and P4 can terminate since the available resources 9 1 1 4 can not satisfy any of the requests from these processes. Therefore <P0, P4> are involved in a deadlock situation.

Question 2 (Deadlock prevention): [12 marks]

Deadlock prevention consists of four strategies such that each strategy breaks one of the four deadlock conditions. For each deadlock condition below explain a strategy to break that condition.

SEE Page 250 for more detailed explanations. A. Mutual exclusion condition:

Violating mutual exclusion condition:

Not required for sharable resources since they may be shared by many processes without causing a deadlock; however the mutual exclusion condition must be held for non-sharable resources. We can not do much about it.

B. Hold and wait condition

Violating hold and wait condition:

It must guarantee that whenever a process requests a resource, it does not hold any other resources. It requires that a process request all its resources and be allocated all its resources before it begins execution, or allow process to request resources only when the process has none.

C. No-preemption condition

Violating no-preemption condition:

If a process that is holding some resources requests another resource that cannot be immediately allocated to it, then all resources currently being held are released.

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D. Circular wait condition.

Violating circular wait condition:

Impose a total ordering of all resource types, e.g., tape-drive: 1, memory: 2, disk: 3, printer: 4; and then it requires that each process must request resources in an increasing order of enumeration.

Question 3 (Deadlock avoidance): [6 marks]

Answer True or False to the following statements:

A. A safe state guarantees that all the processes in the system will terminate their operations without being trapped in a deadlock. TRUE

B. An unsafe state does not mean a deadlock state will eventually happen. However, some processes should release some of their resources before the system fails to find a safe sequence of processes to allocate resources. TRUE

C. In order to apply the deadlock avoidance algorithms, the processes must declare the maximum time and space that they need to finish their computations. FALSE

D. The deadlock avoidance using the resource-allocation-graph requires that each resource type to have only one instance. TRUE

Question 4 (Memory binding): [8 marks]

Answer True or False to the following statements:

A. Compile time binding generates absolute code and requires code recompilation if a program location in memory changes. There is no need to a Memory Management Unit (MMU). TRUE

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C. Execution time binding requires a MMU mechanism. However, the execution of the program in this way is not as fast as programs with compile time binding. TRUE

D. Overlaying mechanism can be used with absolute code whereas swap-in and swap-out mechanism requires MMU hardware. TRUE

Question 5 (Paging & Associative memory): [26 marks] A. In the space below draw the block diagram of a paging hardware with Translation Lookaside Buffer (TLB) that translates the logical address from CPU to a physical memory location. The diagram should contain: CPU, logical address, physical address,

physical memory, page table, and TLB. [8 marks]

B. In a bullet form and using your diagram above, describe the steps for translating logical address to physical address using TLB. [6 marks]

1. CPU generates a logical address to access the contents of memory location. The logical address consists of two parts: page number and page displacement. 2. The page number “p” is first looked up in the TLB in order to find the

corresponding frame number “f”.

3. If page number is in TLB then a “hit” is occurred and the frame number “f” is concatenated with the page displacement to form a physical address for the physical memory.

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C. What is the main characteristic of TLB in memory management unit of an operating

system. [4 marks]

TLB is made of very fast logic and it is used to cache the recently accessed page numbers and their corresponding frame numbers that point to physical memory. TLB is used based on the property of “locality of reference” and therefore the likelihood that we find the currently accessed pages in the TLB is very high. This high likelihood along with the high speed of TLB accelerate the task of page number to frame number translation. In other words most of the translations happens in the TLB (hits) and a few translations happen in the page table (misses); on overall, these operations increase the efficiency of the Memory Management Unit (MMU).

D. If a memory reference takes 800 nanoseconds; a TLB (Translation Lookaside Buffer) reference takes 60 nanoseconds; and the hit-rate is %95, what is the effective memory reference time? How much speed-up we gained using TLB technique compared to the pure paging with no TLB? Show your calculations below. [8 marks]

EAT = Effective Access Time = ?

α

= hit-rate = 0.95

EAT with TLB = (memAccessTime + TLB_AccessTime) α +

(2 x memAccessTime + TLB_AccessTime)(1 – α)

= (800 + 60) x 0.95 + (2 x 800 + 60) x 0.05

= 280 Nonoseconds

EAT with TLB = 900 Nano seconds

Access Time using Pure paging = 2 x memAccessTime

= 2 x 800 = 1600 Nanoseconds

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Question 6 (Paging): [8 marks] Answer True or False to the following statements.

A. A paging MMU with 32-bit logical address and 32Kbytes page size requires a page table with one million table entries. FALSE

B. In a two-level page table, we break a large page table into outer and inner tables so that we use table entries for only those pages of a process that need to be in memory. TRUE

C. Inverted page table puts both the page number and its frame number into a page table entry. Therefore, we must search the table locations in order to find the logical address and its corresponding memory frame number in one of the table entries. FALSE

D. A hashed page table solution is used when the size of the logical address is very large (e.g., 64 bit address). In this mechanism, a logical address is hashed into a hash table address (using a hash function). Different addresses may be hashed into the same hash address. TRUE

Question 7 (Segmentation & Paging): [12 marks]

In one or two lines, compare segmentation and paging MMU mechanisms, based on:

A. Memory fragmentation:

Segmentation has external fragmentation, whereas paging has internal fragmentation.

B. Programmer’s point of view:

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C. Sharing different parts of a program:

Both segmentation and paging can be used to share parts of a program, however for segmentation this sharing is more meaningful.

D. Why the combination of segmentation and paging is more popular than pure segmentation or pure paging.

We can take advantage of both mechanisms. In this combination, while we keep the user’s view of the program using segmentation, we can also use the memory space very efficiently using paging mechanism.

References

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