Peripheral Highlights:
• Two Master Synchronous Serial Port (MSSP)
modules supporting 2/3/4-wire SPI™ (all 4
modes) and I
2C™ Master and Slave modes
• Two Capture/Compare/PWM (CCP) modules
• Three Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-Shutdown and Auto-Restart
• Two Enhanced Addressable USART modules:
- Supports RS-485, RS-232 and LIN 1.2
- Auto-wake-up on Start bit
- Auto-Baud Detect
• 10-bit, up to 16-channel Analog-to-Digital
Converter module (A/D)
- Auto-acquisition capability
- Conversion available during Sleep
• Dual analog comparators with input multiplexing
• High-current sink/source 25 mA/25 mA
• Four programmable external interrupts
• Four input change interrupts
External Memory Interface
(PIC18F8527/8622/8627/8722 only):
• Address capability of up to 2 Mbytes
• 8-bit or 16-bit interface
• 8, 12, 16 and 20-bit Address modes
Power-Managed Modes:
• Run: CPU on, peripherals on
• Idle: CPU off, peripherals on
• Sleep: CPU off, peripherals off
• Idle mode currents down to 15
µ
A typical
• Sleep current down to 0.2
µ
A typical
• Timer1 Oscillator: 1.8
µ
A, 32 kHz, 2V
• Watchdog Timer: 2.1
µ
A
Special Microcontroller Features:
• C compiler optimized architecture:
- Optional extended instruction set designed to
optimize re-entrant code
• 100,000 erase/write cycle Enhanced Flash
program memory typical
• 1,000,000 erase/write cycle Data EEPROM
memory typical
• Flash/Data EEPROM Retention: 100 years typical
• Self-programmable under software control
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-Supply In-Circuit Serial Programming™
(ICSP™) via two pins
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
• Fail-Safe Clock Monitor
• Two-Speed Oscillator Start-up
• nanoWatt Technology
Device
Program Memory Data Memory
I/O 10-bit A/D (ch) CCP/ ECCP (PWM) MSSP EU SA R T Co mp ara tor s T ime rs 8/ 16 -b it Exter n a l B u s Flash (bytes) # Single-Word Instructions SRAM (bytes) EEPROM (bytes) SPI™ Master I2C™ PIC18F6527 48K 24576 3936 1024 54 12 2/3 2 Y Y 2 2 2/3 N PIC18F6622 64K 32768 3936 1024 54 12 2/3 2 Y Y 2 2 2/3 N PIC18F6627 96K 49152 3936 1024 54 12 2/3 2 Y Y 2 2 2/3 N
64/80-Pin High-Performance, 1-Mbit Enhanced Flash
Microcontrollers with A/D and nanoWatt Technology
PIC18F8722 FAMILY
Pin Diagrams
Note 1: The ECCP2/P2A pin placement is determined by the CCP2MX configuration bit.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 38 37 36 35 34 33 50 49 17 18 19 20 21 22 23 24 25 26 RE2 /CS /P 2B RE3 /P3 C RE4 /P3 B RE5 /P1 C RE6 /P1 B RE7 /ECCP2 (1 )/P 2 A (1 ) RD0 /PSP0 V DD V SS RD1 /PSP1 RD2 /PSP2 RD3 /PSP3 RD4 /PSP4 /S DO 2 RD5 /PSP5 /S DI 2 /SDA2 RD6 /PSP6 /S CK2 /SCL 2 RD7 /PSP7 /SS2 RE1/WR/P2C RE0/RD/P2D RG0/ECCP3/P3A RG1/TX2/CK2 RG2/RX2/DT2 RG3/CCP4/P3D RG5/MCLR/VPP RG4/CCP5/P1D VSS VDD RF7/SS1 RF6/AN11 RF5/AN10/CVREF RF4/AN9 RF3/AN8 RF2/AN7/C1OUT RB0/INT0 RB1/INT1 RB2/INT2 RB3/INT3 RB4/KBI0 RB5/KBI1/PGM RB6/KBI2/PGC VSS RA6/OSC2/CLKO RA7/OSC1/CLKI VDD RB7/KBI3/PGD RC4/SDI1/SDA1 RC3/SCK1/SCL1 RC2/ECCP1/P1A RF 0 /A N 5 RF 1 /AN6 /C2 OUT AVDD AV SS RA3 /A N 3 /V RE F + R A 2/A N 2/ V RE F -RA1 /A N 1 RA0 /A N 0 V SS V DD RA4 /T 0 CKI R A 5/A N 4/ L V D IN RC1 /T 1 O SI /ECCP2 (1 )/P 2A (1 ) RC0 /T 1 O S O/T 13 CK I RC7/RX 1 /DT 1 R C 6 /T X 1 /C K 1 RC5/SDO1 15 16 31 40 39 27 28 29 30 32 48 47 46 45 44 43 42 41 54 53 52 51 58 57 56 55 60 59 64 63 62 61
64-Pin TQFP
PIC18F6527
PIC18F6622
PIC18F6627
PIC18F6722
Pin Diagrams (Continued)
PIC18F8527
3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 64 63 62 61 21 22 23 24 25 26 27 28 29 30 31 32 RE2 /A D 1 0 /CS /P 2B R E 3/ A D 1 1 /P 3C (2 ) R E 4 /A D 12 /P 3B (2 ) R E 5 /A D 13 /P 1C (2 ) R E 6 /A D 14 /P 1B (2 ) RE7 /A D 1 5 /ECCP2 (1 )/P 2 A (1 ) RD0 /A D0 /PSP0 V DD V SS RD1 /A D1 /PSP1 RD2 /A D2 /PSP2 RD3 /A D3 /PSP3 RD4 /A D4 /PSP4 /S DO 2 RD5 /A D5 /PSP5 /S DI 2 /SDA2 RD6 /A D6 /PSP6 /S CK2 /SCL 2 RD7 /A D7 /PSP7 /SS2 RE1/AD9/WR/P2C RE0/AD8/RD/P2D RG0/ECCP3/P3A RG1/TX2/CK2 RG2/RX2/DT2 RG3/CCP4/P3D RG5/MCLR/VPP RG4/CCP5/P1D VSS VDD RF7/SS1 RB0/INT0 RB1/INT1 RB2/INT2 RB3/INT3/ECCP2(1)/P2A(1) RB4/KBI0 RB5/KBI1/PGM RB6/KBI2/PGC VSS RA6/OSC2/CLKO RA7/OSC1/CLKI VDD RB7/KBI3/PGD RC4/SDI1/SDA1 RC3/SCK1/SCL1 RC2/ECCP1/P1A RF 0 /AN5 RF 1 /AN6 /C2 OUT AVDD AVSS RA3 /AN3 /V RE F + RA2 /AN2 /V RE F -RA1 /AN1 RA0 /AN0 V SS V DD RA4 /T 0 CKI RA5 /AN4 /L V DIN RC1 /T 1 O SI/ECCP2 (1 )/P 2A (1 ) R C 0/T 1 OS O /T1 3C K I RC7 /R X1 /DT 1 RC6 /T X 1 /CK 1 RC5/SDO1 RJ0 /AL E RJ1 /OE RH1 /A1 7 RH 0 /A 1 6 1 2 RH2/A18 RH3/A19 17 18 RH7/AN15/P1B(2) RH6/AN14/P1C(2) R H 5/A N 13 /P 3B (2 ) RH4 /AN1 2 /P3 C (2 ) RJ 5 /CE RJ 4 /BA0 37 RJ7/UB RJ6/LB 50 49 RJ2/WRL RJ3/WRH 19 20 33 34 35 36 38 58 57 56 55 54 53 52 51 60 59 68 67 66 65 72 71 70 69 74 73 78 77 76 75 79 8080-Pin TQFP
Note 1: The ECCP2/P2A pin placement is determined by the CCP2MX configuration bit and Processor mode settings.
2: P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX configuration bit. RF5/AN10/CVREF RF4/AN9 RF3/AN8 RF2/AN7/C1OUT RF6/AN11
PIC18F8622
PIC18F8627
PIC18F8722
PIC18F8722 FAMILY
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Trademarks
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their respective companies.
© 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper. intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
AMERICAS
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ASIA/PACIFIC
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