Embedded Linux RADAR device

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Embedded Linux Conference Europe 2012 (Barcelona - November 5-7)

Embedded Linux RADAR device

Taking advantage on Linaro tools and HTML5 AJAX real-time visualization

Agustí FONTQUERNI GORCHS

[email protected] www.isee.biz

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 Introduction

 Highlights

 A/D Converter access

 Optimization programming techniques

 Optimization from compilers

 HTML5 + AJAX

 Developing time / costs

 Demo

 Future

 Summary

OVERVIEW

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 hardware

 IGEPv2 board + IGEP Radar sensor

INTRODUCTION

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 hardware

 IGEPv2 board

 TI DM3730 processor

 ARM Cortex A8 core at 1GHz

Processor : ARMv7 Processor rev 2 (v7l)

 BogoMIPS : 996.74

 DSP C64x+ core at 800Mhz

 GPIO expansion J990 connector (BeagleBoard connector)

 SPI bus

 Input/output digital control lines

 5 Vcc Power

INTRODUCTION

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INTRODUCTION

 hardware

 IGEP Radar sensor

 Antenna

 RF Transmitter

 RF Receiver

 SPI DDS

 SPI A/D Converter

 PLL

 IF Filter

 I/O control lines

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 radar: (quick) FMCW Radar technology

 FMCW: Frequency Modulation Constant Wave

 Modulation from 24,0 Ghz to 24,25 Ghz (ISM K-Band)

INTRODUCTION

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 radar: (quick) FMCW Radar technology

 diff frequency = measured distance

 balance between accuracy and latency/refresh measure

INTRODUCTION

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 radar: (quick) FMCW Radar technology

 it searches for positions of peaks of FFT in IF (Intermediate Frequency) signal that is proportional to distance measures

INTRODUCTION

Person 1 Person 2

2 persons=2 signals

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 software

 Linux kernel 2.6.37

 Based on TI BSP with 2.6.37 kernel fork

 The last for OMAP3 (dead line NOT ported to mainline)

 with A LOT OF patches…

 from 2.6.37 official branch (kernel.org)

 from ISEE to support IGEP devices (git.isee.biz)

 Roofs based on Poky 7.0.0 distribution and compiled with Yocto1.2 infrastructure

 Specific radar application is developed on standard C-code

INTRODUCTION

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 hwmon infrastructure

 comedy infrastructure

 spidev infrastructure (userspace / omapspi DMA transfer )

 omapspi host driver patch (CS mode configuration)

HIGHLIGHTS: A/D Converter access

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Linux kernel module for configuration of ADC121S101 spi-device A/D converter from user-space (opposite to igep00x0-board.c file)

HIGHLIGHTS: A/D Converter access

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HIGHLIGHTS: A/D Converter access

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 Debugging time bottlenecks

 timeline marks

 gettimeofday ()

 detection of the heaviest computing functions

 Fast Fourier Transform (FFT) calculation

 Data movements

 Loops

 detection of delay device response

 acquisition time delay (A/D Converter wave data)

 network TCP request and data response transfers

HIGHLIGHTS: Optimization programming techniques

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 Paralleling processes ( acquisition / processing / output data )

HIGHLIGHTS: Optimization programming techniques

ADC Acquistion [n] (7 ms) Signal Processing

[n] (9 ms) Output data

[n] (2 ms)

ADC Acquistion [n] (7 ms)

Signal Processing [n] (9 ms)

Output data [n] (2 ms) ADC Acquistion

[n+1] (7 ms)

Signal Processing [n+1] (9 ms) ADC Acquistion

[n+2] (7 ms)

Output data [n+1] (2 ms) Signal Processing

[n+2] (9 ms) ADC Acquistion

[n+3] (7 ms)

time cycle: 18 ms time cycle: 9 ms SAVE -50% !!!

Secuencial (1 threads)

(only one thread: ARM CPU)

Parallel processes (3 threads)

(thread 1: DMA transfer / thread 2: ARM CPU / thread 3: remote network web browser)

ADC Acquistion [n+1] (7 ms)

… … … …

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 HTML5 data visualization: CGI vs ‘Reverse Proxypass‘

 The critical data path ( JSON Data for AJAX HTTP_Request)

HIGHLIGHTS: Optimization programming techniques

Web browser

(AJAX)

Web server

CGI (radar client)

Radar application

Web browser

(AJAX)

Radar application

Web server

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 GCC 4.3.3 (poky 3.3.1)

 GCC 4.6.4 (yocto 1.2 / poky 7.0.0)

 GCC 4.5 (from www.linaro.org)

 optimization GCC flags

http://www.linaro.org/linaro-blog/2011/10/25/compiler-flags-used- to-speed-up-linaro-android-2011-10-and-future-optimizations/

-march=armv7-a -mtune=cortex-a8 -mfpu=neon

-mfloat-abi=softfp

HIGHLIGHTS: Optimization from compilers

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 Comparative of compilers ( binary size + radar process time)

HIGHLIGHTS: Optimization from compilers

COMPILER BINARY SIZE EXECUTION TIME GCC 4.3.3

(poky 3.3.1) 212.0 KB 19 ms

GCC 4.6.4

(poky 7.0.0) 216.5 KB 9 ms

GCC 4.6

(www.linaro.org) 209.0 KB 9 ms

SAVE -53% !!!

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 Gnuplot ‘png image output’ (NO HTML5)

 Gnuplot ‘canvas output’

 flop (jQuery extension) – a Javascript plot library

 Canvas HTML5 + AJAX

HIGHLIGHTS: HTML5 + AJAX Visualization

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Gnuplot canvas - http://gnuplot.sourceforge.net/demo_canvas/

HIGHLIGHTS: HTML5 + AJAX Visualization

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 Flop (jQuery extension) - http://www.flotcharts.org/

HIGHLIGHTS: HTML5 + AJAX Visualization

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raw Canvas HTML5 + AJAX - http://www.w3schools.com/ajax/

- https://developer.mozilla.org/docs/Canvas_tutorial/

HIGHLIGHTS: HTML5 + AJAX Visualization

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 Directly C-code implementation from developer

 Signal processing model is reimplemented by developer

 Too much time (slow)

 Poor accuracy in comparison to model

 Knowledge about radar signal processing is needed

 Automated generation of C-code

 Signal processing model tool generates C-code

 The fastest way

 Optimization depends on synthesizers and compiler tools

No specific hardware layout for DM3730

 Poor Linux infrastructure for TI C64x+ DSP core

HIGHLIGHTS: Developing /time costs

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 IGEP v2 board (with DM3730 at 1 GHz )

 IGEP RADAR sensor

 HTML5 web browser running on Smartphone or Tablet

DEMO

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 DSP (DM3730 built-in TI C64x+ DSP core)

 FFT Processing

 ADC direct acquisition (change to McBSP interface)

 NEON coprocessor extension on ARM

 libfftw3 support

 memcpy optimizations

 Improve HTML5 web page

 functionality

 style / design

FUTURE

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 Device based on Cortex A8 at 1GHz, Linux kernel 2.6.37 and poky

 Difficulties

 Use built-in DSP core for poor software infrastructure in Linux

 Too much developing time to take advantage of specific hardware and advanced software libraries

SUMMARY (1/2)

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 Goals

 Implemented software radar signal processing (FFT,…) without expensive hardware acceleration (like traditional FPGA integrated circuits). Automated C-code generation from radar model.

 ARM architecture and a few electronic devices get an energy- efficient radar

SUMMARY (2/2)

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