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2010-2011

SAMYAK SAU

XII - A

(2)

SUBMITTED FROM

Samyak Sau

{Xii

TH

‘A’ (Sc.)}

Roll no.

P

R

OJECT GUIDE

Mr. Pankaj Pant

{SUBJECT TEACHER}

(3)

This to certify that the project

report entitled “Logic gates

&

Transformers

submitted by

Samyak sau during the academic

year 2010 – 2011 is a bonafied

piece of work conducted under my

supervision and guidance. The

data sources have been dully

acknowledged.

I wish his success in all his

future endeavours.

Mr. Pankaj Pant

(PGT Physics)

Mr. P.C Prashar

(Principal)

Supervised

by:

(4)

I take this opportunity to express my profound

sense of gratitude and respect to all those

who helped me throughout this venture.

I owe my regards to Mr. P.C Prashar,

Principal K.V No.1 (AFS) Pathankot for his

cooperation and valuable support and for

giving me the opportunity to undertake this

project work and providing the necessary

infrastructure.

I would like to express my heartfelt thanks to

my revered teacher and guide Mr. Pankaj

Pant

for his

valuable guidance,

encouragement and support throughout my

studentship under him at the institute. This

project is his visualization and owes a lot of its

functionality to him.

Last but not the least; I owe my overwhelming

gratitude to my family and friends who gave

me constant support and motivation to

continue with this endeavour.

SAMYAK SAU

XII ‘A’

(5)

S.N

o.

Contents

Page

No.

I.

Introduction

1

II.

Principle

2

III.

Basic Gates

3

IV.

OR Gate

4

V.

AND Gate

5

VI.

NOT Gate

6

VII.

NOR Gate

7

VIII.

NAND Gate

8

IX.

EX-OR Gate

9

X

EX-NOR Gate

10

XI

Transformer

Step-Down

13

XII

Transformer

Step-Up

14

XIII

Construction

15

(6)

A gate is defined as a digital circuit which follows

some logical relationship between the input and

output voltages. It is a digital circuit which either

allows a signal to pass through as stop, it is

called a gate.

The logic gates are building blocks at digital

electronics. They are used in digital electronics

to change on voltage level (input voltage) into

another (output voltage) according to some

logical statement relating them.

A logic gate may have one or more inputs, but it

has only one output. The relationship between

the possible values of input and output voltage is

expressed in the form of a table called truth

table or table of combinations.

Truth table of a Logic Gates is a table that shows

all the input and output possibilities for the logic

gate.

George Boole in 1980 invented a different kind

of algebra based on binary nature at the logic,

this algebra of logic called BOOLEAN ALGEBRA. A

logical statement can have only two values, such

(7)

CONDUCTING/NON-CONDUCTING etc. The two

values of logic statements one denoted by the

binary number 1 and 0. The binary number 1 is

used to denote the high value. The logical

statements that logic gates follow are called

Boolean expressions.

Any Boolean algebra operation can be

associated with inputs and outputs represent

LOGIC

STATES

1

0

HIGH

LOW

+v

Ov

ON

OFF

CLOS

E

OPEN

RIGH

T

WRON

G

TRUE FALSE

YES

NO

(8)

the statements of Boolean algebra. Although

these circuits may be complex, they may all

be constructed from three basic devices. We

have three different types of logic gates

.These are the AND gate, the OR gate and

the NOT gate.

(a) THE

OR GATE is a

device that combines A with B to give Y as the result.

The OR gate has two or more inputs and one output. The

logic gate of OR gate with A and B input and Y output is

shown below:

(9)

In Boolean algebra, addition symbol (+) is referred as the

OR. The Boolean expression:

A+B=Y, indicates Y equals A OR B.

(b) THE AND GATE is a device that combines A with B to give

Y as the result.

The AND gate has two or more inputs and one output.

The logic gate of AND gate with A and B input and Y

output is shown

below:

In Boolean algebra, multiplication sign (either x or.) is

referred as the AND. The Boolean expression:

A.B=Y, indicates Y equals A AND B.

(c) THE NOT GATE is a device that inverts the inputs. The

NOT is a one input and one output. The logic gate of NOT

gate with A and Y output is shown below:

In Boolean algebra, bar symbol (

_

) is referred as the NOT.

The Boolean expression:

à =Y, indicates Y equals

(10)

Aim

:

TO DESIGN AND SIMULATE THE OR GATE CIRCUIT.

Components

:

Two ideal p-n junction diode (D1 and D2).

Theory and Construction

:

An OR gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure.

Here the negative terminal of the battery is grounded and corresponds to the 0 level, and the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth.

The following interference can be easily drawn from the working of electrical circuit is:

a) If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0.

b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.

c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.

d) If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1.

Truth Table

:

Input A Input B Output Y 0 0 0 1 0 1 0 1 1 1 1 1

(11)

Aim

:

TO DESIGN AND SIMULATE THE AND GATE CIRCUIT.

Components

:

Two ideal p-n junction diode (D1 and D2), a resistance R.

Theory and Construction

:

An AND gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure. The resistance R is

connected to the positive terminal of a 5V battery permanently.

Here the negative terminal of the battery is grounded and corresponds to the 0 level, and the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth.

The following conclusions can be

easily drawn from the working of electrical circuit:

a) If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0.

b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.

c) If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence Y=0.

d) If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.

(12)

Truth Table

:

Input A Input B Output Y 0 0 0 1 0 0 0 1 0 1 1 1

(13)

Aim

:

TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT.

Components

:

An ideal n-p-n transistor.

Theory and Construction

:

A NOT gate cannot be realized by using diodes. However an electronic circuit of NOT gate can be realized by making use of a n-p-n transistor as shown in the figure.

The base B of the transistor is connected to the input A through a resistance Rb and the emitter E is earthed. The collector is connected to

5V battery. The output Y is voltage at C w.r.t. earth.

The following conclusion can be easily drawn from the working of the electrical circuit:

a) If switch A is open (i.e. A=0), the lump will glow, hence Y=1. b) If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0.

(14)

Aim

:

TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT.

Components

:

Two ideal p-n junction diode (D1 and D2), an ideal n-p-n transistor.

Theory and Construction

:

If we connect the output Y’ of OR gate to the input of a NOT gate the gate obtained is called NOR.

The output Y is voltage at C w.r.t. earth.

In Boolean expression, the NOR gate is expressed as Y=A+B, and is being read as ‘A OR B negated’. The following interference can be easily drawn from the working of electrical circuit is:

a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.

c) If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0. Input A Output Y 0 1 1 0

(15)

Truth Table

:

Input A Input B Output Y 0 0 1 1 0 0 0 1 0 1 1 0

(16)

Aim

:

TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT.

Components

:

Two ideal p-n junction diode (D1 and D2), a resistance R, an ideal

n-p-n transistor.

Theory and Construction

:

If we connect the output Y’ of AND gate to the input of a NOT gate the gate obtained is called NAND.

The output Y is voltage at C w.r.t. earth.

In Boolean expression, the NAND gate is expressed as Y=A.B, and is being read as ‘A AND B negated’. The following interference can be easily drawn from the working of electrical circuit:

a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.

c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.

d) If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.

(17)

Aim

:

TO DESIGN AND

SIMULATE THE EX OR

GATE CIRCUIT.

Components

:

Two AND gate, an OR gate, two NOT gate.

Theory and Construction

:

The operation EXOR checks for the exclusivity in the value of the two signals A and B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=1, and if both are identical, then the output Y=0. This operation is also called exclusive OR gate, designated EXOR.

In Boolean expression, the EX OR gate is expressed as

Y=A.B + A.B =

The following interference can be easily drawn from the working of electrical circuit:

a) If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0.

b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.

c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.

d) If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0. Input A Input B Output Y 0 0 1 1 0 1 0 1 1 1 1 0

(18)

Truth Table

:

Input A Input B Output Y 0 0 0 1 0 1 0 1 1 1 1 0

(19)

Aim

:

TO DESIGN AND SIMULATE THE EX NOR GATE CIRCUIT.

Components

:

Two AND gate, an OR gate, three NOT gate.

Theory and Construction

:

The operation EXNOR checks for the exclusivity in the value of the two signals A and B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=0, and if both are identical, then the output Y=1. This operation is also called exclusive NOR gate, designated EXNOR.

In Boolean expression, the EX NOR gate is expressed as

Y=A.B + A.B =

The following interference can be easily drawn from the working of electrical circuit:

a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.

c) If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0.

d) If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.

(20)

Input A Input B Output Y 0 0 1 1 0 0 0 1 0 1 1 1

(21)

The transformer is a device used for

converting a low alternating voltage to

a high alternating voltage or a high

alternating voltage into a low

alternating voltage.

(22)

It is based on the principle of mutual

induction that is if a varying current is

set-up in a circuit induced e.m.f. is

produced in the neighbouring circuit. The

varying current in a circuit produce

varying magnetic flux which induces

e.m.f. in the neighbouring circuit.

(23)

In this step-down transformer is used:

This transformer converts high voltage at alternating current

into low voltage alternating current. In step-down

transformer the number of turns in primary coil remains

large as compare to secondary coil.

(24)
(25)

In this step-up transformer is used:

This transformer converts low voltage at alternating current

into high voltage alternating current. In step-up transformer

the number of turns in secondary coil remains large as

(26)

The transformer consists of two coils. They are

insulated with each other by insulated material

and wound on a common core. For operation at

low frequency, we may have a soft iron. The soft

iron core is insulating by joining thin iron strips

coated with varnish to insulate them to reduce

energy losses by eddy currents.

(27)

The input circuit is called primary. And the output

circuit is called secondary.

(28)

Suppose, the number of turns in

the

primary coil is NP and that in the secondary coil is

NS. The resistance of the coil is assumed to be

zero. Let dq /dt be the rate of change of flux in

each turn of the primary coil. If Ep be the e.m.f.

in the primary circuit then.

EP = –NP

(1)

We suppose that there is no loss of flux between

the primary and secondary coils. Then, the

induced e.m.f. in the secondary coil will be:

ES = –NS

(2)

From equations (i) and (ii), we find:

Ns/Np = K

is called transformer ratio or turn ratio.

For step up transformer K > 1

For step down transformer K < 1

That is for step-up transformer NS > NP,

therefore ES>EP.

For the step down transformer NS < NP therefore

ES < EP.

Efficiency: The efficiency of the transformer is

(29)

If Ip and Is be the currents in the primary and

secondary circuits. For ideal transformer = 1 =

100%. Therefore

ES|IS = EP|IP

Therefore, for step up, transformer current in the

secondary is less than in the primary (IS < IP).

And in a step down transformer we have IS > IP.

In practice, the output energy of a transformer is

always less than the input energy, because

energy losses occur due to a number of reasons

as explained below.

1.

Loss of Magnetic Flux

: The coupling

between the coils is seldom perfect. So,

whole of the magnetic flux produced by the

primary coil is not linked up with the

secondary coil.

2.

3.

Iron Loss:

In actual iron cores in spite of

lamination, Eddy currents are produced. The

magnitude of eddy current may, however be

small. And a part of energy is lost as the

heat produced in the iron core.

4.

3. Copper Loss: In practice, the coils of the

transformer possess resistance. So a part of the

(30)

energy is lost due to the heat produced in the

resistance of the coil.

5.

Hysteresis Loss:

The alternating current in

the coil tapes the iron core through

complete cycle of magnetization. So Energy

is lost due to hysteresis.

6.

5. Magneto restriction: The alternating current

in the Transformer may be set its parts in to

vibrations and sound may be produced. It is

called humming. Thus, a part of energy may be

lost due to humming.

Encarta

(31)

Britannica

Encyclopaedia.

www.wikipedia.co

m.

www.answers.com

.

www.google.co.in.

(32)

Developed At: - Kendriya Vidyalaya no.1 (AFS),

Pathankot

Affiliated to

CENTRAL BOARD OF

(33)

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