EE 505
Lecture 17
Current Steering DACs
Reduced Resistance Structure
R S1 I1 I2 S2 VREF RF n XIN S3 I3 I4 S4 R 2 2 R 2 VOUT 3 R 2 R S1 I1 R 2 R 2 n XIN R S2 I2 R 2 R Sn-1 In-1 R 2 R Sn In R 2 RF VOUT VREF 2n-1 3n+1 cells cells
Is the R-2R structure smaller ?
Does the R-2R structure perform better?
What metric should be used for comparing performance?
Performance of Thermometer Coded vs Binary Coded DACs
• Thermometer-coded structures have inherently small DNL • Binary coded structures can have large DNL
• INL of both structures is comparable for same total area Conventional Wisdom:
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Low DNL and random walk nature should be apparent String DAC
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Histogram of INLkmax from 100,000 runs Appears to be Gaussian
INLkmax_mean = -2.11116e-05 INLkmax_sigma = 0.226783
String DAC
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Histogram of INL from 100,000 runs Not Gaussian
INLmean = 0.384382 INLsigma = 0.117732 String DAC
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Binary DAC
Large DNL bit INL does not appear to be much different than for string DAC
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K Example: n=10 Resistor Sigma= 14.14 Ω Binary DAC String DAC
Both structures have essentially the same area
Since mathematical form for PDF is not available, not easy to analytically calculate yield
Histogram of INL from 100,000 runs
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K Example: n=10 Resistor Sigma= 14.14 Ω Binary DAC String DAC
Both structures have essentially the same area
Current Steering DACs
Segmented Resistor Arrays
R
F 1 2V
OUT VREF Thermometer Coded Array Binary Coded Array XMSB n1 Binary to Thermometer XLSB n2• Combines two types of architectures
• Can inherit advantages of both thermometer and binary approach • Minimizes limitations of both thermometer and binary approach
Current Steering DACs
Reduced Resistance Structure
Is it better to use series unary cells to form R or parallel unary cells to form ?
n R 2 R R R R R R R LSB MSB R R R R R R R LSB MSB 2n-1 cells 2n-1 cells R R R R R LSB MSB 3 2
2
3
n
for n odd cells
n Series Parallel Split
3 7 7 5 5 31 31 13 7 127 127 29 9 511 511 61 11 2047 2047 125 13 8191 8191 253 15 32767 32767 509
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Histogram of INL from 100,000 runs
String (Unary) INLmean = 0.368441 INLsigma = 0.126133 INLkmax_mean = -.00526008 INLkmax_sigma = 0.23196 File: BinaryWeightedDACInl.m Binary DAC
• Closed-Form Analytical Formulation Available • No Closed-Form Analytical Formulation
Not Gaussian Gaussian
Comparison of Thermometer Coded and
Binary Coded DACs
String (Unary) Binary DAC
8 9 10 11 12 13 n 0.5 kMAX INL INL 8 9 10 11 12 13 n 2 kMAX INL INL 1 Histogram of INL
These plots may be useful for providing insight into performance
Comparison of Thermometer Coded and
Binary Coded DACs
AR=0.02µm RN=1K
Example: n=10 Resistor Sigma= 14.14 Ω
Histogram of INL from 100,000 runs
File: BinaryWeightedDACInl.m
Binary DAC Binary DAC
Histogram of INL from 1000 runs
Can require a large number of runs for useful information
R-2R Resistor Arrays
• Conceptually, area goes up linearly with number of bit slices • Can be used in many different ways
R
R
R
2R
2R
2R
R
n-bit R-2R Array
Array Termination
R-2R DAC
R R 2R R R R 2R 2R VREF 2R d1 d2 d3 VOUT d0 n X OUT DAC IN X By superposition: 3 4 k 4-k OUT REF 3 REF 2 REF 1 REF 0 REF 4-k REF kk=0 k=1 d d 1 1 1 1 V =V d • +V d • +V d • +V d • = V V 2 4 8 16
2
2 (4-bits shown)• Total resistance goes up linearly with number of bit slices !!
• Conventional wisdom: area goes up linearly with number of bit slices • Does conventional wisdom result in optimal designs?
Bit Slice
• No op amp required !!
R-2R DAC
R R 2R R R R 2R 2R VREF 2R d1 d2 d3 VOUT d0 n X OUT DAC IN X Limitations: (4-bits shown)• Switch impedances imbalance 2R cells • Output impedance not 0
Bit Slice
• Parasitic capacitances on all nodes must settle during all transitions
Is the output impedance code dependent?
R-2R DAC
R R 2R R R R 2R 2R VREF 2R d1 d2 d3 VOUT d0Large steps in output can occur How should area be allocated?
Bit Slice VOUT DIN VOUT DIN
R-2R Implementation
• Add resistor equal to nominal switch impedance in each unswitched cell • Impedance equal to the nominal switch impedance
• Offers some improvement, particularly if all switches are bottom-plate switches
(but for previous R-2R structure do not have all bottom-plate switches)
b2 R b2 RSWN R For Switched Cells For Unswitched Cells
R-2R Implementation
b2 R b2 b2 R b2 b2 R b2 b2 2R b2 b2 2R b2 b2 2R b2 OR• Unit cell widely used
• Switch included in cell even if not switched!
• Code dependence of switch impedance of concern (this can be addressed)
• Delays associated with turning on switches also of concern since some cells not referenced to same level as switches
R R R b1 b2 b3 2R 2R 2R R VREF b1 b2 b3 RF 1 2 VOUT I I 2 2 I 2
R-2R Current Steering DAC
n X
OUT
DAC IN
X
• INL can get large in R-2R structures • DNL can get large in R-2R structures
R R R
θ R
k-slice sub-radix array
Array Termination
Slice 1 Slice 2 Slice k
θ R θ R z R
Sub-radix Array
Typically 2.1< θ < 2.5
Termination resistor must be selected so that same attenuation is maintained Often only the first n1 MSB “slices” will be sub-radix
Effective number of bits when using sub-radix array will be less than k
It can be shown that the optimal value of z is given by the expression
3
1
1
1 4
z
1
1 4
2
This derivation is in a file named Termination of Subradix.docx
Derivation based upon assuming the three impedances R1 below must be the same
R R R
θ R
k-slice sub-radix array
Array Termination
Slice 1 Slice 2 Slice k
θ R
θ R z R
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 5 10 15 20 25 30 35 Chart Title
Output of an optimally terminated subradix DAC of 5 bits with θ=2.5 and z=1.15831
See file SubRadix DAC.xslx
3-slice sub-radix DAC
R R R b1 b2 b3 θ R VREF b1 b2 b3 RF VOUT I θ R θ R zR3-slice sub-radix array
Typically θ is slightly greater than 2
R-2R Resistor Arrays
R
b2
2R
b2
2R Area twice R Area
R Area twice 2R Area
Does it make any difference how area is allocated?
R
2R
2R Area twice R Area R Area twice 2R Area
Area Allocation for R and 2R Resistors
Series Layout Parallel Layout
Assume area in each slice if fixed RF
VOUT
RF
VOUT
Area Allocation for R and 2R Resistors
Yield is affected by both mean and standard deviation of the non-Gaussian pdf
Standard deviation of parallel layout is somewhat more (but uses less cells for n small) Area allocation between slices also affects yield
Challenges with all R-based DACs
• Switch Impedance
• Contact Resistance
• Variability
Resistor Contact Resistance Switch Impedance• Parasitic Capacitances
Another R-2R DAC
R R R b1 b2 b3 b4 R 2R 2R VSS I I I I RF 1 2 VOUTCurrent flow will change power dissipation based upon digital code Eliminates series switch resistance when switching resistors
Series resistance in current source does not affect current Must match both resistors and current sources
Current flow will pull capacitance on switch nodes to low before current sources leave saturation
Another R-2R DAC
R
R
R
b
1b
2b
3b
4R
2R
2R
V
SSI
I
I
I
R
F 1 2V
OUTb
1b
2b
3b
4Switch will pull capacitance on switch nodes to GND instead of VSS Power dissipation will not be code dependent
Current Steering DAC
I d1 I d2 I dN-1 B in a ry to T h e rm o m e te r D e co d e r ( a ll O N ) n VOUT 1 2 RF VXX k ON IOUTOUT
=k
I
I
• Switch impedance of little concern • Bottom-plate switching
• Low DNL
• Decoder impractical for large n
I
dk
Current Steering Binary DAC
I bn 2I b2 2n-1I b1 n XIN VOUT 1 2 RF VXX IOUTI
n i OUT i i=1I
=
b 2
• eliminates decoder• DNL not good for large n
• area ratio from MSB source to LSB source too large for large n (can make I only so small)
Current Steering Binary DAC
• reduces total current spread of bit cells
• reduces total number of bit cells (since cells are bundled)
• can repeat mirror current attenuator
• can change number of bits in each current attenuator stage
I bn 2I b2 2n-4I b1 n XIN VOUT 1 2 RF VXX IOUT I n i OUT i i=1 I = b 2 4I n-ch mirror 23:1 1:1 p-ch mirror b3 I 2I b5 b4 4I b6
How is performance affected by reducing the number of unary cells? Is too much area allocated to the LSB cells?
Current Steering Binary DAC
bn 2n-n1-n2-n3I VOUT 1 2 RF VXX IOUT I 2I 4I n1-bit BinaryAttenuator nAttenuator2-bit Binary n3-bit Binary
Attenuator n XIN I 2I bk+1 bk 4I n-ch mirror 23:1 1:1 p-ch mirror bk+2 VXX IOUTk 3-bit Binary Attenuator
• LSB performance not critical
Sub-Radix Current Steering DAC
I bn θ I bn-1 θ m I b1 n XIN VOUT 1 2 RF VXX IOUT m i OUT i i=1 I =I dθ m>n-1Takes smaller steps so takes more steps to cover range
Current Steering DAC
Thermometer Coded Array Binary Coded Array XMSB n1 Binary to Thermometer XLSB n2 VOUT 1 2 RF IOUT VXXCurrent Steering DAC
I d1 I d2 I dN-1 B in a ry t o T h e rm o m e te r D e c o d e r ( a ll O N ) n VOUT 1 2 RF VXX k # IOUT OUT=k I II
d
kI
d
kV
DDV
XXBottom plate switching
Is output impedance of current sources of concern? No ! Matching is important but linearity is not
Current Steering DAC
I d1 I d2 I dN-1 B in a ry t o T h e rm o m e te r D e c o d e r ( a ll O N ) n VOUT 1 2 RF VXX k # IOUT OUT=k I II
d
kI
d
k VDD VXXI
d
k CP VDD VXXParasitic capacitance will charge to VXX before current source saturates
Current Steering DAC
I d1 I d2 I dN-1 B in a ry t o T h e rm o m e te r D e c o d e r ( a ll O N ) n VOUT 1 2 RF VXX k # IOUT OUT=k I I I dkI
VDD VXXk
d
d
k
VYY M1 M2 M3 M4 Cascode Current Source (Mirror) Differential Amplifier (Analog)• Current steering instead of current switching • Power dissipation in current sources remains
constant
• Smaller gate voltages can be used to steer current • Dump current can provide differential DAC output
Current Steering DAC
I d1 I d2 I dN-1 B in a ry t o T h e rm o m e te r D e c o d e r ( a ll O N ) n VOUT 1 2 RF VXX k # IOUT OUT=k I I I dk I VDD VXX k d dk VYY M1 M2 M3 M4 I VDD VXX kd
d
k VYY M1 M2 M3 M4 CP1 CP2• Parasitic capacitances do not charge and discharge • Current steering provides inherent cascading
Current Steering DAC
I d1 I d2 I dN-1 B in a ry t o T h e rm o m e te r D e c o d e r ( a ll O N ) n VOUT 1 2 RF VXX k # IOUT OUT=k I I I VDD VXX k d dk VYY M1 M2 M3 M4 CP1 CP2I
T 2 IT ID1 ID2 Vd EB 2 V I EB 2 V IT M1 M2 ID1 ID2 V1 V2Current Steering DAC with Supply
Independent Biasing
0 d d0 IX 1 d d1 IX N 1 d dN 1 IX VDD VREF R VXX IA IBIf transistors on top row are all matched, IX=VREF/R
Provides Differential Output Currents
Thermometer coded structure (requires binary to thermometer decoder)
N 1 REF A i i 0 V I d R N=2n
Current Steering DAC with Supply
Independent Biasing
If transistors on top row are all matched, IX=VREF/R
Provides Differential Output Voltages
0 d d0 IX 1 d d1 IX N 1 d dN 1 IX VDD VREF R VXX IA IB RX RX VA VB N 1 A A REF i i 0 R V V d R N=2n
Current Current Steering DAC with
Supply Independent Biasing
0 d d0 IX 1 d d1 2IX n 1 d dn 1 2n-1IX VDD VREF R VXX IA IB W IX W 2W 2n-1 W
If transistors on top row are binary weighted
Provides Differential Output Currents
n 1 REF i A n i i 0 V d I R 2
Current Steering DAC
I d1 I d2 I dN-1 B in a ry to T h e rm o m e te r D e co d e r ( a ll O N ) n VOUT 1 2 RF VXX k ON IOUT OUT=k I I I d1 I d2 I dN-1 B in a ry to T h e rm o m e te r D e co d e r ( a ll O N ) n VXX k ON IOUT OUT=k I I VOUT RLVoltage Out Current Out
• Many current steering DACs have an output current instead of an output voltage
• Output voltage is often established by steering current to a fixed external resistor (50Ω or 100 Ω) • Most basic current steering architectures with a high output impedance can be used by simply
removing the op amp
• Whereas output impedance of current sources was not of major concern when driving a null-port, it can be of major concern for current output