• No results found

Power MOSFET FEATURES APPLICATIONS. PARAMETER SYMBOL LIMIT UNIT Drain-source voltage V DS 600 V Gate-source voltage V GS ± 30 T C = 25 C

N/A
N/A
Protected

Academic year: 2021

Share "Power MOSFET FEATURES APPLICATIONS. PARAMETER SYMBOL LIMIT UNIT Drain-source voltage V DS 600 V Gate-source voltage V GS ± 30 T C = 25 C"

Copied!
10
0
0

Loading.... (view fulltext now)

Full text

(1)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Power MOSFET

FEATURES

• Superfast body diode eliminates the need for

external diodes in ZVS applications

• Lower gate charge results in simple drive

requirements

• Enhanced dV/dt capabilities offer improved

ruggedness

• Higher gate voltage threshold offers improved noise

immunity

• Material categorization: for definitions of compliance

please see

www.vishay.com/doc?99912

APPLICATIONS

• Zero voltage switching SMPS

• Telecom and server power supplies

• Uniterruptible power supplies

• Motor control applications

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 12) b. Starting TJ = 25 °C, L = 0.91 mH, Rg = 25 Ω, IAS = 38 A, dV/dt = 13 V/ns (see fig. 14a) c. ISD≤ 38 A, dI/dt ≤ 630 A/μs, VDD≤ VDS, TJ≤ 150 °C d. 1.6 mm from case

PRODUCT SUMMARY

VDS (V) 600 RDS(on) (Ω) VGS = 10 V 0.12 Qg (Max.) (nC) 320 Qgs (nC) 85 Qgd (nC) 160 Configuration Single N-Channel MOSFET G D S Super-247 G D S

ORDERING INFORMATION

Package Super-247

Lead (Pb)-free and halogen-free SiHFPS38N60L-GE3

ABSOLUTE MAXIMUM RATINGS

(T

C

= 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-source voltage VDS 600

V

Gate-source voltage VGS ± 30

Continuous drain current VGS at 10 V

TC = 25 °C

ID

38

A

TC = 100 °C 24

Pulsed drain current a I

DM 150

Linear derating factor 4.3 W/°C

Single pulse avalanche energy b E

AS 680 mJ

Repetitive avalanche current a I

AR 38 A

Repetitive avalanche energy a E

AR 54 mJ

Maximum power dissipation TC = 25 °C PD 540 W

Peak diode recovery dV/dt c dV/dt 19 V/ns

Operating junction and storage temperature range TJ, Tstg - 55 to + 150

°C

Soldering recommendations (peak temperature) for 10 s 300 d

Mounting torque 6-32 or M3 screw 10 lbf · in

(2)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 12) b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %

c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising form 0 % to 80 % VDS Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 % to 80 % VDS

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum junction-to-ambient RthJA - 40

°C/W

Case-to-sink, flat, greased surface RthCS 0.24

-Maximum junction-to-case (drain) RthJC - 0.22

SPECIFICATIONS

(T

J

= 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 600 - - V

VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 410 - mV/°C

Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V

Gate-source leakage IGSS VGS = ± 30 V - - ± 100 nA

Zero gate voltage drain current IDSS

VDS = 600 V, VGS = 0 V - - 50 μA

VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 2.0 mA

Drain-source on-state resistance RDS(on) VGS = 10 V ID = 23 A b - 0.12 0.15 Ω

Forward transconductance gfs VDS = 50 V, ID = 23 A b 20 - - S

Dynamic

Input capacitance Ciss V

GS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5

- 7990

-pF

Output capacitance Coss - 740

-Reverse transfer capacitance Crss - 72

-Effective output capacitance Coss eff.

VGS = 0 V VDS = 0 V to 480 V c

- 350

-Effective output capacitance

(energy related) Coss eff. (ER) - 260

-Total gate charge Qg

VGS = 10 V ID = 38 A, Vsee fig. 7 and 15DS = 480 V b

- - 320

nC

Gate-source charge Qgs - - 85

Gate-drain charge Qgd - - 160

Gate resistance RG f = 1 MHz, open drain - 1.2 - Ω

Turn-on delay time td(on)

VDD = 300 V, ID = 38 A, RG = 4.3 Ω, VGS = 10 V, see fig. 11a and 11b b

- 44

-ns

Rise time tr - 130

-Turn-off delay time td(off) - 92

-Fall time tf - 69

-Drain-source body diode characteristics

Continuous source-drain diode current IS MOSFET symbol

showing the integral reverse p - n junction diode

- - 38

A Pulsed diode forward current a I

SM - - 150

Body diode voltage VSD TJ = 25 °C, IS = 38 A, VGS = 0 V b - - 1.5 V

Body diode reverse recovery time trr

TJ = 25 °C, IF = 38 A - 170 250

ns

TJ = 125 °C, dI/dt = 100 A/μs b - 420 630

Body diode reverse recovery charge Qrr

TJ = 25 °C, IF = 38 A, VGS = 0 V b - 830 1240 nC TJ = 125 °C, dI/dt = 100 A/μs b - 2600 3900

Reverse recovery time IRRM TJ = 25 °C - 9.1 14 A

Forward turn-On time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

S D

(3)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

TYPICAL CHARACTERISTICS

(25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics

Fig. 2 - Typical Output Characteristics

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 1 - Typical Output Capacitance Stored Energy vs. VDS

0.1 1 10 100 VDS, Drain-to-Source Voltage (V) 0.001 0.01 0.1 1 10 100 1000 I D , D ra in -t o -S o u rc e C u rr e n t (A ) 4.5V 20µs PULSE WIDTH Tj = 25°C VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) 0.1 1 10 100 1000 I D , D ra in -t o -S o u rc e C u rr e n t (A ) 4.5V 20µs PULSE WIDTH Tj = 150°C VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4 6 8 10 12 14 16 VGS, Gate-to-Source Voltage (V) 0.01 0.1 1 10 100 1000 I D , D ra in -t o -S o u rc e C u rr e n t (Α ) TJ = 25°C TJ = 150°C -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature (°C) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 RD S (o n ) , D ra in -t o -S o u rc e O n R e s is ta n c e (N o rm a liz e d ) ID = 38A VGS = 10V 1 10 100 1000 VDS, Drain-to-Source Voltage (V) 10 100 1000 10000 100000 C , C a p a c it a n c e (p F ) Coss Crss Ciss VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 0 100 200 300 400 500 600 700 VDS, Drain-to-Source Voltage (V) 0 5 10 15 20 25 30 35 40 45 50 E n e rg y (µ J )

(4)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Fig. 2 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Typical Source-Drain Diode Forward Voltage

Fig. 9 - Maximum Safe Operating Area

Fig. 10 - Maximum Drain Current vs. Case Temperature

Fig. 11a - Switching Time Test Circuit

Fig. 11b - Switching Time Waveforms

0 50 100 150 200 250

QG Total Gate Charge (nC) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 VG S , G a te -t o -S o u rc e V o lt a g e (V ) VDS= 480V VDS= 300V VDS= 120V ID= 38A 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD, Source-to-Drain Voltage (V) 0.10 1.00 10.00 100.00 1000.00 I SD , R e v e rs e D ra in C u rr e n t (A ) TJ = 25°C TJ = 150°C VGS = 0V 1 10 100 1000 10000 VDS, Drain-to-Source Voltage (V) 0.1 1 10 100 1000 I D , D ra in -t o -S o u rc e C u rr e n t (A ) 1msec 10msec OPERATION IN THIS AREA LIMITED BY R DS(on) 100µsec Tc = 25°C Tj = 150°C Single Pulse 25 50 75 100 125 150 TC , Case Temperature (°C) 0 5 10 15 20 25 30 35 40 I D , D ra in C u rr e n t (A ) Pulse width ≤ 1 µs Duty factor ≤ 0.1 % RD VGS RG D.U.T. 10 V + -VDS VDD VDS 90 % 10 % VGS td(on) tr td(off) tf

(5)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Fig. 10 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 13 - Threshold Voltage vs. Temperature

Fig. 14a - Maximum Avalanche Energy vs. Drain Current

Fig. 14b - Unclamped Inductive Test Circuit

Fig. 14c - Unclamped Inductive Waveforms

1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

0.0001 0.001 0.01 0.1 1 T h e rm a l R e s p o n s e ( Z th J C ) 0.20 0.10 D = 0.50 0.02 0.01 0.05 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty factor D = t / t 2. Peak T = P x Z + T 1 2 J DM thJC C P t t DM 1 2 -75 -50 -25 0 25 50 75 100 125 150 175 TJ , Temperature ( °C ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VG S (t h ) G a te th re s h o ld V o lt a g e (V ) ID = 250µA 25 50 75 100 125 150

Starting TJ , Junction Temperature (°C)

0 200 400 600 800 1000 1200 1400 EA S , S in g le P u ls e A v a la n c h e E n e rg y (m J ) ID TOP 17A 24A BOTTOM 38A R G IAS 0.01Ω tp D.U.T L VDS + - VDD Driver A 15 V 20 V IAS VDS tp

(6)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Fig. 15a - Basic Gate Charge Waveform Fig. 15b - Gate Charge Test Circuit

D.U.T. 3 mA VGS VDS IG ID 0.3 µF 0.2 µF 50 kΩ 12 V Current regulator

Current sampling resistors Same type as D.U.T.

+ -QGS QGD QG VG Charge VGS

(7)

SiHFPS38N60L

www.vishay.com

Vishay Siliconix

Fig. 16 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

P.W. Period

dI/dt Diode recovery

dV/dt

Ripple≤ 5 %

Body diode forward drop Re-applied

voltage Reverse recovery current

Body diode forward current

VGS= 10 V

a

ISD

Driver gate drive

D.U.T. lSD waveform D.U.T. VDS waveform Inductor current D = P.W. Period + -+ + +

-Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by Rg

• Driver same type as D.U.T.

• ISD controlled by duty factor “D”

• D.U.T. - device under test

D.U.T. Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance current transformer

Rg

Note

a. VGS = 5 V for logic level devices

(8)

Package Information

www.vishay.com

Vishay Siliconix

TO-274AA (High Voltage)

VERSION 1: FACILITY CODE = Y

Notes

• Dimensioning and tolerancing per ASME Y14.5M-1994

• Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outer extremes of the plastic body

• Outline conforms to JEDEC® outline to TO-274AA (1) Dimension measured at tip of lead

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.70 5.30 0.185 0.209 D1 15.50 16.10 0.610 0.634 A1 1.50 2.50 0.059 0.098 D2 0.70 1.30 0.028 0.051 A2 2.25 2.65 0.089 0.104 E 15.10 16.10 0.594 0.634 b 1.30 1.60 0.051 0.063 E1 13.30 13.90 0.524 0.547 b2 1.80 2.20 0.071 0.087 e 5.45 BSC 0.215 BSC b4 3.00 3.25 0.118 0.128 L 13.70 14.70 0.539 0.579 c (1) 0.38 0.89 0.015 0.035 L1 1.00 1.60 0.039 0.063 D 19.80 20.80 0.780 0.819 R 2.00 3.00 0.079 0.118 A1 A C A2 B E E4 D L e L1 b 0.10 (0.25)M B AM E1 D2 D1 R Detail “A” A b2 b4 Detail “A” Scale: 2:1 10° 5° Lead Tip

(9)

Package Information

www.vishay.com

Vishay Siliconix

VERSION 2: FACILITY CODE = N

Notes

• Dimensioning and tolerancing per ASME Y14.5M-1994 • Outline conforms to JEDEC® outline to TO-274AD

MILLIMETERS MILLIMETERS

DIM. MIN. MAX. DIM. MIN. MAX.

A 4.83 5.21 D1 16.25 17.65 A1 2.29 2.54 D2 0.50 0.80 A2 1.91 2.16 E 15.75 16.13 b’ 1.07 1.28 E1 13.10 14.15 b 1.07 1.33 E2 3.68 5.10 b1 1.91 2.41 E3 1.00 1.90 b2 1.91 2.16 E4 12.38 13.43 b3 2.87 3.38 e 5.44 BSC b4 2.87 3.13 N 3 c’ 0.55 0.65 L 19.81 20.32 c 0.55 0.68 L1 3.70 4.00 D 20.80 21.10 Q 5.49 6.00

ECN: E20-0538-Rev. C, 19-Oct-2020 DWG: 5975 E4 E1 E2 E3 SECTION "F-F", "G-G" AND "H-H" SCALE: NONE b, b1, b3 Plating Base metal C C’ b’, b2, b4 b3 b1 H H D1 D2 C A1 A A2 B e G G F F C b 3 x L L1 D Q E A 0.25 M B A M

(10)

Legal Disclaimer Notice

www.vishay.com

Vishay

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE

RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,

“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other

disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or

the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all

liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,

consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular

purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of

typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding

statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a

particular product with the properties described in the product specification is suitable for use in a particular application.

Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over

time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s

technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,

including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining

applications or for any other application in which the failure of the Vishay product could result in personal injury or death.

Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.

Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for

such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document

or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Figure

Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 13 - Threshold Voltage vs. Temperature
Fig. 15a - Basic Gate Charge Waveform Fig. 15b - Gate Charge Test CircuitD.U.T.3 mAVGSVDSIGID0.3 µF0.2 µF50 kΩ12 VCurrent regulator
+2

References

Related documents

karcinoma kože, ali isto tako se može primijeniti i kod početnih stadija melanoma, baš zbog svoje sposobnosti da reducira proliferaciju i invazivnost melanomskih

HTTP Channel Adapter C24 Unmarshalling Transformer Store Channel Adapter Valid Region Process Validating Message Filter Invalid JMS Channel Adapter ErrorChannel ErrorChannel

PORTUGUÉS: THE EUROPEAN LANGUAGE CERTIFICATES (telc) telc PORTUGUÊS B1 INSTITUTO CAMOES Y UNIVERSIDAD DE LISBOA CERTIFICADO INICIAL DE PORTUGUÊS LÍNGUA ESTRANGEIRA

• Cloud Discovery Days 2011 – Cloud Computing Technology Conference, with world's.. biggest cloud

The performance of an Electronic Tablet Counter was investigated to find the best combination of vibration intensity and turntable speed to achieve the minimum count time

However, despite the expansion of domestic bond markets in emerging markets, it is argued that the fact that many bonds place- ments are linked to the exchange rate, they

In this study, we have chosen to investigate further the compounds lauric and myristic acid based on gas chromatography and mass spectroscopy data obtained from

This section addresses the following questions: are learners of basic music theory willing to access their open learner model; do they explore example beliefs;