• No results found

Analysis of Evolved Mutation Rates

Self Adaptation of Mutation Rates

5.6. Analysis of Evolved Mutation Rates

The objective of optimal capacitor placement and sizing in the distribution system is to minimize the total annual cost of the system when subjected to certain operating constraints and load pattern. This minimization of the total annual cost of the system involves;

i. Minimizing the annual cost of power losses in the system.

ii. Minimizing the annual cost of capacitor bank installed in the system.

New Bussa network optimal capacitor placement and sizing cost can be modeled mathematically

based on standard mathematical equation for optimal capacitor placement and sizing;

) (

1

c fn c n M

n c n loss

p

s K P K Q K

K  

(3.42)

Where,

Ploss is the total power losses

64 Kp is the annual cost per unit of power losses (₦/KW)

c

Kn is the capacitor annual installation cost (₦/KVAR)

c

Qn is the capacitor reactive power size placed at bus „n‟.

„M‟ is the number of candidate buses selected for capacitor placement.

c

Kfn is the fixed cost for the capacitor bank at bus „n‟.

To ensure that there is optimal capacitor placement in the New Bussa distribution network model; these operating constraints were ascertained to be satisfied:

i. Busbar voltage limits: Voltage magnitude at each bus was checked to ensure that its value is maintained within the standard voltage limits as shown below;

Vmin ˂ /V/ ˂ Vmax (3.43)

In radial distribution system, Vmin = 0.9 and Vmax = 1.06.

ii. Shunt capacitors limit

total

c Q

Qmax  (3.44)

Where, Qmaxc is the largest capacitor size allowed and Qtotal is the total reactive load demand.

iii. Line power flow limit Flowm ˂ Flowmmax

(3.45) Where Flowm is the power flow in the mth-line and Flowmmax

is the maximum allowable power flow.

65 From the loss sensitivity factor calculation and optimal capacitor placement module (OCP module) in ETAP 12.6 software, nine (9) buses were determined and chosen as candidate buses for peak loading period and four (4) buses were chosen as candidate buses for off-peak loading period.

The New Bussa Distribution System optimal capacitor placement and sizing cost during peak loading period:

) (

1

c fn c n M

n c n loss

p

s K P K Q K

K  

During peak loading period, the determined and chosen candidate buses are buses 4, 5, 7, 8, 9, 10, 0012, 020, 57;

Ks = Kp Ploss + [(Kc4Qc4 + Kc5Qc5 + Kc7Qc7 + Kc8Qc8 + Kc9Qc9 + Kc10Qc10 + Kc0012Qc0012 + Kc020Qc020 + Kc57Qc57) + (Kcf4 + Kcf5 + Kcf7 + Kcf8 + Kcf9 + Kcf10 + Kcf0012 + Kcf020 + Kcf57)

(3.46)

Taking, Qcx = 300KVAR

Taking capacitor sizes from the generated values from power flow report (see Table 4.7);

Qc4 = 6 x 300KVAR = 6 x Qcx = 6 Qcx Qc5 = 1 x 300VAR = Qcx

Qc7 = 2 x 300VAR = 2 x Qcx = 2 Qcx Qc8 = 2 x 300KVAR = 2 x Qcx = 2 Qcx Qc9 = 3 x 300KVAR = 3 x Qcx = 3 Qcx

66 Qc10 = 3 x 300KVAR = 3 x Qcx = 3 Qcx

Qc0012 = 2 x 300KVAR = 2 x Qcx = 2 Qcx Qc020 = 2 x 300KVAR = 2 x Qcx = 2 Qcx Qc57 = 5 x 300KVAR = 5 x Qcx = 5 Qcx

Ks = Kp Ploss + Kc4 (6 Qcx) + Kc5 Qcx + Kc7 (2 Qcx) + Kc8 (2 Qcx) + Kc9 (3 Qcx) + Kc10 (3 Qcx) + Kc0012 (2 Qcx) + Kc020 (2 Qcx) + Kc57 (5 Qcx)+ (Kcf4 + Kcf5 + Kcf7 + Kcf8 + Kcf9 + Kcf10 + Kcf0012 + Kcf020 + Kcf57)

Ks = Kp Ploss + Qcx[(6 Kc4) + (Kc5) + (2 Kc7) + (2 Kc8) + (3 Kc9) + (3 Kc10) + (2 Kc0012) + (2 Kc020) + (5 Kc57) + (Kcf4 + Kcf5 + Kcf7 + Kcf8 + Kcf9 + Kcf10 + Kcf0012 + Kcf020

+ Kcf57)] (3.47)

Ks = Kp Ploss + 300[(6 Kc4) + (Kc5) + (2 Kc7) + (2 Kc8) + (3 Kc9) + (3 Kc10) + (2 Kc0012) + (2 Kc020) + (5 Kc57) + (Kcf4 + Kcf5 + Kcf7 + Kcf8 + Kcf9 + Kcf10 + Kcf0012 + Kcf020

+ Kcf57)]

The following constant values when determined assist in calculating the cost of the system optimal capacitor placement and sizing:

Kc4 is the annual installation cost of capacitor bank on bus 4 Kc5 is the annual installation cost of capacitor bank on bus 5 Kc7 is the annual installation cost of capacitor bank on bus 7 Kc8 is the annual installation cost of capacitor bank on bus 8 Kc9 is the annual installation cost of capacitor bank on bus 9

67 Kc10 is the annual installation cost of capacitor bank on bus 10

Kc0012 is the annual installation cost of capacitor bank on bus 0012 Kc020 is the annual installation cost of capacitor bank on bus 020 Kc57 is the annual installation cost of capacitor bank on bus 57 Kcf4 is the actual cost of capacitor bank installed on bus 4.

Kcf5 is the actual cost of capacitor bank installed on bus 5.

Kcf7 is the actual cost of capacitor bank installed on bus 7.

Kcf8 is the actual cost of capacitor bank installed on bus 8.

Kcf9 is the actual cost of capacitor bank installed on bus 9.

Kcf10 is the actual cost of capacitor bank installed on bus 10.

Kcf0012 is the actual cost of capacitor bank installed on bus 0012.

Kcf020 is the actual cost of capacitor bank installed on bus 020.

Kcf57 is the actual cost of capacitor bank installed on bus 57.

Kp is the cost of power loss.

Ploss is the total power loss.

Ks = KpPloss + 300[(6 Kc4) + (Kc5) + (2 Kc7) + (2 Kc8) + (3 Kc9) + (3 Kc10) + (2 Kc0012) + (2 Kc020) + (5 Kc57) + (Kcf4 + Kcf5 + Kcf7 + Kcf8 + Kcf9 + Kcf10 + Kcf0012 + Kcf020

+ Kcf57)] (3.48)

68 3.6 Microcontroller-based Switching System

The switching of the compensators (capacitor banks) was developed to be an automated switching system so as to avoid over-compensation of the distribution line by the capacitor when compensation is not needed especially during the off-peak loading period of the network. This entails the need for a microcontroller-based switching system to switch on the capacitor banks only when they are needed to compensate the voltage on the distribution line.

Figure 3.12: Block diagram of Microcontroller-based switching system

The Microcontroller-based switching system consists of:

i. Power supply unit

ii. Main controller unit (ATmega328P microcontroller) iii. Voltage monitoring units that comprises of:

 Main voltage sensor

 Phase voltage sensors.

PHASE VOLTAGE

SOURCE

MAIN CONTROLLER

UNIT POWER SUPPLY UNIT

RELAY / CAPACITOR BANK 1

RELAY / CAPACITOR BANK 2

RELAY / CAPACITOR BANK 3

RELAY / CAPACITOR BANK “N”

PHASE VOLTAGE

SENSOR MAIN VOLTAGE

SENSOR

-

-

- -

69 For simplicity, 3-phase voltages supplied to consumers were monitored by voltage monitoring units in the research work.

From the block diagram, the phase voltage sensors monitoring the voltage values of each of the three phases continuously samples the phase voltages and sends analog signals proportional to the phase voltage values to main controller unit through its inbuilt analog-to-digital converter (ADC) input ports. The main controller unit compares the individual phase voltage from the three phases with a reference voltage value so as to determine when to switch on the capacitor banks for voltage compensation. The microcontroller must first confirm the presence of real phase voltage through the analog signal it received from the main voltage sensor which signifies that the transformer is active/energized (transforming from high to low voltage) before considering switching for compensation process.

Again, as the voltage value increases due to the compensation action of the capacitor or during the off-peak period, and goes above the standard acceptable limit, the main controller unit switches off the capacitor banks in turn to prevent the capacitor banks from over-compensating the distribution line thus leading to over-voltage supply that will cause damage to power consumers‟ appliances.