BYTE ( 8 bits ) 2 INT (16 bits )

3. REAL (32 bits )

Note that the BOOL type of the BSL is not explicitly

defined at this level. Boolean variables can more simply be represented as a byte value, which can only have the value

0, FALSE, or 1, TRUE. This method of handling Boolean variables is performed automatically by the BSL compiler. A special set of macro operations facilitate the changing of a value from one variable type to another. These are required in most applications which apply mathematical functions to input values in order to derive the output value required. The operations, referred to as the

Re-typing operations, are defined as:-

BTI opl, op2 byte (op2) to integer (opl) ITR opl, op2 integer (op2) to real (opl) ITB opl, op2 integer (op2) to byte (opl) RTI opl, op2 real (op2) to integer (opl) 4.2.2.3 Operations

Macro operations have either one or two operands, with the exception of the INDEX operation, which has three. All of the two-operand instructions require that both operands must be of the same type. Some operations can manipulate operands of any of the three defined types, whereas others are restricted to a subset of these. Distinct opcodes for each individual operation are formed by prefixing an R, I, or B to the operation name to indicate the data type which is expected. For example, the general form of the ADD

operation is :-

This indicates that the value of operand2 is to be added to the value of operandl, leaving the result in operandl, and the value of operand2 unaltered. As the ADD operation can accept operands of any type, there are three ADD macro

operations defined in the language; R-ADD, I-ADD and B-ADD. In the description of the operations which follows, only the general form is shown. The actual data types which each operation may accept are indicated in brackets following the general form.

The data manipulation operations can be divided into five categories;- 1. Assignment 2. Input-Output 3. Arithmetic 4. Logical 5. Index

There are only two operations in the assignment category. These are :-

ASSIGN operand, constant (R,I,B) COPY operandl, operand2 (R,I,B)

These define the load and store functions which are found in microprocessor instruction sets. COPY is a

general-purpose operation which can be used in any circumstance. ASSIGN is a special case of the COPY

operation, and is only used when operand2 is a constant. Due to this particular characteristic, it is possible to implement ASSIGN more efficiently than COPY by using the immediate addressing mode of most microprocessors. The main use of ASSIGN is to initialise variables before they are used in calculations.

Input and output operations are defined simply as:- INPUT channel, operand (B)

The implementation of the 1-0 instructions varies greatly between microprocessors. Processors such as the Intel 8080 have special instructions to achieve I-O, whereas others, such as the Motorola 6800, use a memory-mapped 1-0

mechanism. Therefore, logical channel names are used in the

1-0 instructions at this level, leaving their eventual

implementation, as ports or memory addresses, to be decided when the processor and system configuration are known.

The arithmetic operations encompass all the fundamental mathematical functions required to implement the BSL. Most of the operations exist in some form in microprocessor instructions sets. The arithmetic operations are:-

ADD opl, op2 (R,I,B) — add

SUB opl, op 2 (R,I,B) — subtract MUL opl, op2 (R,I,B) — multiply DIV opl, op 2 (R,I,B) — divide REM opl, op2 (I / B) — remainder

INC opl (I,B) — increment

DEC opl (I/B) — decrement

INC and DEC are special cases of the ADD and SUB operations. Their inclusion enables a more efficient

implementation of common occurrences such as loop counters and array indexing.

The logical operations provide bit-manipulation facilities to implement the logical functions of the BSL. The

equivalent of these operations can be found in any microprocessor. They can therefore be implemented

efficiently, with the minimum of effort. The operations are: -

AND opl, op2 (I,B) — logical and OR opl, op2 (I/B) — logical or

NOT opl (I/B) — Is complement

NEG opl (I/B) — 2s complement

XOR opl, op2 (I/B) — exclusive or

SLL opl (I,B) — shift left

SRL opl (I,B) — shift right

Finally an operation to access one-dimensional arrays has been defined. Given the base address of the array and the

position of the element required, the operation extracts the value from the array and stores it in a temporary variable. The format of the operation is:-

INDEX base, position, variable (R,I,B) So, for example, in the operation

INDEX table, 3, tempi

where table is an integer array, the third element of the array would be stored in the variable tempi. Note that the position of the element in the array is expressed in

logical units, not a byte offset. It is the task of the implementation to calculate the exact position of the data in the array. Thus, in the above example, although the third element of the table is specified in the INDEX operation, the value of this element actually resides in bytes five and six of the array. This is illustrated in Figure 4.2.

It is worth noting that in the definition of the macro operations, no mention is made of the effects of each operation on the condition codes which are present in

microprocessors. The most important use of condition codes is when a program performs a test or comparison, and then inspects the appropriate condition code bit to decide whether to execute a jump instruction. This is the technique used to program repetition and selection

constructs in machine code. However, low-level test and jump operations are not included in the

processor-independent language. Rather, repetition and selection constructs are specified at a much higher level. This has the advantage of allowing the details of the

condition code manipulation to be hidden in the implementation of the abstract control structures. 4.3. Compiling the BSL into Macro-Assembly Language 4.3.1 Overview

Figure 4.3 shows the macro-assembler code which results from compiling the specification in Figure 3.2. In this

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