Comparison with Viterbi Decoding

The M FD A embodies features of feedback and Viterbi decoding. In particular, the M FD A employs the path elimination techniques of the VA and the “decision-feedback” feature of feedback decoding. The two algorithms are com pared here on the basis of their performance, decoding speed, and implementation complexity.

3 .6 .2 .1 Performance: The M FDA can be regarded as a variant of the VA since it employs the VA principle (i.e., the ACS operations encountered in the VA). More specifically, the M FDA can be viewed as equivalent to a truncated metric and path memory realisation of the VA. Although conventional realisations of the VA truncated the path memory to a depth of about 5 K the metric memory is not usually truncated. However, it has been shown [12] that the effects of finite metric m emory on the performance of a Viterbi decoder are negligible with metric memory truncation at a depth of about 5 K . This idea is also exploited in the sliding block Viterbi decoder (SBVD) approach reported recently in [75]. In the SBVD scheme, the received sequence is decom posed into overlapping sliding blocks of depth lOA^, and for each sliding block, the VA is used to find the optimum path through a given trellis of the same length. In particular, the first 5 K trellis levels in the SB VD scheme are used for block synchronisation because the starting state for each trellis is unknown^, and the remaining levels form the decoding depth. Thus, upon reaching the final level of a finite length trellis, the best survivor is traced back for 5 K to decode the information bits corresponding to that level and so path memory is required. The performance of the S B V D asymptotically approaches that of truncated Viterbi decoding.

Q, 10 uncoiled - - V A ( W = 3 2 ) M F D A ( W = 5 K ) 10" - 4 10 5 10 .1 4 5 6 7 8 9 10 10 u ncoded - - V A ( W = 3 2 ) M F D A ( W = 5 K ) -4 10 ■5 10" 3 4 6 7 8 10 (ilB) E,JN„ (clB )

Figure 3.15 Comparison of the performance of the MFDA and the truncated VA on the BSC with BPSK modulation; (a) code 1, (b) code 2.

In Fig. 3.15 the performance of the M FD A {W = 5 K ) and the truncated path memory VA (VF = 3 2 ) obtained from [48] are compared for the two codes considered (the decoding

Note that with the MFDA the starting state of each modified tree is known.

depths are not the same). From these curves it is observed that the loss in CG when the M FDA is employed is negligible compared to the truncated Viterbi decoder. In particular,

at Pj^ - 10“'’ the CG loss for the code 1 is only 0.075dB and for code 2 is about 0.15dB.

Thus, the performance of the M FD A asymptotically approaches that of truncated Viterbi decoding.

3.Ô.2.2 Decoding speed: By using a state-parallel implementation a Viterbi decoder can

theoretically decode information bits at the rate at which an ACS operation can be performed. This makes Viterbi decoding very attractive for high-speed applications such as satellite communications. On the other hand, in order for a M FD to make a decoding decision (again assuming a state-parallel implementation), (W - K ) sequential steps are required. This decoding delay encountered with the M FDA results in a loss in decoding speed compared to Viterbi decoding. One solution to improving the decoding speed of the M FDA is to increase the parallel and reduce the sequential steps involved in each decoding cycle. This trades hardware complexity against decoding speed because the number of nodes in the modified tree doubles tor each unit decrease in the num ber of sequential steps. A less hardware intensive solution is to use the A^-step trellis technique [46] shown in Fig. 3.16 that combines N transitions of the original trellis. When this technique is adopted in the M FDA the number of sequential steps would be computed N

times faster, in turn, this would result in an increase in the decoding speed by a factor of

N. Note that with this technique the number of nodes in the modified tree remains constant irrespective of the decrease in the number of sequential steps. However, the number of transitions entering and leaving each node increases exponentially ( 2 ^ ) as N

increases linearly, and hence in practice a value of N < 4 should probably be used.

time time 1+2 l +\ t 00 00 t +2

I-step trellis 2-step trellis

states

■ S q = 0 0

Q 5, = 1 0 E3 62= 01 □ 63 = 11

3.6.2.3 Implementation complexity: As mentioned in Section 3.2 a practical Viterbi decoder requires two types of memory. One is the metric memory that stores the metrics of the survivors and the other is the digital path memory (SSM block) that stores the history of the survivor paths in order to enable trace back of the most-likely path at each time instant. Although the realisation of the metric memory is fairly simple (either an analogue or a digital implementation can be adopted), the realisation of the path memory is quite complicated mainly because of the operations that it executes. Generally speaking, the SSM block accounts for a large part of the circuit complexity of a Viterbi decoder and hence its realisation is expensive in terms of die area (typically about 50% of the total [76]) and power consumption. On the other hand, for the implementation of the M FDA only a metric memory is required since there is no trace back in the decoding process. As a result, the M FDA lends itself especially well to an analogue implementation for small size and low-power dissipation. Such a decoder would be particularly desirable in applications where the data rate and power requirements are incompatible with the use of a DSP and an ASIC is required. Thus, the M FDA offers a better trade-off between speed, complexity and power dissipation for low to moderate data rate (up to about 5 Mbit/s) applications of the type described in Section 2.4.

3.7

Considerations for the Implementation of the MFDA

The general block diagram of a M FD is shown in Fig. 3.17. It is com posed of the symbol storage (SS) block, the BMC block, the ACS block, and the W TA network. The decoder is also provided with a symbol-timing clock so that it can distinguish between separate symbols. Only the blocks that are significantly different from those employed in a Viterbi decoder are discussed.

A C S -l o o p

SS

BMC ACS WTA

Figure 3.17 Block diagram of a MFD.