COMPRESSION IN WSN

2.4 COMPRESSION IN WSN

Large amount of image data are produced by the visual sensor nodes and the captured information are then transmitted to the base station. However, transmitting these image data would increase the power usage in data transmission. Hence this would reduce the operating lifespan of the visual sensor nodes and interruption of image surveillances from that particular area. Therefore, many research were initiated to compress the image data before transmitting in the resource constrained WSNs such that to reduce the amount of energy used in data transmission. In this Section 2.3, the existing research works on the compression scheme for use in WSNs were reviewed.

2.4.1 S-LZW Compression for Energy-Constrained WSNs

A modified Lempel-Ziv-Welch (LZW) [60] lossless compression algorithm for Sensor Nodes (S-LZW) was presented to reduce energy consumption of sensor nodes [12]. The proposed S-LZW compresses data with the use of a dictionary of 512 entries which requires 2,618Bytes of RAM and 1,264Bytes of ROM. Besides, the author also proposed a 32-entry mini-cache version of S-LZW (S-LZW-MC32) that requires 2,687Bytes of RAM and 1,566Bytes of ROM. The propose S-LZW compression algorithm is used to compress strings of data in 1-dimensional rather than consider it as image data in 2-dimensional [12].

2.4.2 Lapped Biorthognal Transform for WSNs

In [61], a distributed Lapped Biorthogonal Transform (LBT) based image compression is introduced for WSN. First, the image is captured by the camera node which later send a message to cluster head through its neighbour S. The Cluster head selects the idle nodes (above a threshold energy level) within the cluster and requests the camera node to send the image data. Then neighbour S perform LBT processing on 8 rows of image data received from camera node. After LBT pre-processing, neighbour S sends these processed image data to idle node P. Finally, node P sends the processed compressed image data to the Cluster head.

The performance of proposed scheme is evaluated by using MATLAB [61].

The proposed approach does overcome the computation and energy limitation of

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individual nodes, by sharing the processing tasks among the nodes in the cluster [61].

However, the high frequency of transmitting and receiving data among the nodes may reduce the lifespan of the nodes since RF transceiver module is the device with largest energy consumption [62] [63].

2.4.3 SPHIT MIPS Processor for WVSNs

The Set Partitioning In Hierarchical Trees (SPIHT) encoder can be developed using a Microprocessor without Interlocked Pipeline Stages (MIPS) processor that has a very low memory wavelet compression architecture using strip-based processing introduced in [64] [65]. The process of SPIHT image compression consists of a few separate modules. Figure 9 illustrates the first few lines of the image which are loaded into the Discrete Wavelet Transform (DWT) module to perform wavelet transform onto the image data. Then the computed wavelet coefficients are stored into a strip-buffer that will be used for SPIHT encoding in the later part. Once the image is fully encoded by the SPIHT encoder, the bit-stream generated will be output and then can be transmitted across the communication channel.

Figure 9 Block diagram of strip-based compression [64].

Before the image data is passed through the SPIHT encoder module, a four-scale DWT decomposition is applied onto an image of size pixels [64] [65]. Figure 10 illustrates the DWT_Module used in applying the DWT decomposition onto the input images. Initially, the image data are read into the DWT_Module in a row-by-row order from the external memory. After which the row filtering is performed on the image row and the coefficients are stored into a temporary buffer (Temp_Buffer).

With these four lines of row-filtered coefficients available, the column filtering is then carried out onto the row filtered coefficients. Finally, these DWT coefficients HH, HL, LH and LL are stored into the STRIP_BUFFER [64] [65]. For a particular N-scale of DWT decomposition, the LL coefficients generated from N1 stage will then be loaded back to the Temp_Buffer from STRIP_BUFFER. Then a further N-scale of

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DWT decomposition is performed onto these LL coefficients. As the produced wavelet coefficients are arranged in a pyramidal structure in the STRIP_BUFFER, the SPIHT_ZTR coding is implemented using a one-pass upward scanning and a one/multipass downward scanning methodology [64] [65]. Figure 11 illustrates the architecture of the SPIHT encoder implemented in the SPIHT MIPS processor. The strip-based SPIHT-ZTR architecture is implemented using a soft-core microprocessor based approach, where a customized MIPS processor architecture is adopted. The actual implementation is onto a Xilinx Spartan-3L 3S1500L FPGA and it requires a total of 2,366 slices (1,272 flip-flops and 3,416 LUTs) [65].

Figure 10 DWT_Module architecture [65].

Figure 11 SPIHT_Encoder architecture [65].

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2.4.4 JPEG FPGA-Based Wireless Vision Sensor Node

A prototype of the vision sensor node is developed, which consists of CMOS image sensor, Field-Programmable Gate Array (FPGA), Nios II soft-core microprocessors and nRF24L01 transceiver [66]. The vision sensor node adopts Joint Photographic Experts Group (JPEG) Baseline system for image compression using the Altera EP2C35 FPGA development platform. Then the Nios II microprocessor controls the nRF24L01 transceiver to transmit the compressed image data to the base-station (sink). For the developed JPEG system, the system requires 7,173 Logic Elements (LEs) as mentioned in [66].

2.4.5 Low Power Wavelet Transform for WSNs

In [67], the authors proposed to use the fractional wavelet for WSNs. As mentioned in the tutorial, a sensor node was built using a 16-bit Microchip dsPIC30F45013 digital signal microcontroller with 2 kB of RAM. Besides, a C328-7640 camera module with Universal Asynchronous Receiver/Transmitter (UART) was also integrated. Study made on the proposed system by having the sensor node to capture 8 frames of 256 x 256 pixels of images. Then performs a six-level fractional wavelet transform that involves the 16-bit integer arithmetic. The study concluded that fractional wavelet transform for integer arithmetic requires half of the time needed for the floating point case [67].

2.4.6 DWT Selective Retransmission for Wireless Image Sensor Networks At the sensor node, Discrete Wavelet Transform (DWT) decomposes the captured still image data into subbands of DWT coefficients. These produced DWT coefficients have different relevancies in reconstruction of original image [68]. By knowing the different priority level of DWT coefficients, a DWT-based selective retransmission mechanism is proposed for Wireless Image Sensor Networks (WISNs). Depending on the application requirement, reliable transmission is only assured for the most relevant data, with providing retransmission of corrupted data; while the low relevant data are not retransmitted, if they are corrupted during transmission. Hop-by-hop retransmission of corrupted compressed image data is performed rather than end-to-end approaches to increase energy saving on nodes. For the purposed mechanism,

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comprehensive energy consumption models were designed and extensive mathematical verifications were performed [68]. However, this approach of retransmission may reduces the lifespan of these intermediate nodes (between end nodes and sink) since they consume more energy for retransmission of image data in noisy communication channel [62].

2.4.7 CL-DCT for Wireless Camera Sensor Networks

In [25], the Cordic Loeffler Discrete Cosine Transform (CL-DCT) compression processor was introduced and implemented onto FPGA. The CL-DCT processor was designed to perform compression on captured image data for the WVSNs. The CL-DCT processor was implemented onto the Xilinx Spartan-3 XC3S200 FPGA, which requires a total of 2,385 Logic Cells (1,060 Slices). However, the authors did not consider the external SRAM memory used by the proposed CL-DCT processor as part of the hardware implementation [25].

2.4.8 Summary

From the existing compression techniques, a huge amount of hardware utilisations were required for implementing the image compression schemes in the WSNs. The reason is that these existing image compression techniques required complex algorithm/architecture in order to perform image compression. The Lifting Scheme DWT image compression was used in this research because this method is much simpler compared to other compression. With simple compression techniques, the reuse of hardware (MISC architecture) to encode the compressed image data was made possible. This would lead to improved efficiency and less hardware usage [21].

Besides, there is a reduction in the amount of image data required to be transmitted across the WVSNs. Longer operating lifespan of the sensor node could be achieved when lower data transmission energy is required for sending these reduced amount of image data. Therefore, this research was performed in order to develop an image compression processing framework for use in the resource constrained WVSNs.

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