In this thesis, a collection of papers have been presented that demonstrate ways of optimising the performance of dataflow based visualisation, analysis and simulation software in the HPC community. The contributions of this work are:
• The demonstration of information (or meta-data) flow within a pipeline based visualisation framework, to solve the problem of handling large time-dependent datasets and the implementation of filters to enable visualisation of flows that were not previously possible, produce comparative views of data and arbitrary manipulations of time within the VTK/ParaView software environment.
• To provide an interface between information flow and a high-quality mesh partitioning library, that can be used to improve load balancing of parallel pipelines in the VTK/ParaView environment.
• To combine the load balancing mechanism with the rendering engine so that high depth complexity meshes can be rendered with full transparency in par- allel without duplicating the geometry on every node.
• To also provide a mechanism to generate ghost cells for parallel distributed algorithms using the load balancing pipeline and leveraging the information flow techniques.
• To show how to loosely couple a traditional visualisation pipeline with a live simulation using in-memory files that can be implemented without changes to the simulation software and can additionally be used to steer the software interactively if the simulation is modified accordingly.
• To improve the speed of data transmission and remote function invocation in a distributed dataflow based runtime using RMA and a novel serialization strategy to minimize data duplication and movement.
The developments and contributions to ParaView that have been described are used by researchers and engineers on a daily basis around the world and the improvements made to the HPX library will accelerate the adoption of distributed asynchronous task based runtimes that are seen by many as the future programming model for extreme scale systems. The common theme running through all these developments is the quest for efficient low overhead transfers of data and execution of filters/algorithms between modular components of a software system. Additionally, the foundations have been laid for a next generation analysis framework that will integrate tightly with simulation, allow for dynamic load balancing and scheduling to maximize performance and minimize resource usage.
Chapter 2
Time Dependent Processing in
a Parallel Pipeline Architecture
The following paper
Time Dependent Processing in a Parallel Pipeline Architecture
Published in
IEEE Transactions on Visualization and Computer Graphics Volume 13 Issue 6, November 2007
c
IEEE. Reprinted, with permission and with the authors’ consent.
Chapter 3
Parallel Computational Steering
for HPC Applications using
HDF5 Files in Distributed
Shared Memory
The following paper
Parallel Computational Steering for HPC Applications using HDF5 Files in Distributed Shared Memory
Published in
IEEE Transactions on Visualization and Computer Graphics Volume: 18, Issue: 6, June 2012
c
IEEE. Reprinted, with permission and with the authors’ consent.
Chapter 4
Practical parallel rendering of
detailed neuron simulations
The following paper
Practical parallel rendering of detailed neuron simulations
Published in the proceedings of the
Eurographics Symposium on Parallel Graphics and Visualization 2013
c
Eurographics Association 2013
Reproduced by kind permission of the Eurographics Association and with the authors’ consent.
Chapter 5
High-Performance Mesh
Partitioning and Ghost Cell
Generation for Visualization
Software
The following paper
High-Performance Mesh Partitioning and Ghost Cell Generation for Visualization Software
Published in the proceedings of the
Eurographics Symposium on Parallel Graphics and Visualization 2016
c
Eurographics Association 2016
Reproduced by kind permission of the Eurographics Association and with the authors’ consent.
Chapter 6
Zero Copy Serialization using
RMA in the Distributed
Task-Based HPX Runtime
The following paper
Zero Copy Serialization using RMA in the Distributed Task-Based HPX Runtime
Published in the proceedings of the
14th International Conference on Applied Computing 2017
c
IADIS – International Association for Development of the Information Society Reprinted with permission of IADIS
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