Distributed Stochastic Models

In a distributed neuron model, the processing is distributed over all the processing elements in the neuron. Designing each processing element needs to follow the behaviour of the biological counterparts at a micro level. For example, processing elements in the dendrite need to act like ion channels on the cell membrane. This is obviously not a feasible approach at the current time as the current technology cannot provide the number of processing elements needed for such one-to-one mapping of the structural units.

We are bound to scale down the number of processing elements.

When the number of processing elements is reduced, it is not clear what behaviour to expect from each element. We have to reverse engineer the behaviour of each element from the known behaviour of the biological neuron in a way that when they work together they show the same collective behaviour. Bio-plausible parametric models of the neurons such as Hodgkin-Huxley [158] and Izhikevich [168] are presented as a system of differential equations. The challenge is to design processing elements to capture these differential equations.

Although originated from another context, studies in the distributed protocols [135, 274, 136] pro- vide us with an effective tool for translating these equations into stochastic Finite State Machines (FSM) that communicate with each other and generate the desired collective behaviour.

Following the guidelines from [135, 274, 136], and based on the general architecture of the neuron model in figure 4.1 we can explore the design challenges of a neuron model. Bio-plausible neuron models use at least a two-dimensional system of equations that govern the behaviour of the rapid and slow dynamics in the neuron. The rapid dynamics are governed by a quadratic differential equation while the slow dynamics are captured by a first degree differential equation (see equations 2.10). At this stage we can focus on a simpler one-dimensional differential equation ( based on a quadratic neuron model - equation 2.9) to investigate the design challenges. Considering a quadratic differential equation of the general form:

˙u = a(u − vr)(u − vt) (4.1)

where u denotes the membrane potential, a is a constant capturing the membrane decay constant, vrand

vtare constant resting and threshold voltages of the neuron respectively. In [135, 274, 136] Gupta and

Nagda presented a procedural method that starts with a set of differential equations and arrives at a set of condition-action rules for a distributed system of interconnected nodes that behave according to those differential equations. Following the guidelines in [135, 274, 136] yields processing elements with a binary state variable (S = {0, 1}) and following actions:

1. An element in state 1 performs the following with probability PA= p · a(p is a scaling factor): it

randomly samples another processing element from the system and if it is also in state 1 it senda a token to a randomly selected processing element.

2. An element in state 1 will go to state 0 with probability PB = p · a(vr+ vt− vrvt).

3. An element in state 0 goes to state 1 with probability PC= p · a · vr· vt.

4. An element in state 0 that receives a token goes to state 1.

5. An element in state 1 that receives a token stays in state 1 and resends the token to another ran- domly selected process.

The above distributed protocol assumes a network that allows communication of each element with any other randomly selected processing element. To emulate such communication network in the gen-

eral architecture of figure 4.1 we can randomly shuffle and move around the state and token bits using communication lines between processing elements. Moreover, we can add a device (here, called a scram- bler) that is able to change the order of the stochastic bits. As all the processing element have identical structure and functionality, only moving the state bits around is sufficient for random communication of elements and tokens and there is no need for moving the tokens around. Figure 4.2 shows a general design using a state ring for moving the state bits around. In this design each processing element can send/receive state bits to/from upper and lower neighbouring elements. Each unit also has a token flip- flop that stores the token generated by the processing element. Each of such processing elements can be constructed using a few flip-flops and Lookup Tables (LUTs) on the FPGA. The scrambler sits in the middle of the state ring, receives random numbers from a Random Number Generator (RNG) and shuffles the state bits. This scrambler can be also constructed efficiently with a shift register present in the FPGA. About half of the Virtex-5 LUTs can be used as random addressable 32 bit shift registers. The logic circuit inside each processing elements captures the logic of the above actions on the values of the token and two state flip-flops. This logic circuit needs stochastic bitstreams with probabilities of PA,

PB, PCand another stochastic bitstream Phwith probability equal to half. This last stochastic bitstream

is needed when logic circuit has two different equally probable options. For example, when both state bits that are received from neighbouring element are 0, and token bit is 1, action 4 can be performed on any of the state bits. In this case Phis used to decide which one to change. Note that each PE unit

actually contains two processing elements (two state bits) that share the logic and token bit. The logic equations for the logic unit can be derived from the above actions as:

Su = T SuSd+ PCT ¯¯Sd+ T ¯SdS¯u( ¯PhPC+ PhPB) + PB(T ¯SdSu+ SdS¯u+ ¯T Sd) (4.2)

Sd = T SuSd+ PCT ¯¯Su+ T ¯SdS¯u( PhPB+ PhPC) + PB(T SdS¯u+ ¯SdSu+ ¯T Su) (4.3)

T = SuSd(T + PA) (4.4)

where Su and Sd on the right hand side of the equations are inputs from up and down neighbouring

processing element.

Although this model does not exactly work as the distributed protocol, it is a good estimation. The only differences are that the random samplings may not be always as random as distributed protocol, and in very rare cases (much less than 2% of the time if fitted with Izhikevich parameters) a token will be lost when all of the Su, Sd, T , and PAin a PE are 1. While this simple model lacks the mechanism

for detection of an action potential, spike generation, and resetting the membrane potential, and does not include the slow dynamics of the biological neurons, it is useful for investigation of the challenges in using this model in a design.

Since accurate in-vivo measurement of the intrinsic neuronal noise is not possible [355], for com- parison with biological neuron, we resort to using estimates from [246]. The total peak-to-peak voltage amplitude (σV) of the intrinsic neuronal noise of a pyramidal soma at resting potential (including thermal

noise, K+_{and Na}+_{ion channel noises, and synaptic noise) is estimated to be about 1mV [246]. Based}

PE

Scrambler

RNG

T

Logic

To/from state ring

PE

PE

PE

PE

To/from state ring

Figure 4.2: Left: general design of a distributed stochastic model consisting of a random number generator (RNG), a scrambler, and a number of processing elements (PE). Right: internal structure of a processing element (PE). Su, Sd, and T are the State up, State down, and token flip flops respectively.

pyramid neuron can be calculated:

SN RdB(P yr) = 20 log10( Asignal Anoise ) (4.5) = 20 log10( 130mV 1mV ) (4.6) ≈ 42dB. (4.7)

To investigate the effect of the number of PEs and length of the scrambler on the SNR of the system, the above stochastic distributed model of the quadratic neuron was simulated at the resting potential for 5000 time steps. Preliminary simulations with a scrambler length of 32 bits showed that over 2000 PEs (a total of 4032 state bits and 2000 token bits) are needed to achieve a SNR equal to the above estimate of 42dB. Moreover, to detect and generate an action potential, the bitstream must be examined with a large binary counter for a long time. This will also add to hardware resources and latency of the model. Obviously, such a high number of PEs is outside of the feasibility margins for compactness, performance, and efficiency of the neuron model on an FPGA device. However, pursuing this method might prove useful for small scale systems with very few neurons due to the bio-plausible stochastic nature of the model. Next, non-distributed stochastic models are examined.