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Literature Review

2.3 Overview of Signal Processing Techniques

2.3.1 Iterative Detector-decoder

Figure 2.7: An iterative detection/decoding scheme described in [39].

An iterative detector-decoder system refers to a detection scheme where a detector and decoder exchange soft information, in the form of Log Likelihood Ratio (LLR), about the transmitted bits in an iterative manner. Typically, a Bahl-Cocke-Jelinek-Raviv (BCJR) [59] or Soft output Viterbi algorithm (SOVA) detector [60] is used together with an LDPC decoder, as shown in Figure 2.7. For each detected bit, the BCJR detector calculates a posteriori LLR value, πΏπ‘Žπ‘π‘_𝑑𝑒𝑑, based on the Maximum a Posteriori (MAP) algorithm. This soft information is passed to the LDPC decoder in the form of extrinsic LLR, 𝐿𝑒π‘₯𝑑_𝑑𝑒𝑑, given by

where π‘π‘˜ is the input bit to the channel and y is the received sequence. Extrinsic information from the detector then becomes a priori LLRs for the decoder, πΏπ‘Ž_𝑑𝑒𝑐. The LDPC decoder uses a Sum-Product Algorithm (SPA) [61] to compute its own extrinsic LLR, 𝐿𝑒π‘₯𝑑_𝑑𝑒𝑐. Subsequently,

𝐿𝑒π‘₯𝑑_𝑑𝑒𝑑 = πΏπ‘Žπ‘π‘_π‘‘π‘’π‘‘βˆ’ πΏπ‘Ž_𝑑𝑒𝑑 (2.1)

𝐿𝑒π‘₯𝑑(π‘π‘˜|π’š) = 𝐿(π‘π‘˜|π’š) βˆ’ 𝐿(π‘π‘˜) (2.2)

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𝐿𝑒π‘₯𝑑_𝑑𝑒𝑐 becomes a priori information for the detector, πΏπ‘Ž_𝑑𝑒𝑑, and is used to update πΏπ‘Žπ‘π‘_𝑑𝑒𝑑 of the individual bits, as shown in Figure 2.7. The feedback loop in the iterative detector-decoder improves the performance of the system greatly.

The MAP and SPA algorithm employed in the BCJR detector and LDPC decoder respectively is described in detail as follow:

MAP algorithm

The MAP algorithm operates on a trellis structure such as shown in Figure 2.8. A trellis graphically combines information represented on a state diagram with the evolution of time.

The trellis nodes are sliced into vertical columns where each column represents a time index and each node represents a distinct state at a given time. A trellis branch depict the transition from one state to another state in a given time index. For an information sequence involving binary bits, two branches emerge from a node at a given time - each depicting bit β€˜0’ and β€˜1’

respectively.

Figure 2.8 A BCJR trellis.

In the BCJR detector, the MAP algorithm aims to identify the bit that was most likely transmitted at each time index. It does so by minimizing the probability of bit error using the read-back sequence [59]. The MAP soft decision is given by

Given that a trellis state of the BCJR, π‘ π‘˜+1, at time k+1 can be reached from state π‘ π‘˜ at time k, πΏπ‘Žπ‘π‘_𝑑𝑒𝑑 can be expressed in terms of the BCJR trellis as follow:

πΏπ‘Žπ‘π‘_𝑑𝑒𝑑 = 𝐿(π‘π‘˜|π’š) = ln (P(π‘π‘˜ = +1|π’š)

P(π‘π‘˜ = βˆ’1|π’š)) (2.3)

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Using the chain rule for joint probabilities, P(π‘ π‘˜ = 𝑠′, π‘ π‘˜+1 = 𝑠, π’š) can be decomposed into

The terms π›Όπ‘˜(𝑠) and π›½π‘˜(𝑠) can be recursively computed as follow:

The term π›Ύπ‘˜(π‘ π‘˜, π‘ π‘˜+1) can be further decomposed into

From the equations above, it follows that

At this stage of the MAP algorithm, the BCJR detector can pass this soft information to the LDPC decoder in the form of 𝐿𝑒π‘₯𝑑_𝑑𝑒𝑑. At the same time, it can also provide a hard decision of whether a transmitted bit is a 0 or 1 based on the sign of the computed πΏπ‘Žπ‘π‘_𝑑𝑒𝑑 value. The decision rule can be written as

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In an LDPC decoder, the SPA algorithm operates on a factor graph structure shown in Figure 2.9. The factor graph consists of n variable nodes and (n-k) check nodes where n refers to the length of the code and k is the length of information bits. In Figure 2.9, check nodes are represented as triangles and variable nodes as circles. Each variable node, x, represents a code symbol and each check node, c, represents a function which is essentially a parity check equation. An edge connects a variable node to a check node if that variable is involved in that check node’s parity equation.

Figure 2.9: An LDPC factor graph.

Decoding via SPA is carried out through the passing of messages along the edges of the factor graph. Messages are passed in the form of conditional probabilities that the received bit is a β€˜1’

or β€˜0’ given the read-back sequence z. Each check node makes use of the probabilities it received from its neighbors in the previous iteration step to make a new estimate at the present iteration step for the bits involved in the parity check equation. This new estimate is then sent to the variable nodes. A message sent from a check node π‘π‘˜ to variable node π‘₯𝑖 is denoted as rki andcan be represented mathematically as:

π‘Ÿπ‘˜π‘–(0) =1 2+1

2 ∏ (1 βˆ’ 2π‘žπ‘–β€²π‘˜(1))

π‘–β€²βˆˆπ‘(π‘˜)\𝑖

(2.11)

π‘Ÿπ‘˜π‘–(1) = 1 βˆ’ π‘Ÿπ‘˜π‘–(0) (2.12)

where N(k) is the set of variable nodes connected to check node π‘π‘˜ by an edge. Two messages are sent along each edge - π‘Ÿπ‘˜π‘–(0) which represents the conditional probability that the

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received bit is a β€˜0’ and π‘Ÿπ‘˜π‘–(1) for the conditional probability that the received bit is a β€˜1’. The message, qik, sent from variable node π‘₯𝑖 to check node π‘π‘˜ can be expressed as:

The equations above suggest that only extrinsic messages are passed between the nodes of the LDPC factor graph. The messages passed between the nodes can also be represented in terms of logarithmic likelihood ratio as follow:

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The exchange of messages between variable nodes and check nodes are repeated numerous times until ultimately a final probability is computed at all variable nodes. At this point, a hard decision for each bit is then made by comparing the final probability with a threshold value.

(a) (b)

Figure 2.10 Illustration of length (a) 4 and (b) 6 cycles in a factor graph.

In the LDPC factor graph, short cycles of length 4 and 6 commonly exist (Figure 2.10). Cycles of these lengths are known to significantly degrade the performance of the LDPC decoder. While a few measures can be implemented to reduce the presence of such cycles, a complete mitigation of these cycles (especially at long codeword length) is not possible and causes sub-optimality of the LDPC decoder. Aside from the sub-optimal LDPC decoder, the iterative detector-decoder is sub-optimal as a block. This can be justified from the fact that detection and decoding is done in an iterative manner and that the performance of the entire block improves with increasing number of iterations. An infinite number of iterations which gives rise to the best performance are in practice not possible.