1.2 Silicon Carbide for Power Electronics
1.2.3 Material Defects and SiO 2 /SiC Interface Problems
Although significant progress has been made in the past two decades to reduce the defect density of SiC substrates, this is still the most critical challenge faced by SiC wafer tech- nology, and is continuing to hinder the development of large area high current and high voltage devices. Defects in SiC include open-core dislocations (also called micropipes), low-angle grain boundaries and conventional dislocations. Micropipe defects were consid- ered as preventing the commercialisation of many types of SiC devices, especially high current power devices [26]. Figure 1.7 illustrates a typical micropipe defect within SiC material used in this work. The micropipe is the hollow core of a large screw dislocation, they follow the growth direction in SiC (c-axis) and propagating into the epitaxial layer(s) of the device. This defect will prevent a SiC device from blocking a reverse voltage, mak- ing it potentially useless. The large density of micropipes within a wafer will result a loss of yield in the device fabrication process.
The low-angle grain boundaries (LAGBs) near the crystal periphery tend to form with the growth of large-diameter crystals grown under non optimised process conditions. These LAGBs are defined as the boundaries between misaligned regions of SiC material. This may be either a relative tilt of the (0001) planes or a rotation of the planes with respect to each other, and generally consist of threading edge and screw dislocations.
Figure 1.7: Cross sectional view of a micropipe originating from the substrate and propagating into the epitaxial layer as shown in [27].
These LAGBs can act as stress concentrators and increase the chance of wafer cracking at defect locations during the epitaxial growth process. It is therefore important to reduce the density of low angle grain boundaries in the crystals. The LAGBs around the periphery of the wafer have been predominantly removed in the current commercial SiC material [28].
As mentioned previously, SiC is the only compound semiconductor that can be ther- mally oxidised to form chemically and thermally stable silicon dioxide (SiO2) layers. These
insulating layers are crucial for nearly all electronics applications. However, the high den- sity of interface trap at the SiC/SiO2 interface is the major obstacle in the development
performance as they will capture the carriers from the channel thus lowering the conduc- tion current. Moreover, the charge traps also act as Columbic scattering centres, which decrease the effective channel mobility in a MOSFET. Although it is still unclear what factors make the interface between thermal oxides and SiC so dramatically different from the classic and highly successfully SiO2/Si interface, it is believed mainly related to sili-
con and carbon dangling bonds, carbon clusters, carbon dimmers in the SiC and oxygen vacancies in the oxide near the interface [29]. Depending upon the surface potential, these traps can be charged positively or negatively. Figure 1.8 illustrates an example of the dangling bonds at the interface between SiO2 and semiconductor (SiC or Si) after
thermal oxidation.
Interface
Semiconductor SiO2
Dangling bond that became interface traps
Oxygen atom
Dangling bonds
Figure 1.8: Formation of dangling bonds at the interface between SiO2 and
To fully utilise SiC’s potential, the quality of the SiO2/SiC interface will need to be
improved by developing more efficient processes to passivate defects which were formed during the oxidation process. As discussed in Chapter 6 and 7 of this thesis, the standard passivation process was based on post-oxidation annealing in nitric oxide (NO) or nitric oxide followed by hydrogen annealing (NO+H2) [29]. However, NO is very toxic and
for safety reasons nitrous oxide (N2O) is becoming more popular in terms of nitridation
of thermally grown oxide. These passivations increase the channel mobility of a SiC MOSFET from single digit (∼1 cm2/V.s) to around 30 cm2/V.s, which have made the
commercialisation of SiC MOSFETs possible. However, this channel mobility value is only about 4% of bulk mobility value of SiC, whereas in the case of Si, the inversion channel mobility can be as much as 50% of bulk mobility. There are other methods reported in the literature that can further improve the channel mobility, such as oxide growth in the presence of sodium, which has mobility value as high as 150 cm2/V.s, but
devices are highly unstable and no practical use because sodium is mobile under stress [30]. Phosphorous passivation is another passivation technique which has been shown to be more effective in reducing the interface trap density compared to NO passivation, with peak field effect mobility of about 80 cm2/V.s [31]. However, the phosphorous
passivation will convert SiO2 to phosphsilicate glass (PSG), which is a polar material and
cause threshold voltage instability. In this work, both N2O and phosphorous passivation
have been investigated and compared for both 4H-SiC MOS capacitor and MOSFETs as discussed in more details in Chapter 6 and 7.
Recently, Sharma et al. [31] reported a phosphorous passivation process which uses a thin PSG layer capped with deposited oxide. This process improves the threshold voltage stability compared to the thick PSG passivation method with the peak field effect mo- bility of around 70 cm2/V.s. High temperature oxidation (>1500◦C) with a low oxygen flow rate has also been reported to reduce the interface trap density to around 2×1011
cm−2eV−1 with field effect mobility of approximately 40 cm2/V.s [32, 33]. High tempera- ture nitridation, both annealing of thermally grown oxides and direct growth in N2O on
4H-SiC(0001) MOSFETs with implanted p-body region have been investigated and pub- lished recently as discussed in more details in Chapter 7. Results have demonstrated that at high temperature nitridation (>1200◦C) there is a significant improvement in the inter- face trap density (∼1.5×1011 cm−2eV−1) and field effect channel mobility (∼20 cm2V.s)
compared with those at lower temperature (1×1012 cm−2eV−1 and 4 cm2/V.s). Among those nitridation temperatures, 1300◦C has found to be the most effective in increasing the field effect channel mobility and reducing threshold voltage.