Maximum Likelihood Sequence Detector

Viterbi detector is used in this section as an MLSD detector for PRML. After the data is equalised to a target, the expected data will ideally be the dibit response, as in the example shown in table 3.11. Therefore, the distance metric (DM) is determined from the difference of these possible expected dibit responses and the received signal.

The signal passes through the Viterbi Algorithm (VA) as explained in section 2.5.1. For hard decision VA, the history kept is a simple 0 or 1 in a 1D problem. In a situation where the soft information is needed for another use, the Branch Metric (BM) of both 0 and 1 are saved in the history of the VA instead.

For a 2D scenario, the history kept is a number between 0 to 2n − 1 representing the index of the selected transition. Where a soft infor- mation is needed as output, the BMs of all the transitions are kept. The minimum BM is chosen to be the next State Metric (SM) and is kept in the history as the selected transition to be used for next SM.

The 1D VA is used when linear equaliser is used to cancel one of the interferences as will be discussed below.

ML Along Track

The signal is first equalised using 1D PR equaliser along track to shape the signal to selected target. 1D ZF equaliser is then used to cancel ITI across track. VA as an ML detection is then applied to the resulting signal to finally detect the data. This technique will be termed as ML Along-Track henceforth

Register exchange mode of populating history is used in the example to be presented. That is a situation in which the history of a state, which leads to the best selected BM, is carried along to the destination state, before adding the latest history. This makes trace-back just a matter of picking up the data of the best state. The best state is de- termined every cycle because for the 1D cases studied. The complexity is small such that the search for best state can be implemented every cycle without heavy toll on complexity and speed.

Using the example given in table 3.10, which is already shaped along track by shaping equaliser of target [0.6, 1.0, 0.6]. We now need to cancel ITI in the same way as done for ZF equaliser example. The resultant data will be as shown in table 3.12:

Table 3.12: Shaped Signal

-2.27 -1.84 -2.25 -1.81 -1.43 -1.09 -0.06 -0.25 -2.33 -2.03 -1.30 -2.01 -2.2 -2.2 0.11 0.88 1.82 2.03 2.40 0.32 -1.12 0.32 2.49 3.31 2.08 0.01 -2.2 -2.2 -2.53 -1.53 0.51 1.97 0.59 -1.29 -1.18 -0.73 -0.58 -0.78 -1.54 -2.64 -2.2 -2.2

The last two columns are just added as a padding for the purpose of traceback.

To carry out Viterbi ML detection along track, we start initialising the SM and history of each state. If the state is definitely known to start from 00 state, the first term of the first track will be initialised with the smallest metric (0) for state 00. The other states are assigned equal probabilities that sum up to a total of 1. From then on, the procedure continues as shown in the example of figure 3.5. The trace- back length (TBL) is assumed to be 4 symbols (bits) and target length 3 (0.6, 1.0, 0.6).

From the figure, it could be seen that the state with the minimum SM is the second state. This means the output will be taken from that state in a register exchange implementation. This output is the earliest bit (that is the first shown by an arrow). In this case, the output is a “1”. The reference symbols, shown in table 3.11 and figure 3.3, are used in the squared term to find DMs. These DMs are added to the SMs to get BMs. For every state, the minimum SM coming into that state is selected as the next state SM, and the history (except for the first bit) is appended to either 0 or 1 if the top or lower BM is selected respectively. Information in the next state is now used as that of present state for processing of the next symbol along the same track.

Figure 3.5: Example of 1D Viterbi Detection This continues until the end of the tracks.

ML Across Track

In this method of detection, 1D ZF equaliser is used to cancel ISI along track. The ITI response is assumed to be the target across track and therefore does not need equalisation. This is because we assumed that the interference across track does not involve more than three tracks. Then VA ML detector is used across the tracks to detect the signal. This is from now on termed ML Across-Track.

Register exchange is also used in saving the history but in reading the data, a whole band of 8 bits are processed across track before the data is read. This means the best path will be searched for once after every band of adjacent bits across tracks are processed.

TBL is, therefore, the number of tracks. The first symbol of first track, the first symbol of second track, the first symbol of third track,

and so on, are treated as successive symbols. A similar thing is done to second symbols, and so on to the end of the data. The difference to the example shown in figure 3.5 is that, no need to find the minimum SM to pick an output until all the adjacent symbols from all tracks are processed.