3.4 Previous methods
3.4.3 Other methods
Methods in this category refer to two different types of methods, which are hybrid methods and post-routing-assisted methods. “Hybrid” means that
this type of method combines the bottom-up (greedy algorithms) and top- down (circuit partitioning methods) methods, and “post-routing-assistant” indicates that the methods or the combined methods produce better solutions by incorporating the placement and routing processes in the CAD flow. The reason is that using the CLB number and CLB interconnect as clustering objectives might not fully evaluate the quality of a clustered circuit as discussed in 3.3.3. Utilising the placement and routing processes in the clustering method and executing them as a loop, it can continuously adjust or optimise a solution based on real mappings.
HDPack (Chen et al., 2007) is a typical example of the hybrid method category. At the start, HDPack uses the circuit partitioning method to preferentially cluster BLEs into small sub circuits, where they are better for including small (fewer terminals) connections. Then these small sub circuits (each sub circuit might have only 1 BLE) are further clustered using seed-based (bottom-up) methods. In addition, the HDPack also incorporates placement process in the CAD flow, which can roughly determine which regions are more congested based on a FPGA model, and extra adjustments can be produced for the clustered circuit. Similar to HDPack, which involves the placement process, Un/DoPack (Tom et al., 2006) and T-NDPack (Liu and Akoglu, 2009) involve the entire mapping process – post synthesis processes, and uses either pure bottom-up and top-down methods or hybrid methods. Un/DoPack and T-NDPack also introduce the concept of depopulation (Tom et al., 2006) in their methods – depopulation means that, in a routing process, whitespace will be inserted to the congested regions of the targeted FPGA, and all CLBs in the congested region will be unpacked and re-packed, where some BLEs are packed to the whitespace. Therefore, CLBs in that region will not be “too-full”, and it essentially relieves routing congestions.
3.4.4
Advantages and disadvantages
It is notable that bottom-up methods are popular in solving the FPGA
circuit clustering problem. This is due to the fact that the bottom-up
circuit clustering methods are easy to implement, and useful solutions can be obtained quickly. In addition, the clustering objective can be weighted in their attraction functions. As the seed BLE selection and attraction function exist in these methods, where it is uncertain whether or not the above two functions can supply the best BLE in each clustering step, the produced solution is usually local-optimal only. The same problem is also presented in their deterministic results. Although BLE selection methods, both for the seed selection and attraction function, are improved in some methods, for example iRAC, the best BLE might not be unique, so the deterministic result can imply that the greedy algorithm produces worse solutions. Weighting objectives in a single attraction function is able to meet the multiobjective optimisation needs, but the simple weighting can also destroy the proportionality between objectives. As well as this, since VPack, the hill-climbing algorithm is widely utilised in bottom-up methods – however, this extra algorithm might have limited improvements on results.
In contrast, the top-down FPGA circuit clustering methods have also been proven to be able to solve this problem. As the top-down method considers the targeted circuit from a global perspective and also focuses on circuit connections, the clustered circuit can be optimised on CLB interconnects after clustering. This is the reason that these methods can produce better solutions than the bottom-up method. However, using graphs to cluster a circuit can be difficult to involve clustering constraints. Although there are methods that combine both the top-down and bottom-up methods and use the top-down method as the first step, the quality of the results is usually decreased from the second step – the bottom-up methods. Apart from the two major types of methods, there are also methods that incorporate the placement and routing, but the optimisation is still based on a complex weighted cost functions, where optimising one objective might affect another
objective.
3.5
Summary
This chapter first reviews why the CAD is important, and then introduces a typical CAD flow for FPGAs. In addition, a research based CAD flow is highlighted. Subsequently, the chapter focuses on the circuit clustering process in the FPGA CAD flow. Requirements and significances are intro- duced for that process. A few classic FPGA circuit clustering methods have been described, and the advantages and disadvantages of these methods are discussed. Based on the discussion, the main issues are extracted as follows: First is the clustering order. If the circuit clustering method clusters a circuit from a global perspective, the clustered solution can be evaluated from the global perspective. This means an optimal solution can be identified. Second is the seed and BLE selections in the bottom-up methods. Using the above bottom-up circuit clustering methods, the performance of clustered circuits is limited by the seed and BLE sections. Third is the Multiple Objective ap- proach. Although current circuit clustering methods start to consider multiple performance metrics of a clustered circuit, the Multiple Objective approach is usually coarse, which uses a weighted cost function. In the next Chapter 4, a new optimisation method, MultiObjective Genetic Algorithm (MOGA), is introduced. By using this method, a set of new clustering methods are proposed. These methods potentially solve the issues that are identified in the classic circuit clustering methods.
Chapter 4
Evolutionary Computing
4.1
Evolutionary Computing (EC)
The concept of Evolutionary Computing (EC), or also known as evolutionary computation, can be traced back to the later 1940s. For example Turing proposed “genetical or evolutionary search” in 1948 and Bremermann’s ex-
periment of “optimization through evolution and recombination” (B¨ack et al.,
1997; Fogel, 1998; Eiben and Smith, 2007), and it is a subfield of Artificial Intelligence (AI) in computer science. EC is actually defined as a set of Evolutionary Algorithms (EAs), and these EAs are based on Darwinian evo- lutionary principles. This is the reason that these algorithms are called EAs. EAs can be classified in the family of trial and error problem solvers (Bei et al., 2013), and considered as automatic problem solvers and optimisation methods via a stochastic character or metaheuristic. Since the 1960s, EC is further described as four dialects, which are: Evolutionary Programming (Fogel et al., 1966), Genetic Algorithms (GAs) (Holland, 1973), Evolution Strategy (ES) (Rechenberg, 1973) and Genetic Programming (GP) (Koza, 1990). Due to the nature of evolution, it means that EAs are suitable solvers in many cases for complex problems, which include scientific and industrial areas (Greiner et al., 2013), such as design optimisation, result searching,
system control and event scheduling. In addition, EA is still an active topic for research (Sun et al., 2014). The remarkable advantage of EAs is that they can produce better solutions for a targeted problem, but without the need for fully understanding the problem.