Microprocessors

The microprocessor is the central DPR assembly controlling the operation of all other assemblies and performing arithmetic and logical data operations. The modern microprocessor is practically a complete control system. It has a sophisticated internal architecture and represents a very large integrated circuit built on silicon base layers. It is manufactured by special technology involving chemicals, gases, and radiation.

The processor contains a number of microtransistors interconnected with ultrathin aluminum connecting channels enabling interaction for recording and processing of data, and providing the performance of numerous func- tions. The first model of the 4004 microprocessor, announced by Intel in 1971 (see Figure 2.44), contained “only” 2300 transistors and performed about 60,000 computations per second. The 486 series processor, widely used today in DPRs, contains 1.6 million transistors, while the Pentium IV processor has 42 million transistors and performs hundreds of millions of operations per second.

Today, microprocessors are the most complex element among electronic devices. Hundreds of manufacturing steps with surpassingly strict require- ments to the purity and accuracy of each are required to produce modern microprocessors. Initially, the first very thin layer of silicon dioxide is grown on the base under a high temperature. Then the base is covered with photo- graphic emulsion that is disintegrated by ultraviolet radiation, which is then covered with the so-called template (a template with the circuit pattern).

During the photolithography process, ultraviolet radiation, passing through the template, forms the circuit pattern on the base. Light-exposed

areas of photolayers become soluble and are washed out with a special sol- vent during the further processing, thus exposing the corresponding part of the silicon dioxide layer not protected by the template. Chemicals etch out the unprotected areas of silicon dioxide, revealing the silicon dioxide pat- tern on the base. In order to separate the finished layer from the new one, an additional thin silicon dioxide layer has to be grown on the circuit pattern. Then it has to be covered with a microcrystalline silicon layer and another photolayer. Subsequently, the second layer has to be grown in the same way. A special template is used for the exposure of each microprocessor layer.

The formation of semiconductors with desired conductivity and p-n transi- tions of the transistors from the pure silicon is performed during the all-ion- implant process, where the areas of the silicon base exposed to ultraviolet light are bombarded with ions of different impurities. The ions penetrate into the base, providing the necessary electrical conductivity of these areas.

Coating and etching have to be repeated several times. After this, very small gaps in the layers are left for the interlayer compounds. These gaps are filled with metal atoms joining the layers of the future microprocessor (in today’s microprocessors, the number of layers may reach 20 or more.

The ultrafine layers of metal are left at the edges of the chip for attaching the external microprocessor pins. The total manufacturing cycle consists of more than 250 stages, after which the microprocessor has to pass thorough testing and then be integrated into the protective enclosure.

The microprocessor performs the following functions:

Reading and decoding commands contained in the main memory •

Reading data from the main memory and registers of external •

device adapters

Data processing and entry into the main memory and registers •

Generating control signals for DPR output devices •

FIGURE 2.44

Microprocessor software determines the specific tasks performed by the microprocessor. Microprocessor types differ by memory type and size, set of instructions, processing speed, the number of input and output lines, and data capacity. In general, a microprocessor flow diagram can be as that depicted in Figure 2.45.

The CPU is the binding assembly of any microprocessor device, its core. Some of the superior modern microprocessors have several cores working in parallel under the control of a master core (see Figure 2.46). They are called

Data address

generators Program

sequencer Programmemory memoryData Memory

Program memory address

Program memory data Data memory data

Arithmetic units ALU RAC Shifter

Core

Serial ports Timer Host interface port External data bus External address bus Flags 0 1

Data memory address DAG 1 DAG 2

FIGURE 2.45

An example of the internal structure of a commercial microprocessor with integrated memory and some supplementary elements.

Master core _{Core 1}Slave

Slave Core 2

Slave Core 3

FIGURE 2.46

Structure of multicore processor. Master core: control (lead) core; and slave core: (executive) leaded core.

multicore processors. The core of a conventional CPU includes an arithme- tic logic unit (ALU), a register-accumulator (RAC), a multibit shifter, data address generators and program sequencers, and an internal bus.

The arithmetic logic unit performs arithmetic or logical operations on the data presented in binary or binary-coded decimal code. The result is stored in the so-called register-accumulator.

RAM cells represent the RAC, but, unlike the main memory, they use shorter commands for data exchange (i.e., the RAC is the fastest memory device of the microprocessor).

The multibit shifter with a set of multiplexors provides processing of shift logical instructions and multiplication and division operations. In a binary computing unit, a one-position shift to the left of the binary number has the same effect as multiplying by 2 (see Figure 2.47), and a right shift has the same effect as dividing by 2 (zero is shifted to a new position). Since the shift- ing speed significantly exceeds the speed of multiplication and division operations, it is widely used as a tool for program optimization.

Data address generators and program sequencers coordinate the interaction between different parts of the microprocessor. The device includes the clock speed generator, clock-pulse driver, and program sequencer. The framing bit is generated by a crystal-controlled oscillator equipped with an external crystal oscillator. The frequency of the clock speed generator determines the speed of the microprocessor.

The program sequencer (or controller-sequencer) provides for temporarily halt- ing the execution of one program in order to promptly fulfill the other pro- gram that is currently more important. Program sequencer services interrupt procedures, receive interrupt requests from external devices, determine the priority of the request, and send the interrupt signal to the microprocessor.

Microprocessor memory is designed for short-term storing, recording, and transmitting data used in the calculations directly to the next operating

Most Significant Bit (MSB)

Least Significant Bit (LSB)

7 6 5 4 3 2 1 0

0

0

0

0

0 0 0

0

1

1

1

1

1

1 1 1 =

=

23

46

A left logical shift

FIGURE 2.47

ticks. Microprocessor memory is based on registers and provides high-speed DPR operation, as the main memory is not always capable of providing the required speed of recording, searching, and data reading.

The microprocessor interface system is designed for communication with other DPR devices. It includes the following:

Internal interface of the microprocessor •

Buffer storage registers •

I/O control circuit and system bus (the I/O port is interface equipment •

providing connection of the other device to the microprocessor) In order to extend and improve microprocessor functionality, both stan- dard peripherals and additional circuit boards with chips can be connected to the microprocessor and system bus. These include the math coprocessor, I/O coprocessor, and interrupt controller, among others.

The math coprocessor accelerates operations with binary floating-point num- bers, binary-coded decimal numbers, and trigonometric functions. The math coprocessor is controlled by the main microprocessor. It has its own instruc- tion system and operates in parallel with the latter. The result includes the acceleration of operations in dozens of times over. Typical modern micropro- cessors are, as a matter of course, equipped with math coprocessors.

The I/O coprocessor works parallel with the microprocessor. It significantly accelerates the execution of I/O procedures when servicing multiple external devices, and deallocates the microprocessor from I/O procedures, including direct memory access mode.

The system bus provides communication between various elements of the microprocessor. The bus is a group of conductors used as communication lines for transmitting digital data. There are three main types of buses in the microprocessor: a data bus, address bus, and control bus. The data bus pro- vides data transfer between processor assemblies. The address bus is used to transfer the memory cell address to obtain data from the permanent storage or random access memory. The control bus transmits control signals from the microprocessor to other system elements.

The most important features of the microprocessor are as follows: Clock speed defines the performance of the processor. The processor oper-

ation mode is defined by a special chip called the master clock genera- tor. Each operation of the processor is performed in a certain number of cycles. The clock speed dictates the number of elementary opera- tions performed by the microprocessor per 1 second. The frequency of the first microprocessor type 4004 was 108 kHz, the 486 series microprocessors had 33 MHz, and the frequency of the Pentium-IV is 1.5 GHz. Microprocessors with codes DX2 or DX4 provide internal doubling (×2) or quadrupling (×4) of the clock frequency.

Processor word is the maximum number of binary digits (bits) that can be processed by the processor at the same time. That is, if the proces- sor is capable of processing 8 bits at a time, it is called an 8-bit proces- sor; if it can process 32 bits, it is called a 32-bit processor; and so on. The higher the processor word, the more information it can process per unit of time and the higher the device performance under oth- erwise equal conditions. For example, the 486 series microprocessor that is often used in DPRs is a 32-bit processor. Often, the less sophis- ticated process controllers are equipped with cheaper 8- and 16-bit processors. As already noted, the central processor is connected to other devices through the system bus. Since each bus has a specific bit width, which may differ from the CPU word, sometimes the CPU word is represent by two digits. For example, the digital symbol 32/64 means that the processor has a 32-bit data bus and a 64-bit address bus. Processors with capacities exceeding 32 bits are not used in DPRs. Today, 64-bit processors are used primarily in corpo- rate network servers for operating high-resource consuming appli- cations and providing exceptional reliability of systems for banking, manufacturing, engineering, and research.

Port is a special device providing communication between the micro- processor, external devices, and peripherals. Communication con- trollers, located on the main board, control the data transmit-receive process. This requires protection against unauthorized or unquali- fied access to the internal logic and DPR settings.

In the era of electromechanical relays, all connections were made with bundled rigid conductive wire. After installation, the relay is covered with protective caps and sealed. This guarantees protection against unauthorized or unqualified access to the relay.

The internal operating logic, functions, and settings of DPRs can be easily changed from an external computer or remote access local area networks (LANs, on Ethernet). The consequences of such intervention are unpre- dictable and dangerous, so some manufacturers of DPRs take measures to prevent such intervention. One such measure is so-called hard logic— the irreversible operating algorithm previously approved by the customer. This principle is basic to DPR types SPAC-800 and SPAC-810, produced in Russia under the license of ABB. Semihard logic (i.e., an algorithm allow- ing the input-output of particular functions and protection settings without access to basic logic change) is the most feasible principle used in many types of DPRs.

However, DPR devices with the so-called freely programmable logic have become widely used lately. According to the manufacturers, this logic pro- vides the best flexibility and versatility for relay protection, and it grants considerable room for adaptation of DPRs to specific customer needs and

characteristics. These are the latest series of SIPROTEC from Siemens, SEPAM-80 from Schneider Electric, and many others. Programming of these devices is formalized and includes operations with special tables, matrices, logic elements, logic equations, and logic modules (often, they are rather imperfect and require a thorough analysis for the correct choice). Naturally, multiple access-level passwords should be entered in the DPRs of this type. For example, SIPROTEC has more than ten access levels, and none of them allows completely separate access to the logic from access to the relay set- tings input. Therefore, during on-site DPR debugging, you have to obtain full programming access, which makes password-level separation senseless. Moreover, during the operation the entire embedded protection logic and settings can be easily destroyed and new ones can be uploaded. Reloading the RAM with a firmware update results in the “erasing” of passwords and all other data; thus, it is possible to reinstall any DPR logic.

It stands to reason that the greatly increased risk of unauthorized or unqualified access to the relay is the reverse of flexibility and versatility. In this regard, some attempts have been made to return to restricting access to the internal DPR logic with more reliable methods previously applied in electromechanical relays. For example, in Nari-Relays DPR type RCS-9671 (transformer differential protection), we have to connect two points at DPR output terminals with conductive wire (i.e., an appropriate jumper) in order to activate any function. This jumper supplies positive potential (from a sep- arate, specially designed 24 V low-power internal power supply) to the input activating the required function. It’s a very good solution, in our opinion.