The model generation tools enable you to develop models for devices on the UUT that do not have models available in the device libraries. The available model generation tools include:
z Hybrid Model Editor
z BasicSCAN (Bscan)
z Xpress Model
z Onboard Programming Tools
Hybrid Model Editor
Hybrid Model Editor is an interactive graphical tool that you can use to create a model for a hybrid device. You can use any of the system’s test instrumentation to construct the test you require. Similar to analog and digital test models, hybrid models can use .CKT file flagspecs. A model has the facilities to use information in the .CKT file and .ATO file in generating a test.
You access the Hybrid Model Editor from the Start menu or by clicking its icon from the GR228X Program Launcher. The Hybrid Model Editor is designed to facilitate data entry by providing a window that contains data entry fields. Figure 3–6 shows the Hybrid Model Editor main window.
BasicSCAN
BasicSCAN is a separately licensed software product that is designed to solve the test generation problem for both Application-Specific ICs (ASICs) and complex commercial boundary scan components. You access BasicSCAN from the Start menu or by clicking its icon from the GR228X Program Launcher.
BasicSCAN eliminates the need to develop test vectors for BasicSCAN components and has these benefits:
z Simplifies the program preparation and debug processes.
z Improves open pin fault coverage.
z Reduces test development time.
z Simplifies test complexity and reduces the number of test vectors. Figure 3–7 shows the BasicSCAN main window.
Figure 3–7 BasicSCAN Main Window
Once BasicSCAN knows the boundary scan capabilities of a component, it can automatically generate a Digital Test Source (.DTS) model that can be used by the test generation software. All BasicSCAN generated models use the same test structure. They are capable of generating disable and inhibit sections that describe how to prevent the device from interfering with other UUT component tests, and can also handle various component wiring configurations. When selected, BasicSCAN can also generate a test to run a component’s built–in self test.
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The BasicSCAN test checks:
z Component’s instruction register capture value. An incorrect capture value can indicate a faulty or wrong component.
z Correct length of the Instruction Register and Boundary Scan Register.
z IDCODE and USERCODE expect values are correct.
z Opens between the system Driver/Sensor nails and the component’s input/output cells. This type of failure can indicate a mis–inserted or poorly attached component.
z Component pins can either capture or drive both a logic 0 and a logic 1. This detects any stuck–at failures at the component’s input/output buffers.
For more information about BasicSCAN, refer to the BasicSCAN Boundary Scan User’s Guide.
Xpress Model
Xpress Model is an interactive graphical tool that you can use to create a model for a digital device that is not in the Digital Test Library. Xpress Model is often used to create models for custom digital components that do not support boundary scan components, such as programmable array logic devices (PALs).
You access Xpress Model from the Start menu or by clicking its icon from the GR228X Program Launcher. Xpress Model is designed to facilitate data entry by providing a window that contains data entry fields. Figure 3–8 shows the Xpress Model main window.
There are several 3rd-party software products that you can use to create DTL models. FS-ATG and AccuGEN are two products that can automatically generate models for PALs.
For more detailed information on generating digital models, refer to the Xpress Model User’s Guide.
Onboard Programming Tools
Onboard programming provides a cost–effective method for testing board assemblies. It enables you to program memory and in-system programmable (ISP) devices after they are assembled on a printed circuit board. This reduces manufacturing costs and improves product quality. Only unprogrammed devices need be in stock, reducing inventory.
Programming Flash and ISP devices after board assembly reduces manufacturing time and costs. Because using onboard programming means the devices are handled less, fewer defects are introduced and product quality is improved. Programming the devices at board assembly time ensures the devices are programmed with the latest firmware. Onboard programming does require a longer test time in the manufacturing process; throughput is lower during the programming process.
Flash memory is programmed using all device pins and requires full access. These devices use unique models that are created using published algorithm information produced by the vendor.
ISP logic has dedicated pins for programming a fuse matrix; this requires access to 5–6 device pins. Programming models for these devices are automatically created using input from device vendor-supplied tools.
Assemblies using these devices must be designed for testability because of the increased test time. Your design must isolate pins from other components that could adversely affect the programming.
Onboard programming supports several vendor formats. For Flash devices, programming data is generic and is usually specified in one of the following file formats:
z Intel Hex–32 bit
z Motorola S–Record 32–bit
z Absolute Binary
z ASCII–Hex
For ISP devices, the supported vendors and tools are:
Vendors Vendor URL Tool
Altera www.altera.com MAX+PLUS II
AMD www.amd.com MACHPRO
Lattice www.latticesemi.com ispDCD Xilinx www.xilinx.com EZTag
To obtain ISP vendor tools, you can contact your vendor sales representative or access the vendor home page at the specified URL.
NOTE Vendor tool names may change. There may be a vendor charge associated with these tools.
Deep Serial Memory (DSM) is specifically designed for onboard programming test applications. DSM reduces testing and programming preparation time, and required disk space. Programming Flash devices requires DSM. ISP devices can be programmed with or without DSM.
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When you use DSM, data is loaded into memory once, independently of the driver/sensor memory, and is separated from the test preparation process. If the data changes from device to device but the device configuration remains the same, the test preparation process does not need to be rerun.
The data representation is more compact than what is used in the programming language, which reduces the required disk space. However, the bursts that result when you use DSM are very large. If the configuration changes when you use DSM, the preparation process must begin again.
The Onboard Programming Solutions tools implement onboard programming of Flash and ISP devices using a graphical interface.
Flash memory devices are non–volatile storage devices that allow memory writes and reads while the devices are assembled on the board. The Flash tool, which is shown in Figure 3–9, simplifies programming your Flash devices.
In–system programmable (ISP) devices are logic devices that can be electronically erased and reprogrammed after they are installed on a board. Because programming these devices requires that power be applied to the board, the board should be checked for shorts and other defects that could cause damage when power is applied. The ISP tool shown in Figure 3–10, in conjunction with a vendor tool, simplifies the process of programming ISP devices.
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