Other pointer and Index Registers

In addition to the Stack Pointer register, SP, the EU contains a 16-bitbase pointer (BP) register. It also contains a 16-bit Source index (SI) register and a 16-bitdestinat ion index (DI) register.

These three registers can be used for temporary storage of data just as the general purpose registers. However, their main use is to hold the 16-bit offset of a data word in one of the segments. That is, the pointer and index registers are usually used to point to or index to an

address in memory. When used in this manner, these registers are address registers that designate a specific location in the memory that may be frequently used by the program. The addresses contained in these registers can be combined with information from the BIU to physically locate the data in the memory.

The Bus Interface Unit

The BIU sends out addresses, fetches instructions from memory, reads data from ports and memory. In other words the BIU handles all transfers of data and addresses on the buses for the execution unit. The BIU can be thought of as three functional blocks; Bus control, Instruction queuean d Address control.

Bus control

The bus-control unit performs the bus operations for the MPU. It fetches and transmits instructions, data and control signals between MPU and the other devices of the system.

Instruction Queue

The instruction queue is used as a temporary memory storage area for data instructions that are to be executed by the MPU. The BIU, through the bus-control unit, perfectness instructions and stores them in the instruction queue. This allows the execution unit to perform its calculations at maximum efficiency. Because the BIU and EU essentially operate independently, the BIU concentrates on loading instructions into the instruction queue. This usually takes more time to do than the calculations performed by the execution unit. In effect, the BIU and the EU work in parallel. The instruction queue is a first- in, first- out (FIFO) memory. This means that the first instruction loaded into the instruction queue by the bus control unit will be the first instruction to be used the ALU.

Address control

The address-control unit is used to generate the 20-bit memory address that gives the physical or actual location of the data or instruction in memory. This unit consists of the instruction pointer, the segment registers and the address generator as shown in fig 2.5

Fig.2.5 Instruction Pointer

The Instruction Pointer (IP) is a 16- bit register that is used to point to, or tell the MPU, the instruction to execute next. Therefore, the instruction pointer is used to control the sequence in which the program is executed. Each time the execution unit accepts an instruction, the instruction pointer, is incremented to point to the next instruction in the program.

Segment Registers There are four segment registers. They are the code segment (CS), the data segment (DS), the stack segment (SS), and the extra segment (ES). These registers are used to define a logical memory space or memory segment that is set aside for a particular function. The CS register points to the current code segment. Instructions are fetched from this segment. The DS register points to the current data segment. Program variables and data are held in this area.

The SS register points to the current stack segment, stack operations are performed on locations in the SS segment. The ES register points to the current extra segment, which is also used for data storage. Each of the segment registers can be upto 64 kilo bytes long. Each segment is made up of an uninterrupted section of memory locations. Each segment can be addressed separately

using the base address that is contained in its segment register. The base address is the starting address for that segment.

Address Generator

The address-generator unit is used with the segment registers to generate the 20- bit physical address required to identify all the possible memory addresses. The 20 address lines give a maximum physical memory size of 20 address locations, or 1,048,576 bytes of memory. But all the registers in the MPU are only 16 bits wide. The physical address is obtained by shifting the segment base value four bit positions ( one hexa decimal position) and adding the offset or logical address of the segment.

2.8 Summary

The microprocessors functions as the CPU in the stored program model of the digital computer.

Its job is to generate all system timing signals and synchronize the transfer of data between memory, I/O, and itself. It accomplishes this task via the three-bus system architecture previously discussed.

The microprocessor also has a S/W function. It must recognize, decode, and execute program instructions fetched from the memory unit. This requires an Arithmetic-Logic Unit (ALU) within the CPU to perform arithmetic and logical (AND, OR, NOT, compare, etc) functions.

The 8086 CPU is organized as two separate processors, called the Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU provides H/W functions, including generation of the memory and I/O addresses for the transfer of data between the outside world -outside the CPU, that is-and the EU.

The EU receives program instruction codes and data from the BIU, executes these instructions, and store the results in the general registers. By passing the data back to the BIU, data can also be stored in a memory location or written to an output device. Note that the EU has no connection to the system buses. It receives and outputs all its data thru the BIU.

2.9 Keywords

 BIU

 ALU

 MPU

 EU

 SF

 PF

 MSB

 DF

 IF

 TF

2.10 Exercise

1) Explain the Architecture of 8086.

2) Define BIU.

3) Explain Stack Pointer Register.

Unit 3