DESCRIPTION AND OPERATION
A. Power Supply A2 (Subtask 23-70-44-870-008-A01) (1) General
(a) The power supply provides +5 volts, +12 volts, 12 volts, and +18 volts to the SSCVR with an input from either 115 VAC (nominal) 400 Hz, or +28 VDC (nominal). In addition, the power supply is implemented on two circuit board assemblies, the A2A1 regulator board and the A2A2 capacitor board. A block diagram of the power supply is shown in Figure 4.
Figure 4. (Sheet 1 of 1) A2 Power Supply Block Diagram (GRAPHIC 23-70-44-99B-807-A01) (2) Power Supply Capacitor CCA A2A2
(a) General
1 Refer to Figure 2007 for schematic.
(b) Input Filter
1 The power supply is energized through J1 on the A2A2 card with the 115 VAC lines or the 28 VDC input lines.
(c) 115 VAC
1 R1 and R2 are one watt resistors used to provide current limiting. These resistors also act as fuses during the initiation of power in case of circuit shorts. C1 is a differential mode capacitor for filtering the input. C2 and C3 are common mode capacitors. The AC signal passes through T1 which reduces the voltage to 28 volts.
It is then filtered through a full wave rectifier. At this point it is joined by the +28 VDC signal input circuitry to pass on to the filter circuits.
(d) 28 VDC
1 R3 is a one watt resistor used to provide current limiting. This resistor also acts as a fuse during the initiation of power in case of circuit shorts. C4 is a differential mode capacitor for filtering the input. C5 and C6 are common mode capacitors. D2 is an isolation diode to separate the AC input circuit from this DC input circuit. At this point it passes on to the filter circuits.
(e) EMI Filter Choke and Hold Up Capacitors
1 L1 provides common mode filtration of EMI. D3 and R34 act as a snubber providing transient protection. Capacitors C17 thru C24 form a voltage bank to overcome short power transients.
(f) RESET (/RST)
1 The reset output, /RST, is high when the system is up and running. When the +5 volt supply drops below limits (approximately 4.75 V), /RST goes low. This is the signal to the microprocessor that power integrity has been lost. The system is reset here. The PDI causes the power down mode. The reset circuit monitors +5 volts with device U2A. U2A is a comparator which compares +5 volts (divided to 2.5 volts) against a 2.5-volt reference.
2 The reference voltage is supplied by VR1 through R28 to U2A-2. The +5 volt signal is divided through R31, R32, R33 to provide voltage to U2A-3. When the +5 volts supply drops to 4.75 volts (approximately), the output of U2A-1 switches low. C16 is a filter capacitor to prevent noise from tripping the circuit. C15 provides input filtration. R30 is a one megohm resistor providing positive feedback for hysteresis.
When U2A-1 is low, U2B- 7 is high, turning off Q3. When Q3 is off, the reset signal is pulled low by being pulled down through R27.
3 When power resumes, R25 and C13 form a delay in the 5 volt signal of about 100 milliseconds (RC time constant of 47 milliseconds). This makes sure that the +5 volt supply is up and stable before releasing the reset signal on the microprocessor. The U2B comparator has hysteresis feedback through R21 to prevent circuit toggling at the threshold trip point. The 2.5-volt reference is applied by R29 to U2B-5. C14 is used for power supply decoupling of U2. U2B is an open collector device, therefore R19 acts as a pull-up resistor. The 3.3-volt Zener, D10, prevents U2 from toggling Q3 when the +5 volt supply is not fully powered. Current limiting is provided by R22.
(g) PDI
1 The power down interrupt circuit function monitors the AC and DC power at the inputs to the system and gives the microcontroller a warning when the power has dropped below a certain level. That level is set by Zener diodes D4 and D5 for the AC input, and by Zener diodes D8 and D9 for the DC input. The diodes are in series to more finely adjust the trip point. The level is set so that the PDI signal goes high as the AC power voltage drops below 75 VAC and if the DC power input drops below 13 VDC.
2 U1A and U1B are comparators used to produce the PDI signal. If AC power is up, Q1 optocoupler is turned on at the peaks of the 400 Hz input voltage for every cycle.
This causes U1A-3 to be continually pulled low at each peak of the AC voltage by the optocoupler Q1. Every time U1A-3 pulls low, U1A-1 goes low and discharges C10.
3 After discharging, C10 starts to ramp up again, but is discharged again before exceeding the threshold of U1B. For the DC input circuit, Q2 is on if the DC voltage is greater than 13 VDC. This also causes U1A-1 to go low, discharging C10.
If the power supply is operating properly, U1B-5 is always lower than Pin 6, and the PDI output is low.
4 If the power drops below 75 VAC, or 13 VDC for the DC circuit, the optical couplers no longer are turned on. If Q1 and Q2 are off, U1A-3 is pulled up to +5 volts. U1A-3 is then higher than the reference on U1A-2 which is a 2.5 volt reference. The output of U1A-1 then ramps up until it is higher than the reference on U1B-6. This signal
is divided by R15 and R18 to 1.25 volts. If the power disappears, the voltage at U1B-5 will go higher than the voltage at U1B-6. The output of the PDI will than be high, providing a warning to the microcontroller.
5 R10 is a pull-up resistor for the open collector output. R13 provides local hysteresis for U1B. R12 provides overall circuit hysteresis which feeds back from the PDI output to U1A-3. Both R13 and R12 prevent toggling of the output when passing through the trip threshold.
6 The optocoupler is provided to keep the 115 VAC isolated from the digital
components. D6 is used to block the negative line voltage. The circuit only uses the positive side. D7 is a reverse diode across the diode in the optocoupler to protect it from excess reverse voltage. C7 is a filter across the optocouplers to help reject noise. The pull-up resistor for the optocouplers is R9.
(3) Power Supply Regulator CCA A2A1 (a) General
1 The A2A1 card provides the generation and regulation of +5, +12, 12, and +18 VDC for use in the SSCVR. Voltage regulation is accomplished by use of switching power supply regulators: U1, U2, U3, and U4.
2 Refer to Figure 2006 for the Power Supply Regulator CCA A2A1 schematic.
(b) +5 VDC
1 U1 provides +5 VDC from the +28 VDC input. The regulator is controlled by a feedback control signal generated across R4 and R5. The voltage is filtered through L1, C1 and C2. Transorbs D1 and D2 provide voltage spike protection. The output is isolated from high frequency noise by C17.
(c) +12 VDC
1 U2 provides +12 VDC from the +28 VDC input. The regulator is controlled by a feedback control signal generated across R8 and R9. The voltage is filtered through L2, C10 and C11. Transorbs D3 and D4 provide voltage spike protection. The output is isolated from high frequency noise by C18.
(d) 12 VDC
1 U3 provides 12 VDC power regulation. The feedback control signal is generated by U5 which senses the output 12 volts and scales and inverts the voltage signal to provide the necessary positive feedback signal. D8 protects the comparator from overvoltage on startup.
(e) +18 VDC
1 U4 and associated circuitry provides voltage for the microphone monitor. U4 steps the voltage to +18 VDC, which is then filtered by L4, C33, and C34. A current boost circuit is employed to keep the voltage of the output at 18 volts during intermittent high load demands. The output of the regulator is sensed at the positive input terminal of U6A. The negative terminal is set to 2.5 volts. The comparator controls the switching of Q1. Q1 allows the field of L4 to assist in maintaining the voltage of the regulator output.