RELAY DESCRIPTION
3. RELAY SOFTWARE
3.4 Protection and control software
The protection and control software task is responsible for processing all of the protection elements and measurement functions of the relay. To achieve this it has to communicate with both the system services software and the platform software as well as organise its own operations. The protection software has the highest priority of any of the software tasks in the relay in order to provide the fastest possible protection response. The protection &
control software has a supervisor task which controls the start-up of the task and deals with the exchange of messages between the task and the platform software.
3.4.1 Overview - protection and control scheduling
After initialisation at start-up, the protection and control task is suspended until there are sufficient samples available for it to process. The acquisition of samples is controlled by a
‘sampling function’ which is called by the system services software and takes each set of new samples from the input module and stores them in a two-cycle buffer. The protection and control software resumes execution when the number of unprocessed samples in the buffer reaches a certain number. For the P140 feeder protection relay, the protection task is executed twice per cycle, i.e. after every 12 samples for the sample rate of 24 samples per power cycle used by the relay. The protection and control software is suspended again when all of its processing on a set of samples is complete. This allows operations by other software tasks to take place.
3.4.2 Signal processing
The sampling function provides filtering of the digital input signals from the opto-isolators and frequency tracking of the analogue signals. The digital inputs are checked against their previous value over a period of half a cycle. Hence a change in the state of one of the inputs must be maintained over at least half a cycle before it is registered with the protection and control software.
FIR = Impulse Finite Response Filter SUB-SAMPLE
FIGURE 4 - SIGNAL ACQUISITION AND PROCESSING
The frequency tracking of the analogue input signals is achieved by a recursive Fourier algorithm which is applied to one of the input signals, and works by detecting a change in the measured signal’s phase angle. The calculated value of the frequency is used to modify the sample rate being used by the input module so as to achieve a constant sample rate of 24 samples per cycle of the power waveform. The value of the frequency is also stored for use by the protection and control task.
When the protection and control task is re-started by the sampling function, it calculates the Fourier components for the analogue signals. The Fourier components are calculated using a one-cycle, 24-sample Discrete Fourier Transform (DFT). The DFT is always calculated using the last cycle of samples from the 2-cycle buffer, i.e. the most recent data is used. The DFT used in this way extracts the power frequency fundamental component from the signal and produces the magnitude and phase angle of the fundamental in rectangular component format. The DFT provides an accurate measurement of the fundamental frequency component, and effective filtering of harmonic frequencies and noise. This performance is achieved in conjunction with the relay input module which provides hardware anti-alias filtering to attenuate frequencies above the half sample rate, and frequency tracking to maintain a sample rate of 24 samples per cycle. The Fourier components of the input current and voltage signals are stored in memory so that they can be accessed by all of the protection elements’ algorithms. The samples from the input module are also used in an unprocessed form by the disturbance recorder for waveform recording and to calculate true rms values of current, voltage and power for metering purposes.
3.4.3 Programmable scheme logic
The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure an individual protection scheme to suit their own particular application. This is achieved through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of the digital input signals from the opto-isolators on the input board, the outputs of the protection elements, e.g. protection starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic provides the relay’s standard protection schemes. The PSL itself consists of software logic gates and timers. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed duration on the output regardless of the length of the pulse on the input. The outputs of the PSL are the LEDs on the front panel of the relay and the output contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its inputs change, for example as a result of a change in one of the digital input signals or a trip output from a protection element. Also, only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time that is used by the PSL. The protection and control software updates the logic delay timers and checks for a change in the PSL input signals every time it runs.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, and because of this setting of the PSL is implemented through the PC support MiCOM S1.
3.4.4 Event and Fault Recording
A change in any digital input signal or protection element output signal causes an event record to be created. When this happens, the protection and control task sends a message to the supervisor task to indicate that an event is available to be processed and writes the event data to a fast buffer in SRAM which is controlled by the supervisor task. When the supervisor task receives either an event or fault record message, it instructs the platform software to create the appropriate log in battery backed-up SRAM. The operation of the record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This means that the protection software is not delayed waiting for the records to be logged by the platform software. However, in the rare case when a large number of records to be logged are created in a short period of time, it is possible that some will be lost if the supervisor’s buffer is full before the platform software is able to create a new log in battery backed-up SRAM. If this occurs then an event is logged to indicate this loss of information.
3.4.5 Disturbance recorder
The disturbance recorder operates as a separate task from the protection and control task. It can record the waveforms for up to 8 analogue channels and the values of up to 32 digital signals. The recording time is user selectable up to a maximum of 10 seconds. The disturbance recorder is supplied with data by the protection and control task once per cycle.
The disturbance recorder collates the data that it receives into the required length disturbance record. It attempts to limit the demands it places on memory space by saving the analogue data in compressed format whenever possible. This is done by detecting changes in the analogue input signals and compressing the recording of the waveform when it is in a steady-state condition. The compressed disturbance records can be decompressed by MiCOM S1 which can also store the data in COMTRADE format, thus allowing the use of other packages to view the recorded data.
3.4.6 Fault locator
The fault locator task is also separate from the protection and control task. The fault locator is invoked by the protection and control task when a fault is detected. The fault locator uses a 12-cycle buffer of the analogue input signals and returns the calculated location of the fault to the protection and control task wich includes it in the fault record for the fault. When the fault record is complete (i.e. includes the fault location), the protection and control task can send a message to the supervisor task to log the fault record.
4. DISTANCE ALGORITHMS
The operation is based on the combined use of two types of algorithms:
• "Deltas" algorithms using the superimposed current and voltage values that are characteristic of a fault. These are used for phase selection and directional determination. The fault distance calculation is performed by the "impedance measurement algorithms ” using Gauss-Seidel.
• "Conventional" algorithms using the impedance values measured while the fault occurs. These are also used for phase selection and directional determination.
The fault distance calculation is performed by the "impedance measurement algorithms." Using Gauss-Seidel.
The "Deltas" algorithms have priority over the "Conventional" algorithms if they have been started first. The latter are actuated only if "Deltas" algorithms have not been able to clear the fault within two cycles of its detection.
4.1 Distance and Resistance Measurement
MiCOM P44x distance protection is a full scheme distance relay. To measure the distance and apparent resistance of a fault, the following equation is solved on the loop with a fault:
(n).ZL
VL = local terminal relay voltage r = line resistance (ohm/mile)
current measured by the relay on the faulty phase current flowing into the fault from local terminal = current flowing into the fault from remote terminal = fault location (permile or km from relay to the fault)
current flowing in the fault (I + I')
For Phase to Ground Faults (ex., A-N), For Phase to Phase Faults (ex., A-B),
IF = 3I0 for 40ms, then IAafter 40 ms IF =IAB
Relay VR
D
= fault resistance
= apparent fault resistance at relay; R x (1 + I'/I) R
FIGURE 5 - DISTANCE AND FAULT RESISTANCE ESTIMATION
The impedance measurements are used by High Speed and Conventional Algorithms.
The following describes how to solve the above equation (determination of D fault distance and R fault resistance). The line model used will be the 3×3 matrix of the line impedance (resistive and inductive) of the three phases, and mutual values between phases.
Raa + jω Laa Rab + jω Lab Rac + jω Lac
X1 : positive sequence reactance X0 : zero-sequence reactance
The line model is obtained from the positive and zero-sequence impedance. The use of four different residual compensation factor settings is permitted on the relay, as follows:
kZ1: residual compensation factor used to calculate faults in zones 1 and 1X.
kZ2: residual compensation factor used to calculate faults in zone 2.
kZp: residual compensation factor used to calculate faults in zone p.
kZ3/4: residual compensation factor used to calculate faults in zones 3 and 4.
The solutions "Dfault " and "Rfault " are obtained by solving the system of equations (one equation per step of the calculation) using the Gauss Seidel method.
R fault (n) =
∑
Rfault and Dfault are computed for every sample (12 samples per cycle).
With IL equal to Iα+k0.3 x I0 for phase-to-earth loop or IL equal to Iαβ for phase-to-phase loop.
4.1.1 Phase-to-earth loop impedance
P3031ENa
VAVBVC
Zs
Zs iC
iA
Z1
Zs iB Z1
Z1
VCN VBN VAN kSZS k0Z1 RFault
Location of Distance Relay
R / Phase X / Phase
ZFault Z1
RFault / (1+k0)
FIGURE 6 - PHASE-TO-EARTH LOOP IMPEDANCE The impedance model for the phase-to-earth loop is :
VαN = Z1 x Dfault x (Iα + kO x 3 I0) + Rfault x Ifault with α = phase A, B or C
The model for the current IF circulating in the fault is (3 x I0) during the first 40 ms and then Iα.
The (3 x I0) current is used for the first 40 milliseconds to model the fault current, thus eliminating the load current before the circuit breakers are operated during the 40ms (one pole tripping). After the 40ms, the phase current is used.
VAN = Z1.Dfault.(IA+k0.3xI0)+Rfault.Ifault VBN = Z1.Dfault.(IB+k0.3xI0)+Rfault.Ifault VCN = Z1.Dfault.(IC+k0.3xI0)+Rfault.Ifault x 4 kO residual compensation factors
= 12 phase-to-earth loops are continuously monitored and computed for each samples.
VαN = Z1.Dfault.(Iα+ k0.3I0) + Rfault.Ifault
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.1.3 Phase-to-phase loop impedance
P3032ENa
FIGURE 7 - PHASE-TO-PHASE LOOP IMPEDANCE The impedance model for the phase-to-phase loop is :
Vαβ = ZL x Dfault x Iαβ + Rfault /2 x Ifault with αβ = phase AB, BC or CA
The model for the current Ifault circulating in the fault Iαβ. VAB = 2Z1.Dfault.IAB + Rfault.Ifault
VBC = 2Z1.Dfault.IBC + Rfault.Ifault VCA = 2Z1.Dfault.ICA + Rfault.Ifault
= 3 phase-to-phase loops are continuously monitored and computed for each sample.
Vαβ = 2Z1.Dfault.Iαβ + Rfault.Ifault Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.2 "Deltas" Algorithms
The patented high-speed algorithm has been proven with 10 years of service at all voltage levels from MV to EHV networks. The P440 relay has ultimate reliability of phase selection and directional decision far superior to standard distance techniques using superimposed algorithms. These algorithms or delta algorithms are based on transient components and they are used for the following functions:
Detection of the fault
By comparing the superimposed values to a threshold which is low enough to be crossed when a fault occurs and high enough not to be crossed during normal switching outside of the protected zones.
Establishing the fault direction
Only a fault can generate superimposed values; therefore, it is possible to determine direction by measuring the transit direction of the superimposed energy.
Phase selection
As the superimposed values no longer include the load currents, it is possible to make high-speed phase selection.
4.2.1 Fault Modelling
Consider a stable network status-the steady-state load flow prior to any start. When a fault occurs, a new network is established. If there is no other modification, the differences between the two networks (before and after the fault) are caused by the fault. The network after the fault is equivalent to the sum of the values of the status before the fault and the values characteristic of the fault. The fault acts as a source for the latter, and the sources act as passive impedance in this case.
Relay
Unfaulted Network (steady state prefault conditions)
VR IR
= Voltage at Relay Location Current at Relay Location
FIGURE 8 - PRE, FAULT AND FAULT INCEPTION VALUE Network Status Monitoring
The network status is monitored continuously to determine whether the "Deltas" algorithms may be used. To do so, the network must be "healthy," which is characterised by the following:
• The circuit breaker(s) should be closed just prior to fault inception (2 cycles of healthy pre-fault data should be stored) – the line is energised from one or both ends,
• The source characteristics should not change noticeably (there is no power swing or out-of-step detected).
• Power System Frequency is being measured and tracked (24 samples per cycle at 50 or 60Hz).
No fault is detected :
• all nominal phase voltages are between 70% and 130% of the nominal value.
• the residual voltage (3.V0) is less than 10% of the nominal value
• the residual current (3.I0) is less than 10% of the nominal value + 3.3% of the maximum load current flowing on the line
The measured loop impedance are outside the characteristic, when these requirements are fulfilled, the superimposed values are used to determine the fault inception (start), faulty phase selection and fault direction. The network is then said to be "healthy" before the fault occurrence.
4.2.2 Detecting a Transition
In order to detect a transition, the MiCOM P441, P442 and P444 compares sampled current and voltage values at the instant "t" with the values predicted from those stored in the memory one period and two periods earlier.
G
Time
P3034ENa
t-2T t-T t
T
2T
G(t-2T) G(t-T)
G(t)
Gp(t)
G = Current or Voltage
FIGURE 9 - TRANSITION DETECTION
Gp(t) = 2G(t-T) - G(t-2T) where Gp(t) are the predicted values of either the sampled current or voltage
A transition is detected on one of the current or voltage input values if the absolute value of (G(t) - Gp(t)) exceeds a threshold of 0.2 x IN (nominal current) or 0.1 x UN / √3 = 0.1x VN (nominal voltage)
With: U = line-to-line voltage
V = line-to-ground voltage = U / √3
G(t) = G(t) - Gp(t) is the transition value of the reading G.
The high-speed algorithms will be started if ∆U OR ∆I is detected on one sample.
Example: isolated AC fault
4.2.3 Confirmation
In order to eliminate the transitions generated by possible operations or by high frequencies, the transition detected over a succession of three sampled values is confirmed by checking for at least one loop for which the two following conditions are met:
• ∆ V > threshold V, where threshold V = 0.1 Un /√3 = 0.1 Vn and
• ∆ I > threshold l, where threshold I= 0.2 In.
The start-up of the high-speed algorithms will be confirmed if ∆U AND ∆I are detected on three consecutive samples.
4.2.4 Directional Decision
The "Delta" detection of the fault direction is determined from the sign of the energy per Phase for the transition values characterising the fault.
Relay
FIGURE 10 - DIRECTIONAL DETERMINATION USING SUPERIMPOSED VALUES To do this, the following sum per phase is calculated:
)
Where no is the instant at which the fault is detected, ni is the instant of the calculation and S is the calculated transition energy.
If the fault is in the forward direction, then S i <0 (i = A, B or C phase).
If the fault is in the reverse direction, then S i >0.
The directional criterion is valid if
S >5 x (10% x Vn x 20% x In x cos (85° ) This sum is calculated on five successive samples.
RCA angle of the delta algorithms is equal to 60° (-30°) if the protected line is not serie compensated (else RCA is equal to 0°).
4.2.5 Phase Selection
Phase selection is made on the basis of a comparison between the transition values for the derivatives of currents IA, IB and IC:
∆I'A, ∆I'B, ∆I'C, ∆I'AB, ∆I'BC, ∆I'CA
NOTE: The derivatives of the currents are used to eliminate the effects of the DC current component.
The phase selection is valid if the sum (SAB+SBC+SCA) is higher than a threshold. This sum is not valid if the positive sequence impedance on the source side is far higher than the zero sequence impedance. In this case, the conventional algorithms are used to select the faulted phase(s).
Sums on one-phase and two-phase loops are performed. The relative magnitudes of these sums determine the faulted phase(s).
For examples, assume :
If SAB<SBC<SCA and If SAB<<SBC, the fault has had little effect on the loop A to B. If SAN<SBN<SCN , the fault declared as single phase fault C.
If the fault is not detected as single-phase by the previous criterion, the fault conditions are multi-phase.
If SAN<SBN<SCN and If SAB<<SBC, the fault is B to C.
If SAN<SBN<SCN and If SAB•SBC•SCA and if SAN•SBN•SCN, the fault is three-phase (the fault occurs on the three phases).
4.2.6 Summary
A transition is detected if ∆I > 20% x In or ∆V >10% x Vn Then three tasks are starting in parallel:
• Fault confirmation : ∆I and ∆V (3 consecutive samples)
• Faulty phase selection (4 consecutive samples)
• Fault directional decision (5 consecutive samples)
Confirmation Phase selection Directional decision
P3036ENa
Start
FIGURE 11 - DELTAS ALGORITHMS
High speed algorithms are used only during the first 2 cycles following a fault detection.
4.3 "Conventional" Algorithms
These algorithms do not use the superimposed values but use the impedance values measured under fault conditions. They are based on fault distance and resistance measurements.
They are used in the following circumstances:
They are used in the following circumstances: