The control algorithm for the space/time switching fabric in Figure 69is implemented using the same concept used in the time only switching fabric in chapter 5. The switching fabric consists of two types of hardware components: 2x2 active switches and FDLs. Switches are labeled SW0 to SW4, Figure 69, while FDLs are labeled F DL0 to F DL3. The two space
input ports are labeled Xin
0 & X1in, while the space output ports are labeled X0out & X1out.
The main concept is to convert the switching fabric into binary matrices and perform ordinary binary operations. The sequence of operations is identical to the sequence of op- erations for the timeslot interchanger in chapter 5. The difference between both control algorithms is in the following concepts:
• Output Matrix: There are two space input ports and two space output ports in this fabric; each space input generates two consecutive two timeslots per frame. Hence, the total number of input channels = 2 x 2 = 4 channels.
tested to ensure the result is valid. One of the following output candidates is assigned to each frame during the initialization of the simulator:
– Timeslots are not switched in either time or space domain [0,0]. – Timeslots are switched in time but not space domain [1,0]. – Timeslots are not switched in time but in space domain [0,1]. – Timeslots are switched in both time and space domain [1,1].
The corresponding SWA matrix for the above output candidates is presented in Figure
70. The index of the first two columns correspond to the input timeslot index, while the values corresponds to the output timeslot index. The third column’s value corresponds to the output space index. Row indexes represent the SWA index. For instance, assuming that swa3 is assigned to f0 on X0in, from Figure70, S0in → S1out and S1in → S0out and both
are destined to space output Xout
1 .
Note that to maintain frame integrity, each frame is delayed by a duration of a frame, as discussed earlier in Chapter 4. Hence, when only space switching is required, each timeslot is also delayed by the duration of a frame. In addition, because channels are grouped into frames, when space switching is required, the entire frame exits the network at a single output port. Allowing timeslots to be switched independently adds more complexity to the control algorithm, thus it is left for future work.
• Paths Switching Control Matrices:
There are multiple of paths for each timeslot to follow in the space/time switching fabric. Each path depends mainly on the delay required and the output space for each timeslot. The available paths are grouped into three main categories based on the delay required to perform the time switching operation. Each one of these categories is divided into two subcategories based on whether the timeslot requires space switching or not. All paths are presented below based on the value of δ:
– δ = Tdur: A path falls under this category if the required delay for a timeslot is δ = Tdur. The total available paths to switch a timeslot from Sin
1 to S0out is four paths for each
space input. The SWC matrix for each space input depends on whether space switching is required or not, as discussed below:
Figure 70: A SWA matrix for <2,2> switching fabric with frame integirity
If no space switching is required: then an incoming timeslot from X0in can be delayed at one of the four FDL stages in Figure 69, and exits at the same output port Xout
0 . The SWC matrix that corresponds to this subcategory is found in the
top half matrix of Figure 82in Appendix E. Meanwhile, an incoming timeslot from
Xin
1 can be also delayed at one of the four FDL stages in the same figure and exits
the same space output port Xout
1 . The SWC matrix for that corresponds to this
subcategory is found in the top half matrix of Figure 83 in Appendix E. The total number of paths for Xin
0 without space switching is our, and four paths are available
for Xin
1 .
Space switching is required: then an incoming timeslot from Xin
0 can be delayed
at one of the four FDL stages in Figure 69 and exits at the opposite space output port Xout
1 . The SWC matrix that corresponds to this subcategory is found in the
bottom half matrix of Figure82. Meanwhile, an incoming timeslot from Xin
1 can also
be delayed at one of the four FDL stages in the same figure, but exits at the opposite space output port Xout
found in the bottom half matrix of Figure 83.
– δ = 2 ∗ Tdur: A path falls under this category if the required delay for a timeslot is
δ = 2 ∗ Tdur. The total available paths to switch a timeslot from S0in to S0out or S1in
to Sout
1 is six paths for each space input. The SWC matrix for each space input
depends on whether space switching is required or not, as discussed below: No space switching is required: then an incoming timeslot from Xin
0 can be
delayed at one of the following six combinations of FDL stages in Figure 69 and exits at the same output port Xout
0 : (i)FDL stage 0 and 1, (ii)FDL stage 0 and 2,
(iii)FDL stage 0 and 3, (iv)FDL stage 1 and 2, (v)FDL stage 1 and 3, (vi)FDL stage 2 and 3. The SWC matrix that corresponds to this subcategory is found in the top half matrix of Figure 84 in AppendixE. Meanwhile, an incoming timeslot from Xin
1
can also be delayed at one of the six combinations of FDL stages in the same figure and exits the same space output port Xout
1 . The SWC matrix that corresponds to
this subcategory is found in the top half matrix of Figure 85in Appendix E. Space switching is required: then an incoming timeslot from Xin
0 can be delayed
at one of the six combinations of FDL stages in Figure 69and exits at the opposite space output port Xout
1 . The SWC matrix that corresponds to this subcategory is
found in the bottom half matrix of Figure84. Meanwhile, an incoming timeslot from
Xin
1 can also be delayed at one of the six combinations of FDL stages in the same
figure, but exits at the opposite space output port X0out. The SWC matrix for that, corresponds to this subcategory found in the bottom half matrix of Figure 85. – δ = 3 ∗ Tdur: A path falls under this category if the required delay for a timeslot is
δ = 3 ∗ Tdur. The total available paths to switch a timeslot from S0in to S1out is
four paths for each space input. The SWC matrix for each space input depends on whether space switching is required or not, as discussed below:
No space switching is required: then an incoming timeslot from X0in can be delayed at one of the following four combinations of FDL stages in Figure69and exits at the same output port Xout
0 : (i)FDL stage 0,1,2, (ii)FDL stage {0,1,3}, (iii)FDL
stage {0,2,3}, (iv)FDL stage {1,2,3}. The SWC matrix that corresponds to this subcategory is found in the top half matrix of Figure 86in AppendixE. Meanwhile,
an incoming timeslot from Xin
1 can also be delayed at one of the four combinations
of FDL stages in the same figure and exits the same space output port Xout
1 . The
SWC matrix that corresponds to this subcategory is found in the top half matrix of Figure 87in Appendix E.
Space switching is required: then an incoming timeslot from Xin
0 can be delayed
at one of the four combinations of FDL stages in Figure 69and exits at the opposite space output port Xout
1 . The SWC matrix that corresponds to this subcategory is
found in the bottom half matrix of Figure86. Meanwhile, an incoming timeslot from
Xin
1 can also be delayed at one of the four combinations of FDL stages in the same
figure, but exits at the opposite space output port X0out. The SWC matrix for that, corresponds to this subcategory found in the bottom half matrix of Figure 87.
• Cumulative Delay Matrix: CDM is described in section 5.2.2. This fabric has its own CDM that is used to schedule SWC for the entire path. The complete CDM is presented in Appendix D. The matrix can be divided intro three parts: The first part represents the CDM for the four available paths for δ = 1 (rows 0 to 3). The second part represents the CDM for the six available paths for δ = 2 (rows 4 to 9). Lastly, the third part represents the CDM for the four available paths for δ = 3(rows 10 to 13).
In this study, the assumptions are identical to the onse used in the time only switching fabric in section 5.1. The only difference is in the number of timeslots per frame, where
S = 2 is used only.