T ABLE 45, D ECISION TABLE FOR MODULATION TYPES

State Ia: pos Ia: neg Ib: pos Ib: neg Ic: pos Ic: neg

5 Std B Std B Std B

4 Std A Std A Std A

3 Std Std Std Std Std Std

2 A Std A Std A Std

1 B Std B Std B Std

The yellow boxes on the left hand side indicate the output level of all states on that line (assuming correct state of NP voltage and FC voltages)

The white boxes indicate the states of the converter. The number of the state are numbered such that each bit corresponds with the state of an individual cell [c11 c12 c21 c22]. If a converter state is used twice in the state machine, the state gets an additional leading bit (e.g. states 7 and 23). Green connectors indicate transitions for all modulation types

Black connectors indicate transitions for standard modulation type Red connectors indicate transitions for modulation type A Blue connectors indicate transitions for modulation type B

Brown connectors indicate transitions for modulation type standard and A Purple connectors indicate transitions for modulation type A and B

Dotted cyan connectors indicate transitions used for transitions to other modulation level only

Figure 80 shows the complete state machine for three SMC modulation types. The states are numbered such that each bit corresponds with the state of an individual cell {c11 c12 c21 c22}. Any generic PWM modulator can be used for the determination of the output levels of the individual phases.

5.3.4

Experimental verification

For the experimental verification, 5-level SMC (operated at 100V, 15A) has been used. The prototype features current sensors in the neutral point to observe and / or control the NP currents and voltages. One phase leg is shown in Figure 81.

Figure 81, SMC phase leg (7-level, operated as 5-L)

5.3.4.1

Verification of NP currents

The NP current measurement is based on an H-bridge configuration to verify the NP currents in any given operating point (random voltage and current). One half bridge is operating as a voltage source in open loop. The other half bridge is controlling the current in the load (R-L load) in closed loop with a PID controller.

Experimental results for the NP current are shown in Figure 82. The operating point is chosen at αL=0.625. The NP current either corresponds with the output current or remains at zero.

Figure 82, Measured data: standard type (left), type A (middle) and type B (right), Ch1 (blue): phase current, Ch2 (red): NP current, Ch3 (green): output voltage

The NP currents in the whole operating range of the converter has been verified by measuring the NP current in selected operating points (Figure 83).

Figure 83, Calculated and measured NP currents in selected operating points (p.u. values)

There is a good match between experiment and theoretical characteristics.

5.3.4.2

Verification of NP control scheme

NP voltage control has been implemented with a hysteresis controller as presented in the previous chapter. A R-L load has been connected to the 3 phase SMC converter. The NP is not connected to any external source but is only controlled by the converter itself in this case.

Figure 84, Measured data: NP control (left: 40ms/div, right: zoom with 2ms/div), m = 0.8, Ch1 (blue): NP voltage, Ch2 (red): state, Ch3 (green): NP current, Ch4 (purple): phase voltage

Figure 84 shows the NP control in operation. An unbalance current in the DC link leads to a voltage rise during the time with standard modulation. Note that the difference in NP current is only visible in the indicated areas, as the modulation types only differ in the middle output voltage regions. Figure shows a similar case with reduced modulation index. The difference in NP current is clearly visible for the three half waves (three different modulation types) in the plot.

The DC link unbalance is generated with a static CM offset in this case (ca. 10% VDC), which is visible in the phase output voltage. The control method with modulation type can be combined with CM voltage variation without problems. This can either be used to improve NP control by using CM and modulation type variation together, or it can be used to introduce a CM voltage independently of the NP control (either for harmonic optimization or for CM voltage reduction on the motor for a reduction of the bearing currents).

(a) (b)

state 5 state 4 state 3

Figure 85, Measured data: NP control (2ms/div), m = 0.25 (Ch1 (blue): NP voltage, Ch2 (red): state, Ch3 (green): NP current, Ch4 (purple): phase voltage)

Std. A

5.4

Executive summary for chapter 5

A NP control scheme with constrained CM voltage based on the real-time NP current as a function of the CM voltage has been introduced. The control schemes is a significant improvement over unconstrained DC injection schemes, as it also works for reactive power and keeps CM excursions limited in the low modulation depth region. For the proportional feedback controller, the NP current function can be used in different ways. Specifically, different optimization criteria can be used for the definition of the CM voltage for zero NP voltage offset. A trade off between NP voltage ripple, switching losses and output voltage distortion is possible in a straightforward way.

A second scheme using DC and 6th _{harmonic CM injection has been presented. The 6}th harmonic injection is effective for reactive power operation, which corresponds with the region where unconstrained DC CM injection does not work anymore. A combination of constrained DC and 6th _{harmonic CM injection yields practically the same NP control capacity as the direct} application of the real time NP current function in a proportional feedback controller. This can easily be explained by the fact that both schemes use essentially the same limits for saturation of the CM signal in the controller.

Both schemes presented are suitable for any topology in the 3-L DC link family including the NPC. They have both been experimentally verified on the 5-L ANPC prototype.

The second part of the chapter presents topology specific modulation schemes making use of extra redundant states. Both ANPC 3 and SMC feature redundant states using flying capacitors from different partial MC converters (hidden underlying MC converters, upper and lower). These redundant states allow for changing the NP current characteristics on the phase leg level. Suitable CB PWM schemes have been developed to make use of those redundant states. The modulation schemes proposed for the ANPC 3 allow for a reduction of the NP current to 50% for zero output voltage (referenced to the NP). The modulation schemes for the SMC go even further and can reduce the NP current to zero for zero output voltage (see TABLE 82 in appendix 9.3).

A combination of different modulation schemes for the 3 phases is possible, as the output voltage per phase is not influenced; the different modulation schemes only make a different choice of redundant states. Such a combination enables powerful NP voltage control schemes totally independently from CM voltage. A hysteresis controller for the SMC has been developed and it has been demonstrated both in simulation and experiment that the NP current control capacity is significantly increased over standard NP control schemes as for example presented in the first part of the chapter (see also TABLE 85 in appendix 9.5.1).