Van der Pauw Structure

After which van der Pauw structures of 1x1 cm² were made with shadow masks to facilitate the processing steps while still being capable of making fairly accurate Hall measurements.

With this it was possible to deposit the bottom electrodes in the four corners, anneal the bottom electrodes in nitrogen for 30 s at 700^◦C. After which the P(VDF/TrFE) was deposited by the CSD technique and Au/Cr, 100/10 nm, electrodes were deposited by electron beam evaporation. The main benefit of using this scheme was that no etching process had to be done and no steps involved the use of acetone. The disadvantage of course being in the fact that the van der Pauw structure is not as ideal as the Hall bar structure for controlling the properties of the 2DEG.

C-V curves

The C-V curves shown in figure 7.14 show better retention characteristics than those measured on the capacitor structures in figure 7.13. In figure 7.14a is the C-V curve of the van der Pauw structure at 1 MHz, 40 V_DC for 0.5 s, and 0.1 V_AC. The memory window of this ferroelectric film is ∆V₁=9.25 V and ∆V₂=2.5 V. It is interesting here to see that in the return cycle of the hysteresis loop the capacitance does not return to its initial value indicating that there is some retention of the depleted state. Also it is possible to better deplete the 2DEG in the AlGaN heterostructure as the capacitance/area value decreases to 9.6^µF/m². In figure 7.14b the C-V curve on the same van der Pauw structure

7.4. P(VDF/TRFE) GATE 143

(a) (b)

Figure 7.14: C-V curves of a 1x1 cm² van der Pauw structure of Au/Cr/P(VDF/TrFE)/AlGaN. Per-formed a) at 1 MHz, 40 V_DC for 0.5 s and 0.1 V_AC and b) at 1 MHz, 20 V_DCfor 0.5 s and 0.01 VAC.

is measured at 1 MHz with 20 V_DC applied for 0.5 s and 0.01 V_AC. The memory window of this ferroelectric film is ∆V=2.5 V, what is interesting here is that it was possible to apply positive DC biases without injecting charge due the high frequency and low AC modulation voltage.

Transport Measurements

Hall measurements were done with this same large, 1x1 cm², van der Pauw structure applying a current of 1 mA. Measurements were done only at room temperature due to issues regarding the electrical contact to the five electrodes and the fixation of the sample to the support. The Hall measurements were done immediately after applying a DC voltage from −30 V to +30 V for a duration of approximately 5 s.

A summary of the most important results is in table 7.7, where the values of the R_s, n_s and µ are given for the extreme poling voltages. F, the form factor is also included as it gives an indication of the symmetry and accuracy of the measurement. In the case of a perfect measurement, or symmetric measurement the form factor should equal one, if the form factor is close to zero the measurement is unreliable. The main change in transport properties occurs when going from 0 V to −30 V. The result of applying this −30 V DC voltage occurs with an increase of R_s by a factor 3.04, a decrease of n_s by a factor 1.91 and a decrease of µ by a factor 1.85.

More details can be found in the graphs of the R_s in figure 7.15, n_s in figure 7.16a, and µ in figure 7.16b. What is very interesting to remark is how all of these curves exhibit retention-like behavior. This is similar to the ferroelectric hysteresis loop that possess both a positive and negative remanent polarisation occurring on the up and down cycling of the DC bias field. This concept can be visualised in figure 7.15 where the R_s is changing from 339^Ω/ to 661^Ω/. In figure 7.16a the ns is changing from 6.5x1012 electrons/cm² to 1.02x1013 electrons/cm². In figure 7.16b the µ is changing from 1570^cm2/Vsto 1750^cm2/Vs. From these curves it is possible to observe that there is retention occurring in this ferro-electric/semiconductor structure, however it is not the long term retention, necessary for

144 CHAPTER 7. FERROELECTRIC GATE OPERATION

Table 7.7: Sheet resistance, mobility and concentration of electrons in the 2DEG of the P(VDF/TrFE)/AlGaN/GaN structure, for as-deposited P(VDF/TrFE), poled with −30 V to the top electrode, poled back with 0 V, poled again with +30 V and finally with 0 V.

V_DC F R_s n_s µ

[Volts] [Ω/] [electrons/cm²] [cm²/Vs]

0 0.999 339 1.02x10¹³ 1810

-30 0.944 852 6.40x10¹² 1140

0 0.985 611 6.50x10¹² 1570

30 1 351 1.02x10¹³ 1740

0 0.998 312 1.15x10¹³ 1750

Figure 7.15: Sheet resistance from the Hall measurements after having applied a gate voltage varying from ±30 V.

FeFET devices. This is confirmed in one measurement in the figures 7.15, 7.16a and b which was done after a larger delay from the application of the DC voltage. After apply-ing +4 V, more time than usual was taken to measure the transport properties, which is visible by the sharp peaks in all three curves.

This same sample underwent, at a later time, simple sheet resistance measurements as a function of DC voltage and retention time using the van der Pauw structure by using the equations and constraints listed from equation 3.5 to 3.10, listed in chapter 3 of this thesis. The first measurement of the sheet resistance was measured as 332^Ω/, which is an accurate measurement of the 2DEG, the same as when using Hall measurements. When measuring a Hall bar structure without any ferroelectric layer and with the Ti/Al/Ti/Au annealed bottom electrodes the sheet resistance of the 2DEG in the AlGaN heterostructure was measured to be 430^Ω/. Therefore, first and foremost the sheet resistance values measured here are found to be reliable.

The DC bias voltage was thus applied to the Cr/Au gate electrode but only in the negative direction, since measurements were unstable when applying positive DC biases possible due to charge injection. 5 min after the DC voltage was applied the sheet resistance was measured, the results of which are shown in figure 7.17. The sheet resistance increases from 332^Ω/ in the as deposited state to over 600^Ω/ after applying −120 V. The retention of this sheet resistance after applying a gate voltage of −180 V was measured and is shown in table 7.8. After 75 min the sheet resistance decreased down to 375^Ω/, and after a

7.4. P(VDF/TRFE) GATE 145

(a) (b)

Figure 7.16: a) Electron sheet concentration and b) mobility from the Hall measurements after having applied a gate voltage varying from ±30 V.

Figure 7.17: Van der Pauw measurements of the sheet resistance taken 5 min after the DC voltage was applied.

couple of hours the sheet resistance had relaxed to its initial value.

Although this sample shows a decrease of the sheet resistance by a factor three when neg-atively poling the P(VDF/TrFE) layer there is no long term retention of this modulation.

It is interesting still to process a Hall bar structure to observe if the effect is similar or not. Hall measurements are usually preferred to simple sheet resistance measurements, since more information is obtained about the electrons in the 2DEG.