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HEXAPOD CONTROLLER USING MICROPROCESSOR CORE IN FPGA

IZZAT AKMAL BIN SHARIFF

This Report Is Submitted In Partial Fulfilment of Requirements For The Bachelor Degree in Electronic Engineering (Computer Engineering)

Faculty of Electronic Engineering (Computer Engineering) Universiti Teknikal Malaysia Melaka

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KOMPUTER

BORANG PENGESAHAN STATUS LAPORAN

PROJEK SARJANA MUDA II

Tajuk Projek : ……….

Sesi Pengajian : 1 3 / 1 4

Saya ……….. (HURUF BESAR)

Mengaku membenarkan Laporan Projek Sarjana Muda ini disimpan di Perpustakaan dengan syarat-syarat kegunaan seperti berikut:

1. Laporana dalah hak milik Universiti Teknikal Malaysia Melaka.

2. Perpustakaan dibenarkan membuat salinan untuk tujuan pengajian sahaja.

3. Perpustakaan dibenarkan membuat salinan laporan ini sebagai bahan pertukaran antara institusi pengajian tinggi.

4. Sila tandakan ( ) :

SULIT* *(Mengandungi maklumat yang berdarjah keselamatan ataukepentingan Malaysia seperti yang termaktub di dalam AKTA RAHSIA RASMI 1972)

TERHAD** **(Mengandungi maklumat terhad yang telah ditentukan oleh organisasi/badan di mana penyelidikan dijalankan)

TIDAK TERHAD

Disahkan oleh:

___________________________ (TANDATANGAN PENULIS)

__________________________________ (COP DAN TANDATANGAN PENYELIA)

Tarikh: ……….. Tarikh: ………..

*CATATAN :Jika laporan ini SULIT atau TERHAD, sila lampirkan surat daripada pihak berkuasa/organisasi berkenaan dengan menyatakan sekali tempoh laporan ini perlu dikelaskan sebagai SULIT atau TERHAD.

HEXAPOD CONTROLLER USING MICROPROCESSOR CORE IN FPGA

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i

“I admit this report is the result of my own work except the summary and excerpts of each of each of them that I have explained the source.”

Signature : ………

Author : ………...

(4)

“I / We hereby declare that I have read this in my / our work is adequate in terms of scope and quality for the award of Bachelor of Electronic Engineering (Computer

Engineering).”

Signature : ………

Author : ………...

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iii

En Sani

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ACKNOWLEDGEMENT

Praise be to Allah, His grace, I have been able to implement this project with the

good I want to take this opportunity to extend my appreciation to everyone who has

helped me throughout my implement this project. I express my gratitude and hope

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v

ABSTRACT

The design and implementation of the soft-core processor in FPGA is

developed to control Hexapod robot. In many applications, the soft-core processors

provide several advantages over the custom designed processors such as reduced

cost, flexibility, platform independence and greater immunity to obsolescence, but

the main reason of implementing soft-core processor in FPGA for this project is to

provide an option in modifying the I/O layout and the internal architecture without

replacing the microcontroller board. The conventional microcontroller in Hexapod

controller is too rigid and lack of flexibility when dealing with expansion and

modification of Hexapod robot. Firstly, this project will determine the Hexapod robot

movement by using gait analysis and analyze the optimum movement positioning of

each servo motor. Then to control algorithm is incorporated into the processor

program which is executed in FPGA. After that, this project will go through with

designing 8-bit RISC processor. The obtain data will convert into a program code by

using Xilinx software then it will implement into FPGA chip. The implementation of

algorithms in soft-core processor offered better synchronization between the entire

servomotor movements. A programming method of the soft-core is exactly the same

with the conventional processor although it offered flexibility in extending the

processor architecture to accommodate new input and output or other features. The

significant implication of this project by combining the best of both worlds between

microcontroller advantages in executing an instruction sequence efficiently and

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ABSTRAK

Projek ini memberi tumpuan kepada rekabentuk dan pelaksanaan pemproses

lembut teras dalam FPGA untuk mengawal hexapod robot. Dalam banyak aplikasi,

pemproses lembut-teras menyediakan beberapa kelebihan pada rekaan pemproses

seperti mengurangkan kos, fleksibiliti, platform bebas dan imuniti yang lebih besar

kepada ketinggalan dari teknologi, tetapi sebab utama projek ini adalah pemproses

lembut teras dalam FPGA akan menyediakan pilihan dalam mengubah suai susun

atur I / O dan seni bina dalaman tanpa menggantikan papan mikropengawal, kerana

pengawal mikro konvensional dalam pengawal hexapod terlalu sukar dan

kekurangan fleksibiliti apabila berurusan dengan penambah baikan dan

pengubahsuaian hexapod robot. Pertama, projek ini bermula dengan menentukan

bagaimana robot hexapod ini akan bergerak, dengan menggunakan analisis gaya

berjalan, gaya berjalan hexapod itu dikenalpasti dan dianalisa bagi menentukan

pergerakan yang optimum dan kedudukan setiap motor servo. Kemudian untuk

mengawal algoritma digabungkan untuk program pemproses yang dilaksanakan

dalam FPGA. Selepas itu, projek ini akan melalui dengan mereka bentuk 8-bit RISC

pemproses. Data yang telah diperolehi akan ditukar kepada kod program dengan

menggunakan perisian Xilinx maka ia akan dimasukkan ke dalam cip FPGA.

Pelaksanaan algoritma dalam pemproses lembut-teras menawarkan penyegerakan

yang lebih baik antara keseluruhan pergerakan motor servo. Kaedah pengaturcaraan

lembut-teras adalah sama dengan pemproses konvensional walaupun ia menawarkan

fleksibiliti dalam melanjutkan seni bina pemproses untuk menampung input baru dan

output atau ciri-ciri lain. Implikasi di dalam projek ini dengan menggabungkan yang

terbaik daripada kedua-dua dunia antara kelebihan pengawal mikro dalam

melaksanakan arahan urutan dengan cekap dan menyusun semula ciri-ciri dalam

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vii

TABLE OF CONTENTS

CHAPTER TITLE PAGE

PROJECT TITLE i

REPORT AUTHORIZATION FORM ii

DECLARATION iii

SUPERVISOR’S DECLARATION iv

DEDICATION v

ACKNWOLEDGEMENT vi

ABSTRACT vii

ABSTRAK viii

TABLE OF CONTENTS ix

LIST OF TABLE xi

LIST OF FIGURES xii

ABRIVIATIONS xiii

CHAPTER I --- 1

1.1 Project Summary... 1

1.1.1 Project introduction... 2

1.2 Introduction ... 3

CHAPTER II --- 4

2.1 Introduction ... 4

2.2 Soft-core processor... 5

2.2.1 Why design with a soft-core ... 5

2.3 Gait analysis... 6

2.3.1 Tripod gait... 7

2.3.2 Crab ... 8

2.3.3 Pentapod... 8

CHAPTER III --- 9

3.1 Project overview ... 9

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3.1.2 Stand up... 11

3.1.3 Move forward... 13

3.1.4 Soft-Core Processor ... 17

3.1.5 Architecture... 17

3.1.6 Main CPU modules... 19

3.2 Hardware specification ... 20

3.3 FPGA design and implementation... 20

3.4 Servo motor movement ... 22

CHAPTER IV ---23

4.1 Introduction ... 23

4.2 Result ... 23

4.2.1 Servo motor movement calculation. ... 23

4.2.2 Tripod movement ... 24

4.2.3 Tripod gait explanation ... 30

4.2.4 FSM Moore model ... 31

4.2.5 Simulations... 32

4.2.6 Rtl top module... 33

4.2.7 The Soft-Core Processor ... 35

4.2.8 RTL RISC ... 36

4.3 Discussion... 37

4.3.1 Tripod... 37

4.3.2 Soft-Core Processor ... 38

4.3.3 Hardware design ... 38

4.3.4 Low power issues... 38

CHAPTER V ---40

5.1 Conclusion... 40

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ix

LIST OF TABLES

NO. TITLE PAGES

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TABLE OF FIGURES

NO. TITLE PAGES

Figure 1: Tripod gait ... 7

Figure 2: Flow chart of this project ... 10

Figure 3: the starting position of robot... 11

Figure 4: All legs move upward to expand ... 12

Figure 5: The A, C, D and F legs move to make a tripod formation ... 12

Figure 6: All legs move to downwards for stand up position ... 13

Figure 7: Legs A, C and E move upward to make their first move ... 13

Figure 8: Legs A, C and E move to front ... 14

Figure 9: Legs A, C and E move downward to let other legs move ... 14

Figure 10: Legs B, D and F move upward ... 15

Figure 11: Motor 3 in legs A, C and E moving to push robot move to front ... 15

Figure 12: Legs B, D and F move to the next move get a step for next move... 16

Figure 13: Legs B, D and F move downward to let other legs make movements ... 16

Figure 14: MCU Module... 17

Figure 15: MCU Basic Architecture ... 18

Figure 16: CPU Block Diagram ... 19

Figure 17: Hexapod robot...20

Figure 18: Spartan-3 FPGA chip in Papilio One Board...21

Figure 19: The first move on insect legs...25

Figure 20: The second move on insect legs...26

Figure 21: The tripod robot legs perform a reset formation...26

Figure 22: The tripod robot legs perform a standing formation...27

Figure 23: The servo motors A2, A3, C2, C3, E2 and E3 move to lift leg A, C and E....27

Figure 24: The servo motors A1, C1, E1 move forward while B1, D1 and F1 move backwards...28

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xi

Figure 26: The servo motors A1, C1, E1 move backward while B1, D1 and F1 move

forwards...29

Figure 27: Servo motors A2, A3, C2, C3, E2, E3 lift the leg while B2, B3, D2, D3, F2, F3 stepping to the floor... ...29

Figure 28: FSM Moore model...32

Figure 29: Simulation of Verilog code...33

Figure 30: The RTL diagram of Top module...34

Figure 31: The connection between Top module and servo motors...34

Figure 32: Block diagram of Hexapod controller...36

Figure 33: RTL diagram of RISC...37

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[image:14.595.108.534.174.466.2]

ABBREVIATIONS

Table 1: table of Abbreviations

TITLE MEANING

FPGA Field Programming Gate Array

HDL Hardware Description Language

CPU Central Processing Unit

PLD Programmable Logic Device

ASIC Application Specific Integrated Circuit SoPc System on a Programmable Chip Builder RISC Reduce Instruction Set Computing

ROM Random Access Memory

ALU Arithmetic Logic Unit

JTAG Joint Test Action Group

SRAM Static Random Access Memory

USB Universal Serial Bus

PWM Pulse width Modulation

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____________________________________________________________________

CHAPTER I

INTRODUCTION

____________________________________________________________________

1.1 Project Summary

A soft-core processor is a hardware description language (HDL) model of a

specific processor (CPU) that can be customized for a given application and

synthesized for FPGA target. In many applications, soft-core processors provide

several advantages over custom designed processors such as reduced cost. Because

this soft-core processor no need to going through the fabrication process, means, this

soft-core processor not using special and expensive machinery to produce this type

of processor at all. Because of this soft-core processor is fully design in Verilog

code, this soft-core processor give more flexibility in terms of expending the system.

Soft-core processor is platform independence and greater immunity to obsolescence.

This project will design and implement a Hexapod controller using a

soft-core processor in FPGA platform, because the conventional Hexapod controllers use

discrete microcontroller. So then there is no room for system expansion in order for it

to be upgraded and modified. As example, in future if this system need to used more

servo motor or need to used a sensors, designer only need to add some line of code in

the Verilog code to make the soft-core processor is suitable with the new system. By

the implementation of a soft-core processor in reconfigurable platforms such as

FPGA, it will provide an option in modifying the I/O layout and the internal

architecture without replacing the microcontroller board.

This project will also analyze and establish Hexapod movement mechanism

using gait analysis. Gait analysis is the systematic study of animal locomotion, more

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augmented by instrumentation for measuring body movements, body mechanics, and

the activity of the muscles. Gait analysis is used to assess, plan, and treat individuals

with conditions affecting their ability to walk. It is also commonly used in sports

biomechanics to help athletes run more efficiently and to identify posture-related or

movement-related problems in people with injuries.

By developing a Hexapod controller based on soft core processor whereby

the Hexapod’s gait algorithm is programmed in the processor core and will be

implemented in a Spartan-6 FPGA chip with the multiple I/O interface, the system

will able to control all the 18 servo motors with 3 servos are allocated for each leg.

The Hexapod is also capable to perform basic movement such as stand up, move

forward and backward on a flat surface.

At the end of this project the microprocessor in FPGA will work smoothly

with zero error and we can get a precise movement of control for all servo motors.

1.1.1 Project introduction

This project will design a soft-core processor that will implement in FPGA

platform to controlling the movement of hexapod robot. Besides that this project also

create a complex movement of the hexapod robot using the gait analysis.

This hexapod robot will perform a tripod gait movement. The tripod gait

movement involved a multiple of servo motor movement in a single step, this tripod

gait movements give a challenge how to organize the leg of hexapod robot move

smoothly and precise.

In many applications, soft-core processors provide several advantages over

custom designed processors such as reduced cost, flexibility, platform independence

and greater immunity to obsolescence.

After succeeding implement the soft-core in FPGA, this project will use a

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3

Hexapod. So the servo motors can give natural and precise movements and it will

provide an option in modifying the I/O layout and the internal architecture without

replacing the microcontroller board.

1.2 Introduction

Since their emergence in the mid-1980s, Field Programmable Gate Arrays

(FPGAs) have become a popular choice for prototyping and production of products

in small to moderate quantities. An FPGA is a special kind of Programmable Logic

Device (PLD) that allows implementation of general digital circuits, limited only by

the circuit size. The circuit to be implemented is defined by programming the device.

Over the years, the capabilities of FPGA devices have grown to the level where a

complete multiprocessor system can fit on a single device.

A soft-core processor is a microprocessor fully described in software, usually

in an HDL, which can be synthesized in programmable hardware, such as FPGAs. A

soft-core processor targeting FPGAs is flexible because its parameters can be

changed at anytime by reprogramming the device. Traditionally, systems have been

built using general-purpose processors implemented as Application Specific

Integrated Circuits (ASIC), placed on printed circuit boards that may have included

FPGAs if flexible user logic was required. Using soft-core processors, such systems

can be integrated on a single FPGA chip, assuming that the soft-core processor

provides adequate performance. Recently, two commercial soft-core processors have

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CHAPTER II

LITERATURE REVIEW

____________________________________________________________________

2.1 Introduction

Several research projects have been carried out using the Hexapod robots as

main platform is to test and verify various control algorithms. Most of these projects

use the microcontroller as the brain of their system. The type of microcontrollers

used are another-RISC architecture [1, 2], and Motorola microcontroller

(MC9S12E64) [3]. There is also a controller that has been developed based on HDL

and advanced analogue and mixed-signal (AMS) in which the simulation results are

carried out based architecture 68HC12 microcontroller [4].

Hexapod robotic system implementation recently will use the FPGA platform.

The FPGA is used to integrate the various modules in the Hexapod escort FPGA

fabric [5] and to implement real-time algorithm escort [6]. The FPGA also performed

as a processing medium to the main guardian of the Hexapod system that included

cruise function [7].

On the mode of operation, the movement of some kind which is used in robot

Hexapod, which is the tripod gait, gait and gait wave ripples. Based on some research

Tripod gaits preferred because it is more stable and better performance on Hexapod

robot [8, 9]. Tripod gait is essentially a mechanism in which the Hexapod legs

operated as two tripods. In every movement, just three feet Hexapod that reaching

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5

2.2 Soft-core processor

Soft-core processors on field-programmable gate arrays (FPGAs) are an

increasingly popular software implementation option in embedded computing

systems. A soft-core FPGA processor is a synthesizable processor mapped onto the

FPGA fabric, in contrast to a hard-core processor that is laid out next to the FPGA

fabric. FPGA vendors tailor synthesizable processors, such as the Xilinx MicroBlaze

or the Altera Nios, for FPGA implementation, resulting in processors having less size

and performance overhead than a general synthesizable processor mapped to an

FPGA [12] [13].

Soft-core, as well as hard-core processors on FPGAs enable reductions in

system device counts by co-existing with custom processing circuits and glue logic

on a single device. Soft-core processors possess an additional advantage of being

realizable on general-purpose FPGA devices, with those devices typically being

lower cost than devices with hard cores due to mass production and hence economy

of scale

2.2.1 Why design with a soft-core

There are many reasons to choose a soft-core processor for other processing.

The first reason is the processor type provides a large amount of flexibility through

the configurable nature of the FPGA.

In the process of developing appropriate products, all requirements are

gathered and set before the design of the project ever started. By engineers want this

to happen, this seldom happens. Requirements often change during the course of the

design and, in most cases, the need increased. In addition, the requirements are still

being defined in the research and development situations.

Using soft-core processors can reduce a lot of the issues posed by the

changing needs that could affect the project if using discrete microprocessor

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a specific set of peripherals that may no longer fit the application requirements

change or new features that are required.

Soft-core processors allow designers to add or reduce hardware from SoPC

easily. In many toolsets, add and configure peripherals are usually done in a few

short steps. Not only a simple addition of peripherals can be done, but there are a

variety of peripherals are available from vendors

List of equipment, including memory controllers, timers, counter, blocks

GPIO, UARTs (Universal Asynchronous Receiver Transmitter), and interconnects

such as PCI, RapidlO, and HyperTransport. This list is constantly growing, giving

designers a lot of options to build a SoPC. Peripheral and soft-core processors are

designed in HDL (Hardware Description Language), allowing further customization

of the system to be carried out.

2.3 Gait analysis

Gait analysis is the systematic study of animal locomotion, more specific as a

study of human motion, using the eye and the brain of observers, augmented by

instrumentation for measuring body movements, body mechanics, and the activity of

the muscles. Gait analysis is used to assess, plan, and treat individuals with condition

affecting their ability to walk. It is also commonly used in sports biomechanics to

help athletes run more efficiently and to identify posture-related or movement-related

problems in people with injuries.

This refers to the mechanism responsible for controlling leg step transitions

(stance and swing) to assure that the Hexapod robot will not tumble. Most

approaches try to replicate known insect gaits. However, other approaches have been

used to find stable gaits. For instance, by running genetic algorithms or optimizing

energy cost function. Basically the movement of the Hexapod is liked human prone

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7

There is an example of Hexapod locomotion which is:

 Tripod.

 Crab.

 Pentapod

2.3.1 Tripod gait

Inspired by the insect world, Hexapods (six legged robots) provide an

inherently stable platform that can be both easy to implement and efficient in

operation. The overall stability of the Hexapod comes from its ability to establish a

gait (walking pattern) in which at least three legs are on the ground at any time. The

three legs will form a tripod with properties similar to a camera tripod or a

three-legged stool - the robot will be stable as long as its centre of gravity falls within the

[image:21.595.113.517.414.590.2]

support zone defined by the feet that are currently planted.

Figure 1: Tripod gait

The most basic Hexapod walking pattern is called tripod gait. In this gait, the

six legs are treated in two groups of three. Either group of three is a tripod formed by

the front and rear legs on one side, and the middle leg of the opposite side. The three

component legs of each tripod are moved as a unit. As three tripods are lifted, the

other three tripods push forward. In this gait, it can be helpful to think of each tripod

as a foot and compare it to your own bipedal walking where as one foot is lifted the

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2.3.2 Crab

In this gait, the six legs also treated in two groups of three. Either group of

three is a tripod formed by the front and rear legs on one side, and the middle leg of

the opposite side. The three component legs of each tripod are moved as a unit. But

for this gait, the movement is in a different way which is it going to the right side or

left side. Just like how the crabs were moving. As one tripod is lifted, the other tripod

pushes left or right.

2.3.3 Pentapod

In this gait, it just moves one leg at the time. For example, leg “A” move

forward while the other leg waits for their turn to move. The stability of this kind of

locomotion is still at the highest level because when the only one leg is lifted, there

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____________________________________________________________________

CHAPTER III

METHODOLOGY

____________________________________________________________________

3.1 Project overview

The initial step to determine the hexapod robot movements is by using gait

analysis so that the movement is using the most suitable gait pattern. Then this

project will go through with 8-bit RISC processor design. All the data collected, it

will be transformed to the Verilog code. It will implement to the FPGA chip. If any

errors occur, the Verilog code will redesign the 8-bit RISC processor design, if this

project running smoothly, the whole system will be analyzed if any part can be

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[image:24.595.123.548.63.419.2]

Figure 2: Flow chart of this project

3.1.1 Gait analysis

This robot has six legs, which were labelled as leg A, leg B, Leg C, leg D, leg

E and leg F. And each leg has 3 servo motors that have been labelled to as the motor

1, motor 2 and motor 3.

At the beginning, this robot will be in the contract, or in the star position. The

first movement of this robot to walk is to alienate all the legs to form a tripod

formation, to mindfully stretches, motor 1 and motor 2 on all legs need to move.

After mindfully stretches, leg A, C, D and F only move using motor 3 on each leg.

Next, the motor 1 and motor 2 on each leg will move to allow the robot to stand as

shown in Figure 3.

This robot uses the tripod gait to walk where the legs are affected in a

Figure

Table 1: table of Abbreviations
Figure 1: Tripod gait
Figure 2: Flow chart of this project

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