3. Gradual Channel Approximation
A transistor is an electronic switch. The conductance of the connection between two terminals (source and drain / collector and emitter) can be modulated by the voltage applied to the third terminal (gate / base). The concept of a transistor was originally submitted as a patent by Lilienfeld in the late 1920’s,1 and first demonstrated experimentally by Bardeen, Brattain, and Shockley in 1949.2 Traditional transistors can be broadly classified as either bipolar junction transistors (BJTs) or field-effect transistors (FETs). Thin film transistors (TFTs) are a subset of the latter. While in the traditional (inorganic crystalline) semiconductor community a range of symbols are used to depict different types of FETs, in the disordered semiconductor community the symbol shown in Figure 3.1(a) tends to be used for most FETs. In the TFT community, the abbreviations FET and TFT are often used interchangeably; e.g. organic field effect transistor (OFET) and organic thin film transistor (OTFT) are synonyms. Figure 3.1(b) shows a cross sectional diagram of a TFT. Thin-film transistors are so named, not because of the absolute thickness of the device layers (which are generally thicker than the layers used in FETs used in traditional integrated circuits3), but because of the thickness of the layers relative to their width. Schematic diagrams of TFTs such as Figure 3.1(b) are misleading because they are
decidedly not to scale: typically, the vertical thickness of layers are 10-100 nm, while the separation of electrodes are 10-100 μm.
Figure 3.1 (a) Circuit symbol for thin-film transistor (TFT). (b) Cross sectional diagram of a bottom-gate bottom- contact (BGBC) TFT. Note: this diagram is not to scale. (c) Simple energy (𝐸) diagram of interface between semiconductor and source / drain electrodes, illustrating how energetic alignment affects the ability of electrons (e-) and holes (h+) to be injected and transported in TFTs.
Unlike metal-oxide field effect transistors (MOSFETs) used in CMOS, which are typically inversion-mode devices,4 TFTs normally operate in accumulation-mode. This means that upon application of an appropriate gate voltage, electrons will be attracted into the channel in n-type semiconductors, and holes will be attracted into the channel in p-type semiconductors. We will see later
(b)
Substrate Dielectric
Source / Drain Electrodes
Gate Electrode Semiconductor (a)
Gate
Drain
Source
Semiconductor
Conduction BandValence Band
Electrodes
(c) 𝐸
e-
h+
Position
~10 – 100 nm
~10 – 100 μm
that the way in which the TFT community defines a p-type or n-type semiconductor is also dissimilar to the conventions used in the traditional device literature.
3.1. Operating Principles
The operation of a TFT relies upon the use of an intrinsic (or close to intrinsic) semiconductor as the active material; that is a material which has a low concentration of free electrons and holes in equilibrium. With a low carrier concentration, the semiconducting channel between the source and drain electrodes is highly insulating, and the TFT can be considered in the off-state. By convention we refer to the terminal that is grounded as the source. By applying a voltage 𝑉𝐺, to the gate terminal a potential gradient is established between the source electrode and the gate electrode. If the energetic barrier between the metallic source electrode and the relevant semiconductor energy band is sufficiently low, charges can be then be injected from the grounded source terminal into the semiconductor (see Figure 3.1(c)). The charge injected will be of the opposite sign to 𝑉𝐺: a positive 𝑉𝐺 will inject negatively charged electrons into a n-type semiconductor, a negative 𝑉𝐺 will inject positively charged holes into a p-type semiconductor.
We can quantify the induced charge density by approximating the gate electrode and semiconductor as two plates in a parallel plate capacitor. If we define the dielectric medium between the two plates as having a capacitance per unit area of 𝐶𝑖 (units of e.g. F/cm2) and the areal charge density in the semiconductor to be 𝑄 (units of e.g. C/cm2), we can define the induced charge density for a certain applied gate voltage via Equation 3.1:
𝑄 = 𝐶𝑖𝑉𝐺 (3.1)
Sometimes the parameter 𝐶𝑖 is given as 𝐶𝑜𝑥 (𝑖 for insulator, 𝑜𝑥 for oxide). It is important to note that by invoking Equation 3.1, we have implicitly described the gate electrode and semiconductor as infinite sheets of charge (and subsequently solved Gauss’ Law for these infinite planes). Since the lateral device dimensions are large relative to the vertical device dimensions (see Figure 3(b)), this is a reasonable approximation for conventional, flat, TFTs, however this assumption will be violated if device areas becomes smaller and/or curvature becomes extreme.
Upon application of a voltage between the source and drain electrodes (𝑉𝐷) these injected charges will the attracted from the source, and a current will flow. The current that flows between the source and drain terminals is called either the source-drain current (𝐼𝐷𝑆) or just the drain current (𝐼𝐷)
for short. In real devices, there a few complications that modify the required 𝑉𝐺 for charge injection: (1) upon application of 𝑉𝐺 some injected charge carriers will fill unoccupied trap states and become immobile, (2) some already-trapped charge carriers will be released upon application of 𝑉𝐺, and (3) the semiconductor, dielectric, and the interface may possess some background fixed charge. Combined, these contributions will result in a TFT channel which is not in general electrically neutral when 𝑉𝐺 =
0 V. This means that either a |𝑉𝐺| > 0 V is required to induce free carriers, or that free carriers are already present in the device when 𝑉𝐺 = 0. These phenomena are encapsulated in a device-specific parameter called the threshold voltage: 𝑉𝑇 (sometime denoted 𝑉𝑇ℎ). This is the voltage that must be overcome to inject charges. For example, if an n-type TFT has a 𝑉𝑇 = 3 V, then a gate voltage of 𝑉𝐺 > 3 V is required to inject charges. If an n-type TFT has a 𝑉𝑇 = -3V, charges will already be present in the device and a voltage of 𝑉𝐺 < -3V is required to deplete the channel and turn off the device. Equivalent examples can be considered for p-type TFTs with opposite signs of gate voltage. Evaluating 𝑉𝑇 experimentally is described in Section 3.4. Accounting for threshold voltage, we then consider only the mobile charge carrier density (𝑄mob) contributing to current. This is expressed via Equation 3.2:
𝑄mob= 𝐶𝑖(𝑉𝐺− 𝑉𝑇) (3.2)
When a low drain voltage is applied (|𝑉𝐷| ≪ |𝑉𝐺− 𝑉𝑇|) the carrier concentration in the TFT channel is uniform across the channel (Figure 3.2(a)). Under these conditions, the device is considered Ohmic, and the drain current is roughly proportional to the applied drain voltage (𝐼𝐷∝ 𝑉𝐷). This is referred to as the linear regime. We can approximate the potential due to the gate voltage as being independent of position in the channel: 𝑉𝐺 ≠ 𝑉𝐺(𝑥). However, the potential due to the applied drain voltage depends on distance from the source electrode. We define the voltage at a distance 𝑥 from the source electrode, due to the applied drain voltage, as 𝑉(𝑥). Because the source terminal is grounded, we can say that 𝑉(0) = 0 V, and 𝑉(𝐿) = 𝑉𝐷, where 𝐿 is the distance between the source and drain electrodes (referred to as the channel length). As the applied drain current increases from zero, the
potential at the semiconductor-dielectric interface hence becomes dependent on position, as described by Equation 3.3:
𝑄mob(𝑥) = 𝐶𝑖(𝑉𝐺− 𝑉𝑇− 𝑉(𝑥)) (3.3)
When |𝑉𝐷| > 0 the induced distribution of charge carriers in the channel becomes non-uniform. Under these circumstances the relationship between 𝐼𝐷 and 𝑉𝐷 becomes sub-linear (see Figure 3.2(b)). From Equation 3.3 it is clear that when 𝑉𝐺− 𝑉𝑇 = 𝑉(𝑥) the charge density at 𝑥 will be zero. For unipolar TFTs, it is not energetically possible to inject and transport charges of the opposite sign to the majority carrier. Hence 𝑄mob(𝑥) cannot flip sign for large applied values of |𝑉𝐷|, and instead 𝑄mob(𝑥) ≈ 0 under these conditions. Therefore, when |𝑉𝐷| ≥ |𝑉𝐺− 𝑉𝑇| a region adjacent to the drain electrode exists in which the charge density is close to zero – a depletion region (see Figure 3.3(c)). This phenomenon is called pinch-off, and is analogous to the effect observed in inversion mode MOSFETs when the condition for inversion is no longer satisfied at close to the drain terminal.4 Strictly speaking, for charge to flow from source to drain the charge density cannot be zero in this region, but we can describe carriers as being space-charge-limited, and being swept from the pinch-off point to the drain by the comparatively high electric field in this region. As |𝑉𝐷| increases above |𝑉𝐺− 𝑉𝑇|, the pinched-off (depletion) region increases in size. Because the carrier concentration in this region is very low, the resistance is very high, and can be considered to not be part of the TFT channel. By considering this depletion region and the channel as two resistors in series, it is clear that the majority of any additional drain voltage applied above |𝑉𝐺− 𝑉𝑇| will be dropped across the depletion region and not the channel. Therefore when |𝑉𝐷| ≫ |𝑉𝐺− 𝑉𝑇| the effective voltage the channel experiences is independent of applied 𝑉𝐷 and fixed at |𝑉𝐷| ≈ |𝑉𝐺− 𝑉𝑇|. This is called the saturation regime. The intermediate regime depicted by Figure 3.2(b) does not have a common name.
Figure 3.2 Illustration of operating regimes of TFT with increasing drain voltage (𝑉𝐷). (a) At low drain voltages (|𝑉𝐷| ≪ |𝑉𝐺− 𝑉𝑇|) the charge distribution is roughly uniform at the interface between the semiconductor- dielectric interface. This results in a linear relationship between drain current (𝐼𝐷) and 𝑉𝐷. This operating regime is called the linear regime. (b) At intermediate drain voltages (|𝑉𝐷| ≈ |𝑉𝐺− 𝑉𝑇|) the charge distribution is non- linear and the relationship between 𝐼𝐷 and 𝑉𝐷 is sub-linear. (c) A high drain voltages (|𝑉𝐷| ≪ |𝑉𝐺− 𝑉𝑇|) the channel becomes pinched-off and a highly-insulating region forms adjacent to the drain electrode. Increases above 𝑉𝐷≈ 𝑉𝐺− 𝑉𝑇 have little effect on drain current and hence 𝐼𝐷 is roughly independent of 𝑉𝐷. This regime is called the saturation regime.
3.2. Current Voltage Characteristics
A relationship between applied gate voltage (𝑉𝐺), drain voltage (𝑉𝐷), and measured drain current (𝐼𝐷) can be derived using a similar approach to that used for inversion-mode MOSFETs.4 By assuming the channel length (𝐿) is ≫ than the thickness of the dielectric (𝑑), one can ignore edge effects due to the gate not being an infinite plane, and assume that the gate field is independent of position in the channel (𝑉𝐺≠ 𝑉𝐺(𝑥)). This assumption is the Gradual Channel Approximation (GCA) and serves as the basis for the subsequent derivation.
The conductivity, 𝜎, of a bulk material can be expressed in terms of the average electron and hole mobility, 𝜇𝑒 and 𝜇ℎ, via Equation 3.4:
𝜎 = 𝑒(𝜇𝑒𝑛 + 𝜇ℎ𝑝) (3.4)
Here 𝑒 is the fundamental unit of charge, and 𝑛 and 𝑝 are the 3-dimensional number density of electrons and holes, respectively. For the purposes of this derivation we will consider an 𝑛-type (electron only) TFT only and set 𝑝 = 0 as expressed in Equation 3.5. An equivalent derivation can be carried out for 𝑝-type TFTs via analogous steps.5
𝜎 = 𝑒𝜇𝑒𝑛 (3.5)
𝑉𝐷
𝐼𝐷
(b)
Substrate Dielectric Gate Electrode Semiconductor Source / Drain Electrodes (a)
𝑉𝐷 𝑉𝐺
𝑥
𝑥 = 𝐿
𝑥 = 0 (c)
𝑉𝐷
𝐼𝐷
𝑉𝐷
𝐼𝐷
Equations 3.4 and 3.5 are only valid for materials with a homogenous distribution of charge carriers. We know from Equation 3.3 that the charge density in a TFT is not in general homogeneous, so we cannot use Equation 3.5 directly. We define the channel to have a length 𝐿, width 𝑊, and thickness 𝐷, as illustrated in Figure 3.3. Instead of considering a channel with a length 𝐿, we can instead consider a very small slice of the channel, with a width 𝛿𝑥, centered at a position 𝑥. We will make the approximation that the charge density in this slice is uniform. As 𝛿𝑥 → 0 this assumption becomes valid.
Figure 3.3 Left: Top-down illustration of thin-film transistor (TFT) with source (S) and drain (D) contact pads labelled. Right: Illustration of TFT channel with width (𝑊) length (𝐿) and depth (𝐷) labelled. 𝛿𝑥 represents the length of the channel split up into a small slice.
The volume of this slice is 𝑊𝐷𝛿𝑥. If we define the total number of electrons in the slice to be 𝑁(𝑥), the conductivity of the slice can then be given by Equation 3.6:
𝜎(𝑥) =𝑒𝜇𝑒𝑁(𝑥)
𝑊𝐷𝛿𝑥 (3.6)
Identifying that the 2-dimensional charge density in the channel is given by 𝑄𝑚𝑜𝑏(𝑥) = 𝑒𝑁(𝑥) 𝑊𝛿𝑥⁄ , we can re-write this as Equation 3.7:
𝜎(𝑥) =𝜇𝑒𝑄mob(𝑥)
𝐷 (3.7)
Going from conductivity to resistance, 𝛿𝑅, (and being aware of the direction current flows in our slice) gives Equation 3.8. We denote the resistance of the slice 𝛿𝑅, as it is a small section of the channel, which has a total resistance 𝑅.
S D
𝐿
𝑊
𝐿
𝑊
𝐷 𝛿𝑥
𝛿𝑅 = 𝛿𝑥
𝜇𝑒𝑄mob(𝑥)𝑊 (3.8)
Taking the limit as 𝛿𝑅 → 0, 𝛿𝑥 → 0, and using the differential form of Ohm’s Law (𝐼𝐷= 𝑑𝑉 𝑑𝑅⁄ ) gives Equation 3.9:
𝐼𝐷 = 𝑑𝑉
𝑑𝑥𝜇𝑒𝑄mob(𝑥)𝑊 (3.9)
Substituting Equation 3.3 into 3.9 gives Equation 3.10:
𝐼𝐷 =𝑑𝑉
𝑑𝑥𝜇𝑒𝐶𝑖(𝑉𝐺− 𝑉𝑇− 𝑉(𝑥))𝑊 (3.10) This equation can be written as two integrals, as given by Equation 3.11:
∫ 𝐼𝐷𝑑𝑥
𝐿 0
= ∫ 𝜇𝑒𝐶𝑖(𝑉𝐺− 𝑉𝑇− 𝑉(𝑥))𝑊𝑑𝑉
𝑉𝐷 0
(3.11)
Where we are integrating over the length of the TFT channel: from the source electrode (𝑥 = 0, 𝑉 = 0) to the drain electrode (𝑥 = 𝐿, 𝑉 = 𝑉𝐷). Evaluating these integrals provides an equation for the drain current:
𝐼𝐷=𝑊
𝐿 𝜇𝑒𝐶𝑖[(𝑉𝐺− 𝑉𝑇)𝑉𝐷− 𝑉𝐷2
2 ] (3.12)
The equation is equally valid for holes by replacing 𝜇𝑒 with 𝜇ℎ. Equation 3.12 can be used to approximate field effect mobility, as described in Section 3.3.
3.3. Mobility Evaluation
When measuring the electrical properties of TFTs, two measurements are typically made per device. The first is called an output curve: where the drain current measured as a function of applied drain voltage, for a range of constant applied gate voltages. The second is called a transfer curve and is drain current measured as a function of applied gate voltage, for a range of constant applied drain voltages. Example output and transfer curves for an n-type TFT are shown in Figures 3.4(a) and 3.4(b) respectively. By convention output curves are plotted with a linear y-axis scale, and transfer curves are plotted with a logarithmic y-axis scale.
Figure 3.4 (a) Example transfer curve: drain current (𝐼𝐷) measured as a function of applied drain voltage (𝑉𝐷), for several constant applied gate voltages (𝑉𝐺). (b) Example output curve: drain current (𝐼𝐷) measured as a function of applied gate voltage (𝑉𝐺), for two constant applied drain voltages (𝑉𝐷).
Output curves are typically measured in order to validate that a TFT qualitatively behaves as expected (as depicted in Figure 3.2 for example). Transfer curves are used to evaluate device parameters. The primary figure of merit for TFTs is the field-effect mobility. Mobility (𝜇) is a scalar quantity that is simply the ratio of carrier velocity (𝑣) to electric field strength (𝐸), as given by Equation 3.13:
𝜇= 𝑣
𝐸 (3.13)
The mobility of electrons and holes are in general dissimilar and are labelled 𝜇𝑒 and 𝜇ℎ, respectively. Mobility is almost always quoted in units of cm2/Vs. In a TFT channel, the mobility is expected to vary as a function of position. For example, the velocity at which a charge carrier traverses a grain boundary is likely to be different from the velocity at which carriers move within a crystal grain, for the same electric field. For this reason, when talking about field effect mobility, we implicitly mean the average mobility in the entire channel. Field effect mobility differs from materials mobility (e.g. as measured with Hall measurements6 or time resolved microwave conductivity7) in that it also encapsulates devices
-20 0 20 40 60 80
10-10 10-9 10-8 10-7 10-6 10-5 10-4 10-3
I D (A)
VG (V)
0 20 40 60 80 100
0 100 200 300
I D (
m
A)VD (V) (a)
(b)
of two devices formed of the same material can be vastly different depending on electrode alignment for example.8 Strictly speaking, mobility should be a material property, as defined per Equation 3.13, but due to the impracticality of accounting for every possible modifier in a device, it has now come to be considered a metric for device performance. This presents problems with reproducibility and reporting standards, and is a controversial issue in modern TFT research.9–12
Mobility is typically approximated from transfer characteristics operating in either the linear regime (linear mobility: 𝜇lin) or the saturation regime (saturation mobility: 𝜇sat). The extracted linear mobility and saturation mobility for a particular TFT often differ slightly because of the field- dependence of mobility in disordered systems.13 In Section 3.1, we defined a TFT to be operating in the linear regime when |𝑉𝐷| ≪ |𝑉𝐺− 𝑉𝑇|. Substituting this into Equation 3.12, we can make the approximation given by Equation 3.14:
𝐼𝐷=𝑊
𝐿 𝜇lin𝐶𝑖(𝑉𝐺− 𝑉𝑇)𝑉𝐷 (3.14)
We have now labelled the mobility by 𝜇lin to indicate this equation is only valid in the linear regime. By differentiating 𝐼𝐷 with respect to 𝑉𝐺 and re-arranging, we get an expression for the linear mobility, as given by Equation 3.15:
𝜇lin = 𝐿 𝑊𝐶𝑖𝑉𝐷
𝑑𝐼𝐷
𝑑𝑉𝐺 (3.15)
Equation 3.15 hence enables us to evaluate the linear mobility by numerically differentiating transfer curves. Similarly, for a TFT to be operating in saturation mode we require |𝑉𝐷| ≫ |𝑉𝐺− 𝑉𝑇|. For drain voltages above |𝑉𝐷| ≫ |𝑉𝐺− 𝑉𝑇| we know that increasing the magnitude has no effect on current flow, so in the saturation regime the device behaves as if the drain voltage is constant at |𝑉𝐷| =
|𝑉𝐺− 𝑉𝑇|. Substituting this into Equation 3.12 we get an approximation for the drain current in the saturation regime, as given by Equation 3.16:
𝐼𝐷= 𝑊
2𝐿𝜇sat𝐶𝑖(𝑉𝐺− 𝑉𝑇)
2 (3.16)
The saturation mobility can be evaluated from Equation 3.16 by either: (a) taking the second derivative of 𝐼𝐷 with respect to 𝑉𝐺, or (b) taking the square root of 𝐼𝐷, then taking the first derivative of
√𝐼𝐷 with respect to 𝑉𝐺. These approaches are given in Equations 3.17 and 3.18 respectively:
𝜇sat= 2𝐿 𝑊𝐶𝑖(
𝑑√𝐼𝐷 𝑑𝑉𝐺 )
2
(3.17)
𝜇sat = 𝐿 𝑊𝐶𝑖
𝑑2𝐼𝐷 𝑑𝑉𝐺2
(3.18)
While both Equation 3.17 and 3.18 are equally valid, Equation 3.17 is often favored when analyzing noisy data, since Equation 3.18 involves a 2nd derivative. Importantly, Equations 3.16, 3.17, and 3.18 do not require prior knowledge of the threshold voltage, only knowledge of the appropriate operating regimes. Figures 3.5(a) and 3.5(b) show the mobility extracted from experimental data in the linear and saturation regimes, using Equations 3.15 and 3.18 respectively. The green regions in Figures 3.5(a) and 3.5(b) indicate the regions of gate voltage that satisfy the inequalities used to derive Equations 3.14 and 3.16 respectively. Since 𝜇lin and 𝜇sat often vary as a function of applied gate voltage, evaluating a single representative value can be somewhat subjective. Standard practice is to take an average over the valid 𝑉𝐺 (green region in Figure 3.5) and when then device is clearly in the on- state (e.g. 𝑉𝐺 ≫ 𝑉𝑇).
10-5 10-4 10-3 10-2 10-1 100 101
10-5 10-4 10-3 10-2 10-1 100 101
m
sat (cm2 /Vs)VD = 100 V
-20 0 20 40 60 80
10-6 10-5 10-4 10-3 10-2 10-1 100 101
10-6 10-5 10-4 10-3 10-2 10-1 100 101
m
lin (cm2 /Vs)VG (V)
VD = 10 V (a)
(b)
Figure 3.5 Field effect mobility as a function of gate voltage 𝑉𝐺, extracted from transfer characteristics of example thin film transistor (TFT) in (a) the linear regime (𝜇lin) and (b) the saturation regime (𝜇sat). The green regions indicate where the TFT is operating in the (a) linear and (b) saturation regimes. The threshold voltage of this TFT is 𝑉𝑇 ≈ 16 V.
3.4. Threshold Voltage
The threshold voltage for a TFT is conventionally evaluated in the saturation regime, however alternative approaches exist.14 In the saturation regime the drain current can be approximated by Equation 3.16. By taking the square root and re-arranging, we can see that 𝐼𝐷1 2⁄ = 0 when 𝑉𝐺 = 𝑉𝑇. This property can be exploited by extrapolating the linear region of a plot of 𝐼𝐷1 2⁄ against 𝑉𝐺 to 𝐼𝐷1 2⁄ = 0. The intersection with the 𝑥-axis is then the threshold voltage. In the example shown in Figure 3.6, 𝑉𝑇 ≈ 16 V. For this approach to be valid, we must ensure we only fit data points that both ensure the condition for saturation (|𝑉𝐷| ≫ |𝑉𝐺− 𝑉𝑇|) is satisfied, and the device is in the on-state.
Figure 3.6 Example of extraction of threshold voltage (𝑉𝑇) from transfer characteristics. By plotting the square root of drain current (𝐼𝐷1 2⁄ ) evaluated in the saturation regime against gate voltage (𝑉𝐺), then extrapolating the part of the plot where 𝐼𝐷1 2⁄ ∝ 𝑉𝐺 to 𝐼𝐷1 2⁄ = 0, the 𝑥-intercept is 𝑉𝑇. The threshold voltage of this TFT is 𝑉𝑇 ≈ 16 V.
3.5. Current On / Off Ratio
For a transistor to effectively process information it requires well defined on and off states. This ability is parametrized through the current on / off ratio; often referred to as just the on / off ratio, or 𝐼ON⁄𝐼OFF. It is simply the ratio of the maximum measured drain current to the minimum measured drain current, rounded to the nearest decade. Usually this parameter is evaluated from transfer characteristics. For example, the transistor measured in Figure 3.4(b) would have an on/off ratio of 105 or 106. While it is clearly a valuable property, the drain current of a TFT will increase with increasing gate voltage until eventually the dielectric breaks down (see Section 4.3). Hence 𝐼ON⁄𝐼OFF is linked to the ability of the transistor dielectric to withstand large fields.
-20 0 20 40 60 80
0.000 0.005 0.010 0.015 0.020
Experimental Fitted
I D1/2 (A1/2 )
VG (V)
3.6. Sub-Threshold Swing
The sub-threshold swing (SS) is a measure of how rapidly (in gate voltage space) a TFT switches from being in the off-state to the on-state. It is defined by Equation 3.19 and is reported in Volts / decade. This is extracted from transfer curves by first taking the base-ten log of the drain current. Then the gate voltage is numerically differentiated with respect to the log10(𝐼𝐷).
𝑆𝑆 = 𝑑𝑉𝐺
𝑑log10(𝐼𝐷) (3.19)
Normally a single value is reported for 𝑆𝑆 for a TFT, normally the lowest value on a plot of 𝑆𝑆 vs 𝑉𝐺.
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(6) Chen, Y.; Yi, H. T.; Wu, X.; Haroldson, R.; Gartstein, Y. N.; Rodionov, Y. I.; Tikhonov, K. S.; Zakhidov, A.; Zhu, X.-Y.; Podzorov, V. Extended Carrier Lifetimes and Diffusion in Hybrid Perovskites Revealed by Hall Effect and Photoconductivity Measurements. Nat. Commun. 2016, 7, ncomms12253.
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