Step 5(not shown): how does the CPU react to the “Interrupt” signal in order to execute

SE 3SH3 /CS 3SH3: Operating System Concepts

Term 2 (Winter 2008)

Test 1 January 29, 2008 Time: 50 Minutes 5 Questions: 100 Marks Instructor: Dr. Kamran Sartipi

WRITE CLEARLY, YOU MAY LOOSE MRKS FOR UNREADBLE ANSWERS

Question 1 (operating systems): [18 marks]

What are the main characteristics of the following types of operating systems in terms of: a) Resource utilization

b) Type of services they provide

1) Batch processing with multi-programming:

a. Maximum use of CPU because of low number of context-switching; I/O can also be used in an efficient manner.

b. Batch processing is mainly used for off-line and CPU-bound jobs where the jobs are put together and are fed the computer system at once.

2) Time-sharing (interactive):

a. A time-sharing system multiplexes the CPU time among different

processes in order to make an illusion that each process has a private CPU. CPU time is wasted because of high context-switch rate. Memory is usually handled by memory management unit (MMU) with paging which uses memory efficiently. I/O devices are shared among users therefore are used properly.

b. The time-sharing system provides an interactive computing environment and provides user-satisfaction. It is used in multi-user environment for working on data and programs.

3) Personal computer system:

a. In a personal computer (PC), the resources including CPU are wasted a lot since a PC is working idle during the time the system is waiting for the user to invoke a service; and a large portion of memory may be unused for a long time.

Question 2 (I/O device): [30 marks] Figure below illustrates the interrupt-driven I/O operation of a computer system to transfer blocks of data from disk drive to (not shown) main memory.

1) Draw boxes for “Main Memory”, “Direct Memory Access Controller (DMAC)” and “I/O Devices” and connect them to this figure to make a complete computer system. If necessary, add other boxes as well.

See the above figure for the solution.

2) We intend to read two blocks of data from a specific address in “Disk Drive” (for example from “Track 5, Sectors 6 and 7” to the memory starting from location 1000. These numbers are not important). We want to compare two mechanisms for data transfer to memory: “using CPU for transfer” and “using DMAC for transfer”. Answer to the following questions with regard to the figure:

Step 1: what information does CPU put in “Disk Controller”?

These information include:

• Control bytes to program disk controller. These bytes are stored in the control registers of disk controller to operate the disk drive for transferring blocks of data. • Addresses of blocks of data in disk drive, e.g., cylinder 5, Sectors 6; as well as the

number of blocks to be transferred, e.g., 2 blocks (6 and 7).

Step 2: when does “Disk Controller” perform the interaction shown for this step and what is the type of interaction?

Steps 3 & 4 : what is the task of “Interrupt Controller” and what type of information does it provide to the CPU?

Interrupt controller is a meditor between CPU and I/O controllers, and is used when there are more than one sources of interrupt in the system. A simple interrupt controller is an address encoder which has several inputs each connected to one I/O controller, and sends a code (e.g., binary code between 000 and 111) to CPU to indicate who has requested a service. An interrupt controller also considers priorities for differnt I/O controllers according to the input pin-number that is connected to an I/O controller.

Step 5 (not shown): how does the CPU react to the “Interrupt” signal in order to execute the “Interrupt Routine”? This interrupt routine is a program where CPU transfers bytes of two blocks of data from “Disk Conroller” to “Memory”.

In a typical interaction, once signal “2” is generated, interrupt controller sends an

interrupt request to CPU (signal “3”); and after receiving an interrupt acknowlede signal the interrupt controller sends the binary code to CPU to be used for generating interrupt vector which is used to find the actual address of the interrupt service in memory. The CPU concatenates the “code received from interrupt controller” with “an internal interrupt vector address” to generate a memroy address. This address refers to a table in memory called addrss vector, where the address of different interrupt services are stored. The CPU then reads the actual address of service from this table and goes to that address to execute the service. The CPU also stored the return address of the main program into system stack.

Step 6 (not shown): what would be the advantage, if in the interrupt routine of Step 5, the CPU programs a “DMAC” to transfer blocks of data from “Disk Controller” to “Memory”?

In step 5, the CPU must transfer individual bytes of the block of data one-by-one (or two-by-two) from I/O controller to CPU and then from CPU to memory to store (e.g., from memory location #1000). In this case, CPU is an intermediate in this transfer which increases the time of transfer with a large factor.

Whereas, if CPU programs a DMAC in the interrupt service routine, then the DMAC takes the control of all three system buses (Address, Control, and Data) and holds CPU in order to directly transfer blocks of data from I/O controller to memory.

Question 3 (IPC) [10 marks]

With refer to figure below, answer True or False to the following statements.

1) Figure (a) refers to process creation and figure (b) refers to process synchronization.

2) Two figures refer to Inter-Process Communication (IPC) through socket programming.

False

3) Figure (a) represents “loosely-coupled” processes and figure (b) represents “tightly coupled” processes for communication.

True

4) In (a) two processes communicate through message passing, and in (b) two processes communicate using shared memory, where (b) requires special consideration for

accessing to shared data whereas in (a) this is handled by OS.

True

5) In general, IPC through message passing is faster than shared memory because we can use sockets in message passing but not in shared memory.

False

Question 4 (Process Scheduling) [30 marks]

Figure below presents the Unix process scheduling mechanism. Briefly answer to the following questions with regard to the numbered lines in figure.

(b) (a)

Signal is generated Cause of releasing 1

2

3

4

Line 1) What is the definition of “ready queue”?

Ready queue accommodates processes that are ready to get CPU in the running state. Each time, the short-term-scheduler (CPU scheduler) selects one process from ready queue and sends it (dispatch) to the running state to get CPU. Different strategies are used to select the winning process to get CPU.

What does the open input to ready queue represent?

Represents the place where newly created processes enter the system to join the group of active/passive processes in the system.

What does the open output from circle “CPU” represent?

Represents the processes that terminate their operations (voluntarily or by force such as those killed for different reasons). So they will not stay in the system anymore.

Line 2) What is the use of “I/O queue” and how many of them exist (one or more)?

Each process that is in the running state and requests for an I/O operation will be sent to an I/O queue allocated for that specific I/O device. Different processes that request for the same I/O device will be put in the same queue waiting for their particular event to occur. When that I/O device completes an I/O operation the OS will send a signal to the corresponding process that was waiting for the operation to be completed. The OS knows this because it maintains a link list of processes that wait for specific events to occur.

Line 3) What is the type of processes that most of the time release CPU because of the reason shown in the box of this line? What is the other type of processes

bound processes: these processes most of time consume all the time-slice that CPU-scheduler allocates to them to use CPU in the running state.

The other type of processes are IO-bound processes which frequently request for I/O operations, hence they voluntarily release CPU and therefore other processes can use the unused time-slice of the IO-bound processes.

Lines 4 & 5) Briefly describe a scenario that uses both lines 4 and 5.

queue and waits to get CPU. The child process may also perform exec() system call to become another process (say a print-line process to print some info) and performs its assigned task. After child process terminates, the OS sends a “death-of-child” signal to the parent process in line 5, and the parent process starts executing and possibly receives the result of the child-process and uses it. Figure below shows this scenario.

Question 5 (Process Status) [12 marks]

Figure below is part of a class slide representing the application of command “process status” (“ps”) in Unix OS. In simple steps and with the logic we discussed in class, explain how you would identify the shell process “-tcsh” of the crashed process and kill it to release the crashed terminal.

UID: user ID; PID: process ID; PPID: parent PID; TTY: terminal; CMD: command.

See class slides for answer