• No results found

Building a computer. Electronic Numerical Integrator and Computer (ENIAC)

N/A
N/A
Protected

Academic year: 2021

Share "Building a computer. Electronic Numerical Integrator and Computer (ENIAC)"

Copied!
31
0
0

Loading.... (view fulltext now)

Full text

(1)

Building  a  computer  

(2)

Layers  of  abstrac<on  

abstrac<on   building  blocks   examples  

computer   components   Macbook  Pro  

components   mul<plexer,  

demul<plexer,  adder,   flip-­‐flop  

registers,  ALU,  counter  

sequen<al  circuits   logic  gates,  connectors,  

clock   flip-­‐flop  

combina<onal  circuit   logic  gates,  connectors   mul<plexer,  

demul<plexer,  adder   logic  gates   switches,  connectors   AND,  OR,  NOT  

clock   raw  materials   crystal  oscillator  

connector   raw  materials     wire  

switch   raw  materials   transistor,  relay  

(3)

Connector  

•  Goal:  conduct  electricity  

+ =

wire  

big  hole   miners  

(4)

Clock  

•  Goal:  periodic  signal  for  synchroniza<on    

+

quartz  crystal   electricity   clock  signal  

=

(5)

Switch  

•  Goal:  allow  electricity  to  be  turned  on  &  off  

+ +

spring   magnet   wire  

=

switch  

(6)

Logic  gates  

•  Goal:  compute  simple  Boolean  func<ons  

wire  

+ =

switch   NOT  gate  

+ + =

wire   switch   switch   OR  gate  

Examples:  NOT,  OR,  AND,  NOR,  NAND,  XOR  

(7)

Combina<onal  circuit  

•  Goal:  compute  any  Boolean  func<ons  

 

x   y   F(x,y)  

0   0   0  

0   1   1  

1   0   1  

1   1   0  

truth  table  

+

logic  gates  

=

combina<onal  circuit   wire  

+

Examples:  odd,  majority,  mul<plexer,    demul<plexer,  

adder  

(8)

Sequen<al  circuit  

•  Goal:  store  persistent  state  

logic  gates   wire  

+ +

clock  

=

sequen<al  circuit  

Examples:  SR  latch,  D  flip-­‐flop,  JK  flip-­‐flop,  T  flip-­‐flop  

(9)

Components  

•  Goal:  provide  high-­‐level  func<onality  

combina<onal  circuits   sequen<al  circuits  

+ =

component  

Examples:  register,  register  bank,  mul<port  register  

bank,  synchronous  counter,  ALU  

(10)

Computer  

•  Goal:  store  and  process  data  according  to  a   program  

+

components   input  

+

output  

=

computer  

(11)

Computer  

•  Three  major  components  

–  Central  Processing  Unit  (CPU)  

•  Performs  opera<ons  

–  Memory  

•  Where  data  /  program  is  stored  

–  Input  /  Output  (I/O)  system  

•  Get  input,  show  results  

(12)

Input/output  configura<ons  

I/O   CPU   Memory   CPU  coordinates  

transfer  between   I/O  and  memory  

CPU   Memory   I/O   Direct  Memory  

Access  (DMA)  

Bus:  wires  carrying   informa<on  between   components  

8-­‐bit  bus  in  Logisim  

(13)

Bus  width  

4-­‐bit  Intel  4004   8-­‐bit  Intel  8052   16-­‐bit  Intel  80286   32-­‐bit  Intel  80386  

32-­‐bit  Intel  80486   32-­‐bit  Intel   64-­‐bit  AMD  Opteron   128-­‐bit  ???  

(14)

Connec<ng  CPU  &  Memory  

–  Address  bus  

•  Where  CPU  puts  address  of  memory  it  wants  

–  Data  bus  

•  Where  memory  puts  data  from  requested  address  

–  Control  and  status  bus  

•  Determines  direc<on  and  coordinates  <ming  

CPU   Memory  

address  bus    

data  bus      

control  and  status  bus      

Performs  opera<ons     Stores  operands  and  

results    

(15)

CPU  

•  Central  Processing  Unit  (CPU)  

–  The  brains  of  the  computer   –  Main  components:  

•  Arithme<c  Logic  Unit  (ALU)  

–  Perform  math  and  logic  opera<ons  

•  Control  Unit  (CU)  

–  Fetching  and  decoding  instruc<ons  from  memory  

–  Execu<ng  instruc<ons  by  direc<ng  sequence  of  transfers  and  

opera<ons  

(16)

Central  Processing  Unit  (CPU)   Control  Unit  (CU)  

General  purpose  

registers   ArithmeDc  and  Logic  

Unit  (ALU)  

Program  Counter  (PC)   InstrucDon  Register  (IR)  

Memory  address  register   Memory  data  register  

InstrucDon  decoder   Control  and  status  bus    

Data  bus    

Address  bus  

 

(17)

Computer  architecture  

(18)

Our  "simple"  ALU  

First  input  

Second  input  

Output  of  calcula<on  

Which  type  of  thing  to  output,  00  =   ADD,  01  =  SUB,  10  =  AND,  11  =  XOR   Business  end  of  the  

ALU,  compute  all   opera<ons  in  parallel  

2  bits  on  this  line  

4  bits  on  these  lines  

(19)

ALU  data  paths  

ALU  

Accumulator  (A)  

Result  replaces  old   value  in  accumulator  

A B  

1

st

 input,  current  

contents  of  accumulator   2

nd

 input,  read  

from  data  bus  

(20)

8052  adding  numbers  

•  Goal:    

–  Add  value  in  register  0  and  1   –  Put  result  in  register  2  

•  One-­‐liner  in  C:  

 

r2 = r0 + r1;

(21)

Example  8052  opcode  

•  Opcode  ADD  

–  Adds  values  

InstrucDons   OpCode   Bytes   Cycles   Flags  

ADD  A,#data   0x24   2   1   C,  AC,  OV  

ADD  A,direct   0x25   2   1   C,  AC,  OV  

ADD  A,@R0   0x26   1   1   C,  AC,  OV  

ADD  A,@R1   0x27   1   1   C,  AC,  OV  

ADD  A,R0   0x28   1   1   C,  AC,  OV  

ADD  A,R1   0x29   1   1   C,  AC,  OV  

ADD  A,R2   0x2A   1   1   C,  AC,  OV  

ADD  A,R3   0x2B   1   1   C,  AC,  OV  

ADD  A,R4   0x2C   1   1   C,  AC,  OV  

ADD  A,R5   0x2D   1   1   C,  AC,  OV  

(22)

Example  8052  opcode  

•  Opcode  MOV  

–  Move  memory  

InstrucDons   OpCode   Bytes   Cycles   Flags  

MOV  A,R0   0xE8   1   1   None  

MOV  A,R1   0xE9   1   1   None  

MOV  A,R2   0xEA   1   1   None  

MOV  A,R3   0xEB   1   1   None  

MOV  A,R4   0xEC   1   1   None  

MOV  A,R5   0xED   1   1   None  

MOV  A,R6   0xEE   1   1   None  

MOV  A,R7   0xEF   1   1   None  

MOV  R0,A   0xF8   1   1   None  

MOV  R1,A   0xF9   1   1   None  

MOV  R2,A   0xFA   1   1   None  

MOV  R3,A   0xFB   1   1   None  

…  

(23)

8052  adding  numbers  

•  Goal:    

–  Add  value  in  register  0  and  1   –  Put  result  in  register  2  

•  Takes  sequence  of  3  instruc<ons  in  8052   assembly:  

–  Reflec<on  of  the  underlying  hardware  reali<es  

MOV A, R0

ADD A, R1

MOV R2, A

(24)

Control  Unit  

•  Control  Unit  (CU)  

–  Fetches  instruc<ons  from  memory   –  Decodes  instruc<ons  

–  Executes  instruc<ons  

•  Sequence  of  data  transfers  &  opera<ons  

Control  Unit  (CU)  

Program  Counter  (PC)   InstrucDon  Register  (IR)  

Memory  address  register   Memory  data  register  

InstrucDon  decoder   Control  and  status  bus    

Data  bus    

Address  bus    

(25)

Fetch-­‐execute  cycle  

Fetch  

Get  the  next  instruc<on   from  memory  

Execute  

Perform  data  transfers  and   opera<ons  

Program  counter  (PC)  

provides  the  loca<on   Retrieve  addi<onal  

bytes  as  required  by  

desired  instruc<on  

(26)

Fetch  phase  

•  Fetch  phase  

–  Control  unit  (CU)  places  program  counter  (PC)  on   memory  address  bus  

–  Starts  memory  read  opera<on     –  Increments  program  counter  (PC)   –  Wait  for  memory  read  to  finish  

–  Copy  value  on  memory  data  bus  to  instruc<on   register  (IR)  

Fetch   Execute  

(27)

Execute  phase  

•  Execute  phase  

–  First  byte  of  instruc<on  contains  opera<on  code   (opcode)  

–  CU  decodes  opcode  

–  Details  opcode  specific  

•  May  load  addi<onal  data  from  memory  

•  May  place  constants  on  data  bus  

•  Put  values  on  status  and  control  bus  (e.g.  desired  ALU  

opera<on)  

(28)

Memory  architecture  

•  Harvard  architecture  

–  Code  and  data  stored  in  separate  areas  

•  Program  cannot  accidently  modify  itself  

–  Example:  8052  

•  256  bytes  data  memory  (on  chip)  

•  Code  memory,  EPROM  or  Flash  (AT89S8253  12KB  flash)  

•  Von  Neumann    architecture  

–  Code  and  data  in  same  area  

–  Loaded  at  boot  <me  from  device  (e.g.  hard  drive)  

–  Example:  modern  PCs  

(29)

8052  memory  architecture  

   

AT89S8253  12KB  flash  

   

Port  0-­‐3,  serial  

port,  <mers,  

interrupts  

128  +  128  bytes  

(30)

8052  memory  addresses  

(31)

Summary  

•  Building  a  computer  

–  Raw  materials  →  switches  →  gates  →  circuits  →   components  →    computer  

•  Computer  

–  CPU  +  memory  +  I/O  

•  Fetch-­‐and-­‐execute  cycle  

•  Assembly  programming  8052  

–  Some<mes  tedious,  but  reflects  hardware  reali<es  

References

Related documents

Holzbauwerke – Bauholz für tragende Zwecke und Brettschichtholz – Bestimmung einiger physikalischer und mechanischer Eigenschaften.. European Standard EN 408 : 2003 has the status of

in Telecommunication, Electrical/Electronic Engineering, Computer Science or Higher National Diploma in Telecommunication, Electrical/Electronic Engineering, Computer Science with

[r]

Next plug a Molex connector from the power supply into the rear of the CD-ROM

The research topics  The data to be analysed emanates from user‐generated content which has been publicly  shared online. This comprises, for example:  

Each statement below has a blank space to fit one of the word(s) or phrase(s) in the list below. Enter your choice in the “tear-off” answer sheet attached to the

One lesson of Hitchcock’s work, then, is that there are at least two aesthetics of narrative suspense that correspond roughly to the objective and subjective aspects of suspense

If you can master this category, heal the negative, and instill the positive, the trust, belief, faith and hope, this can release tremendous power in your life for success and