Transistors. NPN Bipolar Junction Transistor

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Transistors

•They are unidirectional current carrying devices with capability to control the current flowing through them

• The switch current can be controlled by either current or voltage • Bipolar Junction Transistors (BJT) control current by current

• Field Effect Transistors (FET) control current by voltage

•They can be used either as switchesor as amplifiers

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NPN Bipolar Junction Transistor

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PNP Bipolar Junction Transistor

•One P-N (Base Collector) diode one N-P (Base Emitter) diode

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BJT α and β

•From the previous figurei_E= i_B+ i_C

•Define α = i_C/ i_E

•Define β = i_C/ i_B

•Then β = i_C/ (i_E –i_C) = α /(1- α)

•Theni_C= α i_E; i_B= (1-α) i_E

•Typically β ≈ 100 for small signal BJTs (BJTs that handle low power) operating in active region (region where BJTs work as amplifiers)

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BJT in Active Region

Common Emitter(CE) Connection

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BJT in Active Region (2)

•Base Emitter junction is forward biased •Base Collector junction is reverse biased •For a particular i_B, i_Cis independent of R_CC

⇒transistor is acting as current controlled current source (i_Cis controlled by i_B, and i_C= β i_B)

• Since the base emitter junction is forward biased, from Shockley equation ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ − ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ = exp 1 T BE CS C V V I i 8

Early Effect and Early Voltage

• As reverse-bias across collector-base junction increases, width of the collector-base depletion layer increases and width of the base decreases (base-width modulation).

• In a practical BJT, output characteristics have a positive slope in forward-active region; collector current is not independent of vCE.

• Early effect: When output characteristics are extrapolated back to point of zero iC, curves intersect (approximately) at a common point vCE= -VA

which lies between 15 V and 150 V. (V_Ais named the Early voltage) • Simplified equations (including Early effect):

i_C= I_S exp vBE V T ⎛ ⎝ ⎜ ⎜ ⎞ ⎠ ⎟ ⎟ ⎡ ⎣ ⎢ ⎢ ⎢ ⎢ ⎤ ⎦ ⎥ ⎥ ⎥ ⎥ 1+vCE V A ⎡ ⎣ ⎢ ⎢ ⎢ ⎢ ⎤ ⎦ ⎥ ⎥ ⎥ ⎥ β_F=β_FO1+vCE V A ⎡ ⎣ ⎢ ⎢ ⎢ ⎢ ⎤ ⎦ ⎥ ⎥ ⎥ ⎥ i B= I S β FO exp vBE V T ⎛ ⎝ ⎜ ⎜ ⎞ ⎠ ⎟ ⎟ ⎡ ⎣ ⎢ ⎢ ⎢ ⎢ ⎤ ⎦ ⎥ ⎥ ⎥ ⎥ Chap 5 - 8

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BJT in Active Region (3)

•Normally the above equation is never used to calculate iC, i_B

Since for all small signal transistors v_BE ≈0.7. It is only useful for deriving the small signal characteristics of the BJT.

•For example, for the CE connection, i_B can be simply calculated as, BB BE BB B R V V i = −

or by drawing load line on the base –emitter side

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Deriving BJT Operating points in

Active Region –An Example

In the CE Transistor circuit shown earlier V_BB= 5V, R_BB= 107.5 kΩ, R_CC = 1 kΩ, V_CC = 10V. Find I_B,I_C,V_CE,β and the transistor power dissipation using the characteristics as shown below

BB BE BB B R V V I = −

By Applying KVL to the base emitter circuit

By using this equation along with the i_B/ v_BE characteristics of the base emitter junction, I_B= 40 μA i_B

100 μA

0

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Deriving BJT Operating points in

Active Region –An Example (2)

By using this equation along with the i_C/ v_CE characteristics of the base collector junction,i_C= 4 mA, V_CE= 6V

By Applying KVL to the collector emitter circuit CC CE CC C R V V I = − 100 A 40 mA 4 I I B C ₌ μ = = β

Transistor power dissipation = V_CEI_C = 24 mW

We can also solve the problem without using the characteristics ifβ and V_BE values are known

i_C 10 mA 0 20V v_CE 100 μA 80 μA 60 μA 40 μA 20 μA 12

BJT in Cutoff Region

•Under this condition i_B= 0

•As a result i_C becomes negligibly small

•Both base-emitter as well base-collector junctions may be reverse biased

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BJT in Saturation Region

•Under this condition i_C/ i_B < β in active region

•Both base emitter as well as base collector junctions are forward biased

•V_CE≈ 0.2 V

•Under this condition the BJT can be treated as an onswitch

14 •A BJT can enter saturation in the following ways (refer to the CE circuit)

•For a particular value of i_B, if we keep on increasing R_CC •For a particular value of R_CC, if we keep on increasing i_B •For a particular value of i_B, if we replace the transistor with one with higher β

15 In the CE Transistor circuit shown earlier V_BB= 5V, R_BB= 107.5 kΩ, R_CC = 10 kΩ, V_CC = 10V. Find I_B,I_C,V_CE,β and the transistor power dissipation using the characteristics as shown below

BJT in Saturation Region – Example 1

Here even though I_B is still 40 μA; from the output characteristics, I_C can be found to be only about 1mA and V_CE≈ 0.2V(⇒ V_BC ≈ 0.5V or base collector junction is forward biased (how?))

β = I_C / I_B = 1mA/40 μA = 25< 100 i_C 10 mA 0 20V v_CE 100 μA 80 μA 60 μA 40 μA 20 μA 16

BJT in Saturation Region – Example 2

In the CE Transistor circuit shown earlier V_BB= 5V, R_BB= 43 kΩ, R_CC = 1 kΩ, V_CC = 10V. Find I_B,I_C,V_CE,β and the transistor power dissipation using the characteristics as shown below

Here I_B is 100 μA from the input characteristics; I_C can be found to be only about 9.5 mA from the output characteristics and V_CE≈ 0.5V(⇒ V_BC ≈ 0.2V or base collector junction is forward biased (how?))

β = I_C / I_B = 9.5 mA/100 μA = 95 < 100 Note: In this case the BJT is not in very hard saturation

17 10 mA Output Characteristics i_C 0 20V v_CE 100 μA 80 μA 60 μA 40 μA 20 μA iB 100 μA 0 5V v_BE Input Characteristics

BJT in Saturation Region – Example 2

(2)

18 In the CE Transistor circuit shown earlier V_BB= 5V, V_BE = 0.7V R_BB= 107.5 kΩ, R_CC = 1 kΩ, V_CC = 10V, β = 400. Find I_B,I_C,V_CE, and the transistor power dissipation using the characteristics as shown below

BJT in Saturation Region – Example 3

A 40 R V V I BB BE BB B = μ − =

By Applying KVL to the base emitter circuit

Then I_C= βI_B= 400*40 μA = 16000 μA

and V_CE = V_CC-R_CC*I_C=10- 0.016*1000 = -6V(?)

But V_CE cannot become negative (since current can flow only from collector to emitter).

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BJT in Saturation Region – Example 3(2)

Hence V_CE≈ 0.2V

∴I_C = (10 –0.2) /1 = 9.8 mA

Hence the operatingβ = 9.8 mA / 40 μA = 245

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BJT Operating Regions at a Glance (2)

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BJT ‘Q’ Point (Bias Point)

•Q point means Quiescent or Operating point

• Very important for amplifiers because wrong ‘Q’ point selection increases amplifier distortion

•Need to have a stable ‘Q’ point, meaning the the operating point should not be sensitive to variation to temperature or BJTβ, which can vary widely

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Four Resistor bias Circuit for Stable ‘Q’

Point

≡

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Analysis of 4 Resistor Bias Circuit

≡

V_B- I_BR_B -V_BE - I_ER_E= 0 (1)

Since IE= IB + IC = IB + βIB= (1+ β)IB (2) Replacing I_Eby (1+ β)I_B in (1), we get

Analysis of 4 Resistor Bias Circuit (2)

E B BE B B R ) 1 ( R V V I β + + − = (3) If we design (1+ β)R_E >> R_B (say (1+ β)R_E >> 100R_B) Then E BE B B R ) 1 ( V V I β + − ≈ ₍₄₎

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Analysis of 4 Resistor Bias Circuit (3)

E BE B E C R V V I I = ≈ − (5)

And (for large β)

Hence IC and IE become independent of β!

Thus we can setup a Q-point independent ofβ which tends to vary widely even within transistors of identical part number

(For example, β of 2N2222A, a NPN BJT can vary between 75 and 325 for I_C= 1 mA and V_CE= 10V)

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4 Resistor Bias Circuit -Example

A 2N2222A is connected as shown with R₁ = 6.8 kΩ, R₂ = 1 kΩ, R_C= 3.3 kΩ,

R_E = 1 kΩ and V_CC= 30V. Assume V_BE= 0.7V.

Compute V_CCand I_Cfor β = i)100 and ii) 300

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4 Resistor Bias Circuit –Example (1)

i) β = 100 V 85 . 3 1 8 . 6 1 * 30 R R R Vcc V V 2 1 2 TH B= = ₊ = ₊ = Ω = + = + = = 0.872k 1 8 . 6 1 * 8 . 6 R R R R R R 2 1 2 1 TH B A 92 . 30 1 * 101 872 . 0 7 . 0 85 . 3 R ) 1 ( R V V I E B BE B B ₊ = μ − = β + + − = I_CQ= βI_B = 3.09 mA IEQ= (1+β)IB = 3.12 mA V_CEQ= V_CC-I_CR_C-I_ER_E = 30-3.09*3.3-3.12*1=16.68V 30 i) β = 300 V 85 . 3 1 8 . 6 1 * 30 R R R Vcc V V 2 1 2 TH B = = ₊ = ₊ = Ω = + = + = = 0.872k 1 8 . 6 1 * 8 . 6 R R R R R R 2 1 2 1 TH B A 43 . 10 1 * 301 872 . 0 7 . 0 85 . 3 R ) 1 ( R V V I E B BE B B ₊ = μ − = β + + − = I_CQ= 300I_B = 3.13 mA I_EQ= (1+β)I_B = 3.14 mA V_CEQ= V_CC-I_CR_C-I_ER_E = 30-3.13*3.3-3.14*1=16.53V

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4 Resistor Bias Circuit –Example (3)

The above table shows that even with wide variation of β the bias points are very stable.

β = 100 β = 300 Change% VCEQ 16.68 V 16.53 V 0.9 %

ICQ 3.09 mA 3.13 mA 1.29 %

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Four-Resistor Bias Network for BJT

V_EQ= V_CC R1 R₁+ R₂ REQ= R1R2= R₁R₂ R₁+ R₂ V_EQ= R_EQI_B+ V_BE+ R_EI_E 4= 12 ,000 I_B+ 0.7 +16 ,000 (β_F+1)I_B ∴ I_B= VEQ− VBE R EQ+ (βF+1)RE = 4 V - 0.7V 1.23×10 6 Ω= 2.68 μA I_C=β_FI_B= 201 μA I_E=(β_F+1)I_B= 204μA V_CE=V_CC− R_CI_C− R_EI_E V_CE=V_CC− R C+ R F α F ⎛ ⎝ ⎜ ⎜ ⎜ ⎜ ⎞ ⎠ ⎟ ⎟ ⎟ ⎟ I_C= 4.32 V

F. A. region correct - Q-point is (201 μA, 4.32 V) βF= 75

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Four-Resistor Bias Network for BJT

(cont.)

• All calculated currents > 0, V

= V

- V

= 0.7

-4.32 = - 3.62 V

• Hence, base-collector junction is reverse-biased,

and assumption of forward-active region operation

is correct.

• Load-line for the circuit is:

V_CE= V_CC− R_C+RF α F ⎛ ⎝ ⎜ ⎜ ⎜ ⎜ ⎞ ⎠ ⎟ ⎟ ⎟ ⎟ IC = 12 − 38 ,200 I_C

The two points needed to plot the load line are (0, 12 V) and (314 μA, 0). Resulting load line is plotted on common-emitter output characteristics.

IB = 2.7 μA, intersection of

corresponding characteristic with load line gives Q-point.

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Four-Resistor Bias Network for BJT:

Design Objectives

• We know that

• This implies that IB<< I2, so that I1= I2. So base current doesn’t disturb

voltage divider action. Thus, Q-point is independent of base current as well as current gain.

• Also, V_EQis designed to be large enough that small variations in the assumed value of V_BEwon’t affect I_E.

• Current in base voltage divider network is limited by choosing I2≤ IC/5. This ensures that power dissipation in bias resistors is < 17 % of total quiescent power consumed by circuit and I2>> IBfor β > 50.

I_E=VEQ− VBE − REQIB R E ≅VEQ− VBE R E for R_EQI_B<< (V_EQ− V_BE)

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Four-Resistor Bias Network for BJT:

Design Guidelines

• Choose Thévenin equivalent base voltage • Select R₁to set I₁= 9I_B.

• Select R₂to set I₂= 10I_B.

• REis determined by VEQand desired IC.

• RCis determined by desired VCE. V_CC 4 ≤ VEQ≤ V2CC R₁=VEQ 9 I B R₂=VCC − VEQ 10 I B R_E≅VEQ− VBE I C R_C≅VCC − VCE I C − R_E 36

Four-Resistor Bias Network for BJT:

Example

• Problem: Design 4-resistor bias circuit with given parameters. • Given data: IC= 750 μA,βF= 100, VCC = 15 V, VCE= 5 V

• Assumptions: Forward-active operation region, V_BE = 0.7 V

• Analysis: Divide (V_CC- V_CE) equally between R_Eand R_C. Thus, V_E= 5 V and V_C= 10 V R_C=VCC − VC I C = 6.67 kΩ R_E=VE I E = 6.60 kΩ V_B= V_E+ V_BE = 5.7 V I_B= IC β_F = 7.5 μA I₂=10I_B= 75.0μA I₁= 9I_B= 67.5 μA R₁=VB 9I B = 84.4 kΩ R₂=VCC−VB 10I B =124 kΩ

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Two-Resistor Bias Network for BJT:

Example

• Problem: Find Q-point for pnp transistor in 2-resistor bias circuit with given parameters.

• Given data: β_F= 50, VCC = 9 V

• Assumptions: Forward-active operation region, VEB = 0.7 V

• Analysis: 9= V_EB+18 ,000 I_B+1000 (I_C+ I_B) ∴ 9 = V_EB+18 ,000 I_B+1000 (51)I_B ∴ I_B= 9V − 0.7V 69 ,000Ω = 120 μA I_C= 50 I_B= 6.01 mA V_EC= 9 −1000 (I_C+ I_B)= 2.88 V V_BC= 2.18 V

Forward-active region operation is correct Q-point is : (6.01 mA, 2.88 V)