1. Nztn.Sc~.Foundat~on Sri Lanka 2006 34(1): 21-28
Constant frequency control of an Active Power Filter
G.
Ramtharanl,S.
G. A b e ~ a r a t n e ~ ~ . and A. Atputharajah2'
Scl7ool of Electrical and Electonic Engineering, University of Manc/7ester, Mancbester, UK.-' Department of Electrical and Electronic Enginewing, University ofPeradentya, Peradeniya.
Revised: 18 June 2005; Accepted: 25 July 2005
Abstract: Acrive Power Filrers (APFs) improve t h e elecrriciry supply by correcting harmonic distortions created by non-linear lodds. It also corrects t h e p o o r power-facror resulring f r o m inductive loads. Topologies and control techniques available for APFs are numerous. This paper considers a single phase APF. A scheme rhac requires m i n i m u m calculation burden has been selected. T h e s y s t e m considered, uses an unified constant frequency integrarion control that gives a minimum calculation burden and fasrer response. The control method adapted requires sensing rhe load currenr and DC-link v o l r ~ g e only. However, it causes some problems at t h e integrarion level. T h e analog integrator gives some i n i t i ~ l voltage when opel-ated ar high frequencies due ro insblliry t o reset the inregcator fully. T o avoid errors due to offset in r h e integrator, an offser feedback is proposed and tested in rhis study. The conrl-ol is siniulared and rhe results 2r.e validxed wirh laboratory e s p e r i m r n ~ a l waveforms.
Key words: Active power filter, harmonlc elimin~rion, harmonic filrer, passive filter, PC-theory, reactive power compensation.
INTRODUCTION
Power electronic loads form a major issue o n the quality of power of any electricity supply that feeds such loads.
The harmonic currents injected by t h e loads into the p o w e r n e t w o r k , d i s t o r t t h e n e t w o r k v o l t a g e . Propagation of harmonics may lead to a severe voltage distortion, when the network is weak. Non-linear loads add much t o t h e problem. Lower efficiency, harmful interference t o neighbourhood appliances, overheating the transformers a n d malfunction of t h e sensitive equipmen1 could be t h e result. Therefore, a reduction in the power quality',' is inevitable. I n addition, the harmonic-current would increase t h e rating of t h e capacitor banlis used for power factor correction.
The reactive current in the network causes p o o r power-facror operation. This is due t o inductive loads such as induction motors, arc welders, inductive ballast florescent lamps and power transformers. T h e poor power factor increases t h e loss in t h e transmission network and also reduces the network voltage.
Currently the government is studying several energy saving proposals t o reduce the losses and increase the electrical connections t o t h e public. Projects o n improving the power-factor and eliminating-harmonics are therefore of vital i m p o r t a n c e as given i n t h e government proposal.3
1.1 Power factor improvement and harmonics elimination methods:
Capacitor banks are typical in power factor correction for inductive loads. However, most of the industries are equipped with harmonic loads such as adjustable speed drives and automated computer control equipments to increase their energy e f f i ~ i e n c ~ . ' ' . ~ The harmonic loads introduce an additional requirement of harmonic filters, when power factor correction is made using banks of capacitors.
Also the passive harmonic-filters and power-factor correction capacitors possess a disadvantage when harmonic loads present in the neigh,bourhood of the electrical network are o n a Point of C o m m o n Coupling (PCC). Loads o n a PCC can increase the rating of elements forming the passive-filters and capacitor banks that are o n t h e same P C C . T h e reason is that t h e harmonics created by other customers may also get into a filter network of a different customer, overloading the filters, which are not designed for unexpected loads.
D e v e l o ~ m e n t s i n s e m i c o n d u c t o r s a n d t h e i r packaging technology have enabled power electronics at high frequency applications.' Therefore, t o solve
~ r o b l e m s in Dower svstems. Dower electronics can ~ l a v , L I / a bieeer role. T h e emereence of these new devices has u-
-
led t o researchers around the world t o propose several Active Power Filter (APF) control
Mainly t w o A P F configurations are being studied;
(i) shunt APF and (ii) series A P F with shunt passive filters. T h e shunt A P F directly controlls the current.
Therefore, this configuration is most suitable to this APF
Corresponding author
2 2 G. Ramtharan et al.
current sources, i n which the harmonic loads have high internal impedance for harmonics compared t o the grid impedance. T h e series A P F act as high impedance for h a r m o n i c s w h i l e m a i n t a i n i n g l o w i m p e d a n c e at fundamental frequency. Therefore, t h e series A P F pushes the harmonic current in t o the shunt passive filter and prevents harmonic current flowing into the grid s y s t e m f r o m t h e specific h a r m o n i c l o a d s . T h i s configuration is most suitable t o compensate harmonics produced by the harmonic voltage sources, in which the h a r m o n i c loads have l o w i n t e r n a l i m p e d a n c e f o r harmonics compared t o the grid impedance.
Many control techniques have been studied. In these techniques, several methods are used t o extract t h e control signal, which determines t h e injected voltage and/or current from the APF. T h e control signals are extracted using (i) instantaneous active and reactive power theory, (ii) Space vector techniques, (iii) Phase l o c k l o o p t e c h n i q u e s a n d (iv) F a s t F o u r i e r Transformation techniques. Different inverter controls are used to produce Pulse Width Modulation (PWM) signal f r o m t h e c o n t r o l signal. Mainly used P W M techniques are Sine-triangular, Hysterisis, Selective harmonic elimination, Regular sample and Space vector.
2.2 A P F c o n t r o l circuit
Aver.rrge P Aver.crge P
Figure 2 shows the schematic diagram of the colltrol circuit. As seen, the control method has t w o decoupled loops, the current control loop, and the D C voltage control loop.
Current control loop : T h e error is estimated from the source current measurement. When a harmonic load is introduced, harmonic content introduces a disturbance as an error in the source current. T h e control circuit finds the switching instants so that the duty ratio requir.ed t o compensate the error is achieved. T h u s it does make faster compensation, since the duty required for instantaneous current requirement is implemented within the sample period.
LOAD
> -&/ ~ ' " l l l , " " ~
-
Voltage control loop: T h e error is estimated from the DC-link voltage measurement (DC-link control loop) T h e D C - l i n k control loop maintains the capacitor voltage at a set reference value using feedback action.
T h e error at the DC-link is regulated by a PI controller, and the PI controller output
Vm
is added t o the current control loop t o vary the duty ratio to maintain the D C - link voltage.1,
2.2.1 D C - l i n k voltage of t h e A P F
IL
-
l c l r l sorirce
Flircriinriig
1
T h e DC-Link voltage can be calculated using the voli- second balance of the inductor, in steady-state, as shown below.
Fl~rcfriatir~g
" 1~ p nr~d q Let,
f~ : Switching frequency
Ts
: Switching periodD
: D u t y ratio of the switch A (ON-state-period / Total-period) Vs : Source voltageVc : DC-linkvoltage
V, : Voltage across Inductor L Then.
Figure 1: Block diagram of the proposed Active Power For
05
t 5D . T s A-ONCB-OFF
Applying Kirchoff 's Voltage,
Filter (APF)
v,
=Y r + V p
F&
D ..?s
5;
(TS @-OFF, B-Ow
2 P R O P O S E D A C T I V E P O W E R F I L T E R
2.1 P r i n c i p l e of c o n s t a n t f r e q u e n c y i n t e g r a t i o n volt-second balance across t h e inductor in steady state
c o n t r o l gives,
Figure 1 shows a shunt connected APF." T h e A P F
injects exact amount of current, I,, which is required t o
(vC + v , ) . D . T , =(v, - V ~ ) - ( I - D ) . T ,
(1) cancel the harmonic and reactive current componentsgenerated by t h e load. Therefore, t h e current drawn from the source will be purely sinusoidal and in-phase with the supply voltage.
March 2006 Jortrnal of the National Sczmce Forrnddtton of Srz Lanka 3 4 0
Constant fiequenry cont-(01 of an activc power filter
Ki
R2
Vre f
7
I
I s * R s Deriver-A
2 +
Deriver - B
Figure 2: Schematic diagram of the control circuit
Equation (I), yields:
.. - ys
(1 - 2 0)
2.2.2 Functions of the c o n t r o l circuitry
6)
Calculation o f the duty ratio DF r o m equations (2) and (3)
a) Equivalent resistance .teen by the source m the power By assuming, ClYCUlt
R
Figure 3 shows equivalent circuit diagram of the syscem. =
S-.
The total load impedance across the source terminal is Re
indicated by Re. T h e Re becornes a p u r e resistive
component when the APF is compensaring the harmonic This becomes, and reactive current of the non-linear load. Therefore,
2 D . V n , = V , , - I s . R s when the A P F is in operation, the net current drawn
from the source becomes same as the fundamental active power current component absorbed b y the load.
Taking
VrN7
as the output of the resettable integrator,V ,
=I ,
.R ,
(3)1
D
Ts V f N T = .I
V ,,?.'t WhereR,
is the effective resistance seen b y the source. 0Assume that within the switching period
T,,
V, remains constant (see equation 5).V,\, can be written as,
V I N T = - . Vn7 . D . Ts T
T h e integr.;l constant is selected in such a way that satisfied equation (6). Then the integrator time constant Figure 3: Equivalent circuit diagram of the system.
jo~lrnal of the Natlonal Sczence Foirndatzon of Srz Lanka 34(l) March 2006
compensate harmonics produced by the harmonic
( 7 )
becomes T = Ts
X
, thus equation (8) can be written as:VINT = 2 0 .
v,,,
(9)Assume that the integrator-offset voltage is
Vof,
then,substituting from (10) in (6) for new V,,,:
In the comparator circuit
I n p u t at t h e positive t e r m i n a l of t h e c o m p a r a t o r
(V +)
isV - t = V I N T = 2 D . V,,,
I n p u t at t h e negative t e r m i n a l of rhe c o m p a r a t o r
( v - )
isAs the inputs (V
+)
and (I.'-)
are compared with no hysteresis, the comparator output gives high and low time durations, which are used t o switch the inverter switches, in order t o satisfy equation (6).Equation (2) is always valid, and equation (6) is derived by the control circuit. Therefore equation ('3) becomes valid; hence the source delivers currcnr t o the system, which is equivalent to a resistive ioad ( R j . This shows that t h e
APF
maintains t h e s u p p l y c u r r e n t sinusoidal and in-phase with the supply voitage.2.3 Resettable inte, erator
T h e gate pulses of t h e switches were obtained by comparing a voltage r a m p w i t h a constant voitage produced by the controller. A resettable inte, orator was used t o produce the ramp. However, the resetting of the integrator was not perfect.
2.3.1 Problem of the resettab!e integrator
Figure 4 shows the output of the resettable integrator. A capacitor is used at the output of the conventional O p - A m p integrator and a switch operated at switching frequency to discharge capacitor. Since the switch has a small on-time voltage a n d internal resistance, t h e capacitor cannot be discharged to zero voltage. Finally this operation leads to an offset voltage, Iffl, acrass the capacitor. Therefore this non-ideal characteristic of the switch introduces an oifsei voltage at rile integrator output.
F r o m equations (2), (5) and ( l l ) , the supply current can be written as
Since the sensing resistance is small, the o f i s e ~ in the supply current will be significant even for a small offset voltage. This offset shifts the zero crossing point and causes malfunction t o the controller. Also this o r t h o g o n a l DC-offset line c u r r e n t i n t r o d u c e s an addirional unwanted resistive loss in the circuit.
2.3.2 Solution to the resettable integrator offset voltage
Figwe 5 shows an auxiliary integrator circuit, which eliminates the offset at the outpl-~t of t h e resettable i n t e g r a t o r . H e r e t h e auxiliary integral c o n t r o l l e r reguiates the offset current to get a negative voltage.
T h e n this output is added t o the resettable irltegrztor outpui co cancel the offset elfect.
3 EhqTDC/PSCAD SIMULATION OF ACTIVE POWER FILTER CONTROL TECHNIQUE The proposed APF control was simulated using PSCAD Version 4.0. C ~ ~ r r e n t waveforms of the APF, Load, and the Source were plotted when the source rms voltage Vs
= 100
V,
and the frequency f = 50 Hz. T h e DC-link voltage was set t o 200 V. The switching frequency of t h e p o w e r M O S F E T is set by resetting integrator at a constant frequency of 50 kHz.Figure 6 shows the schematic PSCAD simulation diagram of the APF. I n this circuit, a pre-charging arrangement is added to the DC-link capacitor t o charge the capacitor during the startup period. The charging arrangement is disconnected using a circuit breaker after a specified time. An auxiliary loop has been added t o
Mirrch 2006 Jorirnnl of the A'atzoncrl Sczence Forrndltton of Srz Lanka 34(1)
Constant frequency control of an active power filter 2
r
4.2 D r i v e r circuit a n d p r o t e c t i o n f o r t h e DC-link
Figure 8 shows protection and driver circuits. Here two IR 2104 ICs are used t o drive t h e power MOSFETs of the single-phase H-bridge. T h e IR 2104 driver has a shut d o w n terminal (SD), which gives off signal t o all the MOSFETs when t h e SD terminal voltage becomes less
-
7.-;
I than 2.5 V. This facility is used for the fast protection t o the DC-link voltage.Figure 4: Integrator output with offset voltage
RESULTS
control technique t o eliminate the DC-offset voltage caused by the resettable integrator. I n the auxiliary loop, a PI controller is used t o regulate the error and eliminate t h e DC-offset voltage. T h e simulation was carried out f o r several types of harmonic and p o o r power factor loads. Results s h o w excellent p e r f o r m a n c e of t h e proposed APF, which compensates for the harmonic and reactive power currents independent of the load types.
4 L A B O R A T O R Y SETUP OF T H E ACTIVE P O W E R FILTER
EMTDC/PSCAD simulation results obtained with non-linear load.
Figure 9 shows the simulation results of source voltage and current waveforms when a full- bridge diode rectifier load is connected. T h e results s h o w that t h e load produces heavy harmonic current. T h e A P F injected c u r r e n t a n d s o u r c e c u r r e n t waveforms s h o w t h e excellent compensation of the proposed device even for a higher harmonic load. T h e second graph shows that t h e A P F m a i n t a i n s t h e s o u r c e c u r r e n t n o t o n l y sinusoidal but also in-phase with the source voltage with this load.
4.1 Circuit diagram of the control circuitry
Laboratory experimental result obtained for the Figure 7 shows the control circuitry used t o implement
the proposed APF. High Frequency (high siew rate) op- amp LM 318 is used for the resettable integrator and a DG411 analog switch is used t o reset the capacitor of the resettable integrator. T h e values of resistances, used in the resettable integrator, are selected with 100
k~
t o reduce the loading effect at the voltageVm
and all other fixed resistances have t h e value of 10 K O . LM 324 op- amp is used for all the other application circuits.bridge rectifier load
Figure 10 shows t h e experimental results of source current waveforms with the bridge rectifier load. Figure 10 (a) and (b) were taken respectively without and with the APF. This shows clearly that with the APF, the source current is free from the heavy harmonic current produced by the load. Also the similarity of Figures 9 and 10 shows a strong validation of the simulation and the experimental results.
Integrator I S *Rs
Reset
-
int
4
L,Figure 5: Elimination of offset voltage by an integrator loop
j o ~ ~ r n a l of the Nutzonol Sczence Fo~rndation of Sri Lanka 34(1) March 2006
2 6 G. Ramtharan e! ul.
CONCLUSION effective hardware instead of a costly DSP system.
Therefore it is suitable for small industries, (ii) The rating of APF depends only on the particular load and An APF control is proposed with detailed mathematical
neighbourhood loads do not affect it, (iii) This APF is derivation considering offset at the analog integrator.
This control is simulated using E M T D C / P S C A D not only used to eliminate harmonic currents but also used f o r power factor correction, (iv) T h e A P F computer package. Finally a laboratory model was
guaranteed that no offset would be in the sogrce current.
designed and the proposed APF was tested successfully.
The simulation and experimental results validate the
Acknowledgement proposed control technique.
The authors acknowledge the support received from the There are four major advantages with this APF: (i)
Department of Electrical and Electronic Engineering, The control algorithm is implemented by a simple cost
University of Peradeniya for this work.
Figure 6: PSCAD Simulation schematic diagram of APF
Figure 7: Simplified hardware control circuitry --
March 2006 journal ofthe Nuttonal Sctnce Foz~ndatton of Srt Lunka 34(1)
Constant frequency control of a n uctzve power filter
Figure 8: Simplified hardware protection and driver circuitry Vf
Figure 9: Source voltage and current waveforms for a bridge rectifier load withAPF in operation
a) Without APF b) With APF
A P F
Figure 10: Source current waveforms with a bridge rectifier load
Vf
1v =
.* -T - - Shutdown,-
- 0 T e n n l n a l
- - --- - - - - -- -
Jo~i,nal of the Natronul Scrente Forlndation o f Sri L ~ r n k d 34(Q illarch 2006
Drlver A
I K 2 1 0 4
I S * R S ) S hu t down C o m p a r a t o r T e r m l n a l I R 2 1 0 4
D r i v e r B
G. Ramtharan et al.
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Marcl~ 2006 Jo~o-nai of the Ricrttonal Sc~ence For(ndatzon of Srz Lanka 34(1)
