ASIC Implementation of Present Cipher for IoT Application

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ASIC Implementation of Present Cipher for IoT Application

Anitha Kumari S1_{, Mahalinga V Mandi}2

1_{PG Student,}2_Professor 1,2_{Depatrtment of ECE}

1,2_{Dr. Ambedkar Institute of Technology, Bengaluru, Karnataka, India} Email: [email protected]

DOI: http://doi.org/10.5281/zenodo.3406945

Abstract

Nowadays, Lightweight Cryptography is gaining importance in the field of data or information security as the number of smart devices are increasing and the information shared between them are being subjected to threat by the intruder. The intruder can change or steal the information. So, there is a need for securing the information transferred between the smart devices. It is also to be noted that the smart devices are comprised of RFID Tag’s and sensor nodes. They use limited resources, less area, less memory space and are battery powered requiring high level of security as they have very constrained environment. The cryptographic algorithm designed for use in such a small and constrained environment to provide high level security is PRESENT Cipher. This Cipher is developed for small Internet of Things (IoT) devices which are being able to communicate with each other through internet. In this paper ASIC implementation of PRESENT Cipher and its methodology is discussed. The simulation, synthesis and physical design of PRESENT cipher is performed using Cadence.

Keywords: ASIC, Cadence innovus, IoT, Lightweight Cryptography, Modelsim, physical design, PRESENT Cipher

INTRODUCTION

Lightweight Cryptography is aimed to produce Lightweight implementations which are ‘Light as feathers’ virtually without turning over the security level too much. The main aspect of Lightweight cryptography is to utilize the security coherence trade-off’s intrinsic in Cryptographic algorithms implementation. Lightweight cryptography is used in IoT devices using IoT application. The main factors involved in the implementation of a device for lightweight cryptography are speed, circuit size, memory size, delay, power and power consumption. The small devices having constrained environment uses lightweight cryptography in prior [1, 2]. An example of Lightweight cryptographic algorithm is PRESENT Cipher. PRESENT Cipher is an example of Block Cipher and performs symmetric

Key encryption. The main philosophy involved in the design of PRESENT is its Simplicity. The PRESENT Cipher is mainly hardware optimized. In this paper we will discuss the structure of PRESENT cipher, its working and ASIC implementation.

PRESENT CIPHER AND ITS METHODOLOGY

PRESENT is an example of Block Cipher and is a Substitution-Permutation Network (SPN) based Cipher [3] It is a symmetric block cipher and uses a single key both for encryption and decryption of data. It consists of 31 rounds and each round has three layers i.e., Add Round Key, Substitution layer and Permutation Layer. It uses a block size of 64 bit and a key size of 80 bit or 128 bit. The structure of PRESENT cipher for one round is shown

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in Fig. 1.

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Figure 1: (a) Round function in PRESENT and (b) Structure of present. Each round in PRESENT [3, 4] consists

of three stages: • AddRoundKey

• Substitution layer or S-Box

• Permutation Layer or P-layer

Using the Key Scheduling Algorithm the 80 bit Key provided by the user is divided into 64 bit keys at each round. This keys

are called Round keys or sub keys. Later the Plain text along with these round keys are put through various levels of confusion and diffusion to obtain the encrypted data. The operation of the different layers used in round function are as follows:

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operation between the block of Plain text and the Round Keys.

Substitution Layer (S-Box)-The substitution layer consists of 16 S-Boxes having 4-bit input and 4-bit output (4x4). The same S-Boxes are used in both Data path and Key Scheduling.4x4 S-Boxes are chosen over 8x8 S-Box as

they occupy only quarter the area occupied by 8x8 S-Box. It takes in the Ex-OR’ed bit generated by the previous stage and performs substitution on the bits. The S-Box Table [4-6] used in PRESENT algorithm is as shown Table 1

Table 1: S-Box used in PRESENT algorithm.

Permutation Layer-It changes the position of the bits and is simply terms as rewiring in hardware implementation [4]. The 4 bit output of the previous S-Boxes are fed to

all the other 4 bit S-Boxes in the further rounds. The PRESENT Algorithm bit permutation layer table is shown in Table 2

Table 2: Permutation table used in PRESENT algorithm.

The SPN [2, 5] performs several levels of confusion and diffusion over the Block of data’s and yields the Cipher text or encrypted data. It uses S-boxes and

P-layers alternatively and generates a cipher block by using the Paintext and the input keys. The SPN network of Present is as shown in the below Fig. 2.

Figure 2: SPN network. KEY SCHEDULING ALGORITHM

PRESENT can take either 80 or 128 bit

key. In this work we are concentrating on 80 bit key size. Initially the key provided

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by the user is stored in the key register (K) [4] represented as:

K79K78…………..K0

At each ith round the 64 bit round key Ki=k63k62………..k0 contains the leftmost 64 bits of the current contents in the Key register (K). Thus at round i Key register has

Ki=k63k62………..k0 =K79K78…………..K16 After the round key is extracted the the updation of the key register is as follows

• Rotating the Key register to the left by 61 bit positions given as

[k79k78…………k1k0]=[k18k17……….k20k19]

• By passing the leftmost four bits to the S-Box of PRESENT given as

[k79k78k77k76]=S[k79k78k77k76]

• The round counter value i is EX-OR’ed with the bits k19,k18,k17,k15,k16 of K having the least significant bit of the round counter on the right

[k19k18k17k15k16]=[k19k18k17k15k16]⊕ro und_counter

The key scheduling and the datapath structure of the PRESENT algorithm is shown in Fig. 3

Figure 3: Datapath and key scheduling in PRESENT. APPLICATION TO TEXT MESSAGE

ENCRYPTION

In the proposed Application the text message, 64 bit present data and 80 bit key is taken as input. On applying PRESENT algorithm to the present input data and the key a 64 bit encrypted data is obtained and it is considered as an encrypted key which is the output of the present block. The encrypted output key of the PRESENT Cipher block is Exclusively OR’ed with the input text message. This process of

EX-ORing the encrypted data key of the PRESENT with text message covers the encryption part. The output of this process is a 64 bit Cipher text. Later the 64 Bit Cipher text and the encrypted data (key) are Exclusively-OR’ed to convert the cipher text into original text message. This process is the decryption part. Finally after encryption and decryption the original user provided text message was obtained at the output. The block diagram of the proposed system is shown in Fig. 4.

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Figure 4: Encryption and decryption of text message using PRESENT algorithm. RESULTS AND DISCUSSIONS

Simulation Results

The proposed application was simulated in Modelsim and was coded in Verilog language [7-9]. The text message was encrypted and decrypted successfully. The obtained result is shown in Fig. 5.

The Plaintext considered is ASCII character and using 80 bit key in Hexadecimal. The encrypted message obtained is as shown in Fig. 5. At the Decryption, the same 80 bit key is used to get back the Plaintext [10-12].

Figure 5: Simulation result of PRESENT cipher for encryption and decryption of text

message

The Physical layout of the proposed Algorithm obtained using Cadence

Innovus tool in 45nm Technology is shown in Fig. 6.

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The area and power reports generated by Genus (TM) Synthesis Solution 17.22-s017_1 were obtained as shown in Table 3 and Table 4.

Table 3: Area report of the proposed

system.

INSTANCE 64 BIT

Cell Count(mm^2) 1.2

Cell Area (mm^2) 10.99 Total Area(mm^2) 10.99

Table 4: Power report of the proposed

system. CELLS 1200 LEAKAGE POWER(mW) 69.12 DYNAMIC POWER (mW) 2.2 TOTAL POWER (mW) 2.26 CONCLUSION

In this work, the encryption and decryption of proposed PRESENT algorithm was performed and the output was obtained successfully. The ASIC synthesis and implementation was performed using Cadence software with 45nm technology. The total area was found to be 10.99 mm^2 and total power is found to be 2.26 mW. With less area and less power constrained obtained it is very much sure that this type of lightweight cryptographic algorithm are well suited for resource constrained environments.

REFERENCES

1. Hinpreet Kaur, Sakyhivel R (2016), “VLSI Implementation of Lightweight Cryptography Algorithm”, Advances in System Science and Application,

Volume 16, Issue 1, pp. 95−101. 2. Panasayya Yalla, Jens-Peter Kaps

(2009), “lightweight cryptography for FPGAs”, In International Conference on Reconfigurable computing and FPGAs.

3. Carlos Andres Lara-Nina, Arturo Diaz-Perez, Miguel Morales-Sandovas (2017), “Lightweight hardware architecture of PRESENT cipher in FPGA”, In IEEE transactions on

circuits and System I, pp. 1−7.

4. A Bogdanov et al (2002), “PRESENT: An ultra-lightweight block cipher”,

Cryptographic Hardware and Embedded Systems (Lecture Notes in Computer Science), pp. 450–466. 5. EB Kavun, T Yalcin (2011),

“RAM-based ultra- lightweight FPGA implementation of PRESENT”, In Proc. Int. Conf. Reconfigurable Comput. FPGAs (ReConFig), pp. 280– 285.

6. N Hanley, M O’Neill (2012), “Hardware comparison of the ISO/IEC 29192-2 block ciphers”, In Proc. IEEE Comput. Soc. Annu. Symp. VLSI (ISVLSI), pp. 57–62.

7. T Xu, JB Wendt, M Potkonjak (2014), “Security of IoT systems: Design challenges and opportunities”, In Proc. IEEE/ACM Int. Conf. Comput. - Aided Design (ICCAD), pp. 417–423, Piscataway, NJ, USA.

8. CA Lara-Nino, M Morales-Sandoval, A Diaz-Perez (2016), “Novel FPGA-based low-cost hardware architecture for the PRESENT block cipher”, In Proc. Euromicro Conf. Digit. Syst. Design, pp. 646–650.

9. T Macaulay (2017), “Introduction— The Internet of Things”, In RIoT Control: Understanding and Managing Risks and the Internet of Things. Boston, MA, USA: Morgan Kaufmann,

pp. 1–26.

10.D Dinu, Y Le Corre, D Khovratovich, L Perrin, J Großschädl, A Biryukov (2015), “Triathlon of lightweight block ciphers for the Internet of Things”, In Proc. NIST Lightweight Cryptogr. Workshop.

11.M Kneževi´c, V Nikov, P Rombouts (2012), “Low-latency encryption— Is ‘lightweight = light + wait?”, In Cryptographic Hardware and Embedded Systems. Berlin, Germany: Springer, pp. 426–446.

12.X Guo, Z Chen, P Schaumont (2008), “Energy and performance evaluation

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of an FPGA-based SoC platform with AES and PRESENT coprocessors”, In

Embedded Computer Systems: Architectures, Modeling, and Simulation. Berlin, Germany: Springer, pp. 106–115.

Cite this article as: Anitha Kumari S, & Mahalinga V Mandi. (2019). ASIC Implementation of Present Cipher for IoT Application. Journal of VLSI Design and Signal Processing, 5(3), 12–18.