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University of Windsor University of Windsor

Scholarship at UWindsor

Scholarship at UWindsor

Electronic Theses and Dissertations Theses, Dissertations, and Major Papers

1-1-1971

A Hardware Fixed-Point Multiplier/Divider.

A Hardware Fixed-Point Multiplier/Divider.

Nicholas Arpad Balatoni University of Windsor

Follow this and additional works at: https://scholar.uwindsor.ca/etd

Recommended Citation Recommended Citation

Balatoni, Nicholas Arpad, "A Hardware Fixed-Point Multiplier/Divider." (1971). Electronic Theses and Dissertations. 6655.

https://scholar.uwindsor.ca/etd/6655

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by

NICHOLAS ARPAD BALATONI

A Thesis

Submitted to the F a c u l t y o f Graduate Stud ies through the Department o f E l e c t r i c a l Engineering in P a r t i a l F u l f i l l m e n t o f the Requirement f o r the Degree of

Master of Applied Science a t the U n i v e r s i t y o f Windsor

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APPROVED:

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ABSTRACT

T h i s work des cr ibe s the design and implementation o f a lo w - c o s t

Hardware F i x e d - P o i n t M u l t i p l i e r / D i v i d e r to be used p r i m a r i l y w i t h

the PDP-8/S computer.

I t was deemed advantageous t o have the use o f such a de v ic e

i n s i t u a t i o n s where n e i t h e r an Extended A r i t h m e t i c Element nor the

Data Break F a c i l i t y were a v a i l a b l e and where a t the same time f a s t

M u l t i p l i c a t i o n and D i v i s i o n o p e r a t i o n s were r e q u i r e d - such a p p l i c a ­

t i o n s may occur i n o n - l i n e c o n t r o l and i n g r a p h i c s . The dev ic e

c on s tr u c t e d has a maximum M u l t i p l i c a t i o n time o f 90 microseconds,

a minimum M u l t i p l i c a t i o n time o f 18 microseconds, and a D i v i s i o n time

o f 155 microseconds. The speed thus obtained i s a t l e a s t 15 times

f a s t e r than the speed obt ain ed using s ub ro ut in e M u l t i p l i c a t i o n and

D i v i s i o n .

The de v ic e c o n s i s ts o f t h r e e 1 2 - b i t r e g i s t e r s which make up the

main working a r e a s , a s e r i a l A d d e r / S u b t r a c t e r , two 4 - b i t counters

and the a p p r o p r i a t e M u l t i p l i e r and D i v i d e r C o n t r o l l e r s a t an ap­

proximate c o s t o f $2000.

To ac hi e v e M u l t i p l i c a t i o n the Leech A l g o r i t h m was used i n

which the l a s t t h r e e d i g i t s o f the M u l t i p i i e r a re compared and ac­

c o r d i n g l y t he a p p r o p r i a t e o p e r a t i o n i s c a r r i e d o u t . For D i v i s i o n ,

the Booth A l g o r i t h m was adopted. In t h i s method the f i r s t b i t o f the

D i v i s o r and the f i r s t b i t o f the P a r t i a l Remainder a re compared and

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f e a t u r e s and the M u l t i p l i e r / D i v i d e r proved to be a v a l u a b l e a d d i t i o n

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ACKNOWLEDGEMENTS

The aut hor wishes t o express hi s a p p r e c i a t i o n to

Dr. P. A .V . Thomas f o r his s u p e r v i s i o n and continuous a s s i s ta n c e

durin g the course o f t h i s r e s e a r c h . Fur th erm or e, the a u t h o r ' s thanks

go to the N a t i o n a l Research Council o f Canada f o r i t s generous

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ACKNOWLEDGEMENTS « V

TABLE OF CONTENTS Vt

LIST OF ILLUSTRATIONS v i i i

LIST OF TABLES i x

Chapter

I- INTRODUCTION

1.1 P r e l i m i n a r y Co n s id e r a ti o n s 1

1 . 2 General O u t l i n e 5

I I PHILOSOPHY OF DESIGN

2.1 Algo rithm s Used 9

2 . 1 . 1 M u l t i p l i c a t i o n Algo rithm s 9

2 . 1 . 2 D i v i s i o n Al gor it hm s 17

2 . 2 Basic Timing Requirements: M u l t i p l i e r 20

2 . 3 Basic Timing Requirements: D i v i d e r 22

I I I SYSTEM LOGIC

3.1 " M u l t i p l i c a n d / D i v i s o r " R e g i s t e r (AR) 26

3 . 2 "Ac c um ul a to r/ Di v id e nd /M o s t S i g n i f i c a n t

R e s ul t" R e g i s t e r (BR) 28

3 . 3 “M u l t i p l i e r / Q u o t i e n t / L e a s t S i g n i f i c a n t

R e s ul t" R e g i s t e r tDR) 31

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3 . 5 Pulse Counter 43

3 . 6 Cycle Counter 48

3 . 7 L e f t / R i g h t S h i f t Pulse and Level C o n t ro l s 53

3 . 8 M u l t i p l i e r C o n t r o l l e r 55

3 . 9 D i v i d e r C o n t r o l l e r 59

3 . 1 0 I / O , C l o c k , and Flag C i r c u i t s 61

3.11 T o t a l Sequence o f O per ati on 64

IV PERFORMANCE

4 . 1 Cost R e a l i z a t i o n 67

4 . 2 Speed R e a l i z a t i o n 68

4 . 3 R e l i a b i l i t y and Accuracy w i t h E r r o r

Discussion 71

V USE AND LIMITATIONS

5.1 I n s t r u c t i o n Set 73

5 . 2 M u l t i p l i e r Programme 76

5 . 3 D i v i d e r Programme 77

5 . 4 Some L i m i t a t i o n s 77

5 . 5 F i n a l Conclusions and Suggestions 80

APPENDIX

A Sample C a l c u l a t i o n s 82

B Sample R es ult s 87

REFERENCES 89

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1 - General Arrangement o f R e g i s t e r s , Adder/

S u b t r a c t e r , Counters and C o n t r o l l e r s 7

2 Flow Diagram f o r M u l t i p l i c a t i o n 16

3 Flow Diagram f o r D i v i s i o n 21

4 Timing Pulses f o r M u l t i p l i e r 23

5 Timing Pulses f o r D i v i d e r 25

6 " M u l t i p l i c a n d / D i v i s o r " R e g i s t e r (AR) 27

7 "A c c um ul a to r/ Di v id e nd /M o s t S i g n i f i c a n t

Re s ul t" R e g i s t e r (BR) 29

8 " M u l t i p l i e r / Q u o t i e n t / L e a s t S i g n i f i c a n t

R e s u l t " R e g i s t e r (DR) 32

9 A d d e r / S u b t r a c t e r 42

10 Pulse Counter 44

11 Cycle Counter 50

12 L e f t / R i g h t S h i f t Pulse and Level Control 54

13 M u l t i p l i e r C o n t r o l l e r 56

14 D i v i d e r C o n t r o l l e r 60

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LIST OF TABLES

T a b l e Page

l . a Booth A l g o r i t h m f o r M u l t i p l i c a t i o n 11

l . b Leech A lg o ri t h m f o r M u l t i p l i c a t i o n 13

2 Booth A l g o r i t h m f o r D i v i s i o n 19

3 H a l f - A d d e r f o r ( X+Y ) 36

4 F u l l - A d d e r f o r ( X+Y ) 37

5 H a T f - S u b t r a c t e r f o r ( X-Y ) 38

6 F u l l - S u b t r a c t e r f o r ( X-Y ) 39

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1.1 P r e l i m i n a r y C o n s i d e r a t i o n s .

When thought i s given to the design o f a M u l t i p l i e r / D i v i d e r ,

some p r e l i m i n a r y s p e c i f i c a t i o n s must f i r s t be o u t l i n e d . T h i s in c l u d e s

a re v ie w o f a l r e a d y e x i s t i n g require men ts w i t h thought being given to

the environment in which the de v ic e w i l l be used and t o e x i s t i n g f e a s ­

i b l e equipment and components t h a t a r e a v a i l a b l e to the d e s i g n e r .

The need t h a t gave r i s e t o the i n i t i a l , idea o f a Hardware

F i x e d - P o i n t M u l t i p l i e r / D i v i d e r came about because o f the a v a i l a b i l i t y

o f an i n s t a l l a t i o n t h a t c o n s is ts o f a PDP-8/S D i g i t a l Computer and

i t s a s s o c ia t e d p e r i p h e r a l d e v i c e s . T h is computer is one o f the

e a r l i e r l o w - c o s t mini-computers o f the D i g i t a l Equipment Company.

The PDP-8/S computer i s equipped w i t h a bus-type I / O channel making

i t s u i t a b l e f o r the a d d i t i o n o f 64 p e r i p h e r a l d e v i c e s . These devices

a re e x t e r n a l to the computer proper and a re r e a d i l y programmable

through t h e r e g u l a r I / O channels w i t h the a i d o f the I / O s k i p f a c i l i t y .

The a r i t h m e t i c u n i t provided i n the PDP-8/S i s a o n e - b i t f u l l

s e r i a l a d d e r, and, using i t , s u b t r a c t i o n may be performed by f i r s t

making one number ne g a ti v e and then per forming an a d d i t i o n . With

t he hi g h e r l i n e o f PDP computers t h e r e is an Extended A r i t h m e t i c

E l e m e n t ( E A E ) a v a i l a b l e w h i c h c a n a l s o b e u s e d f o r M u l t i p l i c a t i o n

and f o r D i v i s i o n . The EAE performs p a r a l l e l a r i t h m e t i c op e ra t i o n s

on p o s i t i v e b in a r y numbers o n l y . Because o f i t s p a r a l l e l n a t u r e , i t

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2

from 9 . 0 to 2 1 . 0 microseconds and a d i v i s i o n in a tim e o f 3 6 . 5 m i c r o ­

seconds. However, on these hig he r l i n e s o f PDP computers, the sub­

r o u t i n e f o r signed m u l t i p l i c a t i o n r e q u i r e s 4 0 . 5 to 6 6 . 0 microseconds

and the s u b r o u t i n e f o r signed d i v i s i o n r e q u i r e s 6 5 . 0 microseconds.

By comparison, i t i s p o s s i b l e t o perform signed m u l t i p l i c a t i o n and

signed d i v i s i o n on the PDP-8/S using s u b r o u t i n e s , but the m u l t i p l i ­

c a t i o n s u b r o u t i n e , as observed in an ac tua l t e s t programme, r e q u i r e d

up t o 6 m i l l i s e c o n d s ; t h i s i s o f course v e ry slow. I t must be

considered f u r t h e r t h a t memory and processor i n s t r u c t i o n times on the

hi g h e r l i n e s o f computers range from 1 . 5 to 4 . 0 microseconds,

compared w i t h times o f 2 0 . 0 t o 4 0 . 0 microseconds per i n s t r u c t i o n on

th e PDP-8/S. The EAE f u r t h e r m o r e r e q u i r e s t h e presence o f the Data

Break F a c i l i t y a v a i l a b l e on the PDP-8 but not a v a i l a b l e on the PDP-8/S.

Thus, times o f up to 100 microseconds f o r m u l t i p l i c a t i o n and 160

microseconds f o r d i v i s i o n , ex c lu d in g sto ra g e t i m e s , would be deemed

q u i t e rea s o na b le and advantageous f o r the proposed d e v i c e .

I t can be e a s i l y concluded then t h a t s u b r o u t i n e m u l t i p l i c a t i o n

and d i v i s i o n a r e not f e a s i b l e t o use i n a p p l i c a t i o n s where l o g i c a l

d e c i s i o n s i n v o l v i n g these two o p e r a t i o n s , or where f r e q u e n t use o f

these op e ra ti on s , a r e r e q u i r e d t o t a k e place r a p i d l y . Such a p p l i ­

c a t i o n s may e a s i l y occur i n o n - l i n e c o n tr o l and in g r a p h i c s .

U n d e n i a b l y , the s p e e d o f the de v ic e and i t s c os t must be o f

prime i n t e r e s t . To gain speed two t h i n g s may be co n si de re d, namely,

the type o f components t h a t w i l l be used and the type o f a r i t h m e t i c

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d e v i c e com pa ti bl e w i t h the PDP-8/S, DEC components p r o v i d e the l o g i c a l

types o f modules t o be used. The two types o f n e g a t i v e l o g i c

modules a v a i l a b l e a re the 2MHZ and the 10 MHZ modules. Thus, to gain

a t best f i v e times the speed, the high speed components should be

used which would p r a c t i c a l l y double the cost o f t he proposed d e v i c e .

S i m i l a r i l y , t o gain speed in the a r i t h m e t i c , p a r a l l e l

o p e r a t i o n s should be adopted. The d i f f e r e n c e i n c o s t i s however

p r o h i b i t i v e due t o t he f a c t t h a t i n s t e a d o f having one A d d e r / S u b t r a c t ­

e r as f o r s e r i a l a r i t h m e t i c , in p a r a l l e l a r i t h m e t i c one Adder/Sub­

t r a c t e r i s r e q u i r e d f o r each b i t o f the 12 b i t r e g i s t e r s used.

The answer t o the re q ui re m e n t problem must l i e then i n the

time c r i t e r i a placed on a s i n g l e m u l t i p l i c a t i o n and on a s i n g l e

d i v i s i o n . To gain an idea o f thes e t i m e s , an examination of the

c a p a b i l i t i e s and requirements o f the a l g o r it h m s used i s c a l l e d f o r .

The a l g o r i t h m s , found in S e c t io n 2 . 1 , suggest t h a t s i x c y c le s a r e r e ­

q u ir e d f o r M u l t i p l i c a t i o n , and tw e lv e cy c le s f o r D i v i s i o n .

Co nsid er ing a p a r a l l e l A d d e r / S u b t r a c t e r and 4 pulse times per c y c l e ,

M u l t i p l i c a t i o n would r e q u i r e 24 pulse times o r le s s .due to the

e x i s t e n c e o f the Fa s t Op er ati o n which can occur under c e r t a i n con­

d i t i o n s t o be discussed l a t e r . Considering 3 pulse times per c y c l e

and 11 f u l l c y c le s plus one s h o r t c y c l e , d i v i s i o n would r e q u i r e 34

puls e t i m e s . I f a s e r i a l A d d e r / S u b t r a c t e r i s c o n s i d e r e d w i t h t w e l v e

pulse times per A d d i t i o n or S u b t r a c t i o n , a M u l t i p l i c a t i o n would

r e q u i r e 90 pulse times or l e s s , and d i v i s i o n would r e q u i r e 155 pulse

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4

I f the most expensive proposal were adopted ( 10MHZ modules

and p a r a l l e l o p e r a t i o n ) M u l t i p l i c a t i o n and D i v i s i o n times o f 5 and

7 microseconds r e s p e c t i v e l y could be a c hie ve d. Since an I / O

i n s t r u c t i o n time on the PDP-8/S is 38 microsecond^, such speed i s not

j u s t i f i e d f o r the added cost because o f a l l th e overhead, or

unused, t i m e .

I f the s e r i a l A d d e r / S u b t r a c t e r were used and 10MHZ modules,

18 and 30 microseconds may be r e a l i z e d f o r t he M u l t i p l i c a t i o n and

D i v i s i o n o p e ra t i o n s r e s p e c t i v e l y . Th is would indeed c o n f i n e the

d e v i c e o p e r a t i o n time w i t h i n one I / O i n s t r u c t i o n t i m e . However, i f

the p r i c e d i f f e r e n c e i s considered between t he 10MHZ and 2MHZ

modules, and the f a c t too t h a t some i n t e r f a c i n g i s r e q u i r e d between

the two types i f used i n com bi n a tio n, the proposal i s s t i l l an

u n j ' u s t i f i a b l y expensive one.

L e t the proposal which was f i n a l l y accepted be now c o n s id e r e d ,

t h a t i s , using s e r i a l a r i t h m e t i c and 2MHZ components. I t was found

t h a t the maximum speed o b t a i n a b l e , due t o c a r r y propa gat ion in

counters ( 4 stages) and i n s h i f t r e g i s t e r s is 1.3MHZ. However,

c o n s id e r in g 1MHZ o p e r a t i o n , each pulse time ( tim e from the s t a r t

o f a pulse t o the s t a r t o f the n e x t ) i s one microsecond. Th is then

y i e l d s a M u l t i p l y time o f 90 microseconds or l e s s , and a D i v i s i o n time

o f 1 5 5 mic r o s e c o n d s . C o n s i d e r i n g t h e p r e s e n c e o f the F a s t - O p e r a t i o n ,

the minimum time f o r a M u l t i p l i c a t i o n i s 18 microseconds ( 6 cy c le s

o f 3 puls e times e a c h ) . An I / O Skip f a c i l i t y i s a v a i l a b l e a t no

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D i v i s i o n o p e r a t i o n should exceed one I / O i n s t r u c t i o n t im e . The

M u l t i p l i c a t i o n O p e r a t i o n , the main purpose o f the d e v i c e , never

exceeds 3 1 / 0 times and in most cases i t can be completed w i t h i n

2 I / O t i m e s , i e . 76 microseconds. Since i t i s expected t h a t

D i v i s i o n w i l l be much les s used than M u l t i p l i c a t i o n , t he performance

times thus ac qu ire d a re q u i t e a c c e p t a b l e . At t h i s t i m e i t should be

f u r t h e r poin te d out t h a t the d e v ic e w i l l be a b l e t o M u l t i p l y and

D i v i d e 1 2 - b i t signed b i n a r y numbers which g iv e s the added advantage

o f no t having t o perform sign conversions by s o f t w a r e . Th is would

i n d i c a t e an advantage even over the EAE, a u n i t which f u r t h e r r e q u i r e s

the Data Break F a c i l i t y . Furth erm ore , since t he M u l t i p l i e r / D i v i d e r

i s an e x t e r n a l d e v i c e , i t i s r e a d i l y usable n o t o n l y w i t h the PDP-8/S

but w i t h o t h e r PDP 1 2 - b i t word computers.

1 . 2 General O u t l i n e .

I t i s p o s s ib l e to d e s c r i b e the M u l t i p l i e r / D i v i d e r by d i s ­

cussing i n general terms t he major se c tio ns o f i t s block diagram.

Because one may m u l t i p l y two 1 2 - b i t signed b i n a r y numbers, by

the n a t u r e o f M u l t i p l i c a t i o n the r e s u l t w i l l y i e l d i n many cases a

b i n a r y number t h a t i s more than 1 2 - b i t s but never more than 2 4 - b i t s

lon g. Thus, i t i s necessary to prov ide a double le n g th r e g i s t e r from

which the r e s u l t can be e x t r a c t e d in two t w e lv e b i t segments through

the r e g u l a r programmed I / O cha n ne ls . The u n i t then r e q u i r e s two

s i n g l e le n g th r e g i s t e r s which a t the end o f the o p e r a t i o n w i l l

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6

r e s u l t .

Fu rth er m or e, i t i s necessary t o load i n - t h r o u g h t he I / O

c ha n n e ls - the two numbers on which the a r i t h m e t i c o p e r a t i o n i s to be

performed. In order t o r e t a i n t he M u l t i p l i c a n d w h i l e the i n t e r m e d i a t e

o p e r a t i o n s , a d d i t i o n and s u b t r a c t i o n , t a k e p l a c e a t h i r d r e g i s t e r i s

necessary. I t i s found t h a t d u r i n g the D i v i s i o n o p e r a t i o n t h i s

t h i r d r e g i s t e r w i l l c o n ta i n the D i v i s o r .

For i d e n t i f i c a t i o n purposes, l e t the r e g i s t e r used t o s t o r e

the M u l t i p l i c a n d / D i v i s o r be c a l l e d the A - R e g i s t e r (AR). Also the

r e g i s t e r t o hold t he Most S i g n i f i c a n t R e s u l t or in D i v i s i o n , the

D i v i d e n d , s h a l l be c a l l e d the B - R e g i s t e r ( B R ), and the t h i r d r e g i s t e r ,

t o hold th e L e a s t S i g n i f i c a n t R e s u l t / M u l t i p l i e r / Q u o t i e n t , s h a l l be

c a l l e d the D - R e g i s t e r ( D R ) .

These t h r e e r e g i s t e r s p r o v i d e the main working areas i n t o

which data i s lo a d e d , i n which a l l s h i f t i n g t ake s p l a c e , in which

the i n t e r m e d i a t e r e s u l t s a r e held and from which the f i n a l answers a re

e x t r a c t e d . F i g u r e 1 gi ve s the Block Diagram form of the M u l t i p l i e r /

D i v i d e r .

Also noted i n F i g u r e 1 , the f o u r t h major bl o ck in the

diagram i s th e A d d e r / S u b t r a c t e r . An i n s p e c t i o n o f th e a l g o r it h m s in

Se c ti on 2. 1 shows t h a t i n some cases i t i s necessary t o perform an

A d d i t i o n b e t w e e n t h e c o n t e n t s o f AR and BR, a n d i n o t h e r c a s e s a

S u b t r a c t i o n o f the conte nts o f AR from BR i s r e q u i r e d . I n 2 ‘ s

complement a r i t h m e t i c , a S u b t r a c t i o n may be performed by complement­

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From C o n t r o l l e r s

1 i

Add

✓ I From

Clock

Bi t Delay

Control 1er D i v i d e r Counters

Mul t i pi i e r

C o n t r o l ! e r

D-Reg i s t e r B - R e g i s t e r

A-Regi s t e r

Adder/ S u b t r a c t e r

FIGURE 1.

General Arrangement o f

R e g i s t e r s , A d d e r / S u b t r a c t e r ,

(19)

8

when the F u l l A d d e r / S u b t r a c t e r was developed from) Boolean Functions

( r e f e r t o Se c ti on 3 . 4 ) , t t was found t h a t a F u l l Adder and a F u l l

S u b t r a c t e r were r e a d i l y combined such t h a t t h e A d d i t i o n or S u bt ra c ­

t i o n o f two 1 2 - b i t signed numbers y i e l d e d the c o r r e c t l y signed

1 2 - b i t r e s u l t , w i t h o u t the need f o r the complement and increment

o p e r a t i o n .

The blo ck l a b e l l e d "COUNTERS" serves t h e purpose o f

g e n e r a t i n g and d i s t i n g u i s h i n g from each o t h e r the t w e lv e OS pulses

necessary f o r A d d i t i o n or S u b t r a c t i o n , and t h e c o n t r o l pulses OA, OB,

OX and OY used f o r s h i f t purposes. There a r e two counters however,

one being the Pulse Counter and t he o t h e r being the Cycle Counter.

These a r e d e a l t w i t h in d e t a i l in Sect ions 3 . 5 and 3 . 6 r es p e c ­

t i v e l y .

Not i nc lu ded in the blo ck diagram a re two major s e c tio ns

t h a t c o n t r o l the M u l t i p l i c a t i o n and D i v i s i o n processes which are

d e t a i l e d i n Sections 3 . 8 and 3 . 9 r e s p e c t i v e l y . These u n i t s compare

the a p p r o p r i a t e d i g i t s o f AR, BR and DR, y i e l d i n g d e c i s io n s as to

which pulses a re a p p l i e d to the r e g i s t e r s and whether A d d i t i o n ,

S u b t r a c t i o n or n e i t h e r i s t o be c a r r i e d out i n each c y c l e o f the

p a r t i c u l a r o p e r a t i o n .

For s i m p l i c i t y i n t he block diag ram , t h e c l o c k , f l a g s and

I / O c o n t r o l c i r c u i t s a r e a l s o o m i t t e d , b u t t h e y a r e d i s c u s s e d a t

(20)

C h a p t e r II

P H I L O S O P H Y OF DESIGN

2.1 A lgo rit hm s Used.

2 . 1 . 1 M u l t i p l i c a t i o n A l g o r i t h m s .

The most common forms o f auto ma tic m u l t i p l i e r s a r e the s e r i a l

and p a r a l l e l t y p e , as discussed by P . A .V . Thomas T h e i r g r e a t

l i m i t a t i o n i s t h a t they a r e a b l e t o handle p o s i t i v e numbers o n l y ,

such t h a t a c o r r e c t i v e s u b ro ut in e must be int ro du ce d when n e g a t i v e

numbers must a ls o be handled. T h e i r mode o f o p e r a t i o n i s one o f

continued a d d i t i o n , one a d d i t i o n f o r each b i t o f the e n t i r e word

l e n g t h . This occurs i n a s e r i a l m u l t i p l i e r where only one adder is

u t i l i z e d . I n the p a r a l l e l m u l t i p l i e r , one adder i s r e q u i r e d f o r

each b i t i n the word l e n g t h . To the above l i m i t a t i o n must then be

added one o f slow speed or high c o s t r e s p e c t i v e l y in the two cases

mentioned.

Since i t was decided t o use th e s e r i a l mode o f o p e r a t i o n , a

(o\

scheme suggested by Dr s. A.D. Booth and K .H .V . B o o t h v 'was

i n v e s t i g a t e d . This scheme i n v o lv e s a s e r i a l m u l t i p l i e r which y i e l d s

the c o r r e c t l y signed product o f two signed i n p u t numbers. The

method compares the l e a s t s i g n i f i c a n t b i t o f the M u l t i p l i e r w i t h an

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10

s u b t r a c t s the M u l t i p l i c a n d to the P a r t i a l Product i n the accumulator.

T h is occurs i f these two d i g i t s t h a t a r e compared d i f f e r from each

o t h e r . I f the two d i g i t s a re the same, the P a r t i a l Product i s l e f t

u n a l t e r e d . The c o n te n t o f the M u l t i p i i e r R e g i s t e r and Accumulator

a r e s h i f t e d one pl ac e t o the r i g h t i n each c y c l e f o r the number of

cyc les as t h e r e are b i t s in a word l e n g t h . On a 1 2 - b i t word on

low speed modules and s e r i a l o p e r a t i o n t h i s would mean a M u l t i p l i c a ­

t i o n time o f a pp ro x im a t e ly 170 microseconds.

I n quest f o r a f a s t e r method o f M u l t i p l i c a t i o n , the method

proposed by J.W. Leech^^was adopted i n which the l a s t two

s i g n i f i c a n t d i g i t s o f the M u l t i p l i e r R e g i s t e r , along w i t h the e x t r a

M u l t i p l i e r R e g i s t e r b i t , a r e compared and the M u l t i p l i e r and P a r t i a l

Product a r e r i g h t - s h i f t e d t w i c e , i n t h i s manner almost h a lv i n g the

M u l t i p l i c a t i o n time w i t h o n l y a s l i g h t in c r e a s e in c o s t .

The Booth A l g o ri t h m f o r M u l t i p l i c a t i o n may be simply s t a t e d

in t a b u l a r form as shown in Ta b le l . a . In th e t a b l e , the P a r t i a l

Product i s given t he s h o r t form PP, the M u l t i p l i e r , MLR, and the

M u l t i p l i c a n d i s shortened to MND.

Motitig t h a t o n l y two d i g i t s a re compared, the l a s t M u l t i p l i e r

b i t and the e x t r a b i t a s s oc ia te d w i t h the M u l t i p l i e r R e g i s t e r , on ly

f o u r combinations o f these two b i t s can occur. A c c o r d i n g l y , the

(22)

TABLE 1 .a

BOOTH ALGORITHM FOR MULTIPLICATION

M u l t i p l i e r D i g i t s

O p e r a ti o n Performed

bn bn+l

*

•—

1

o

o

«

o

*

o S h i f t PP and MLR one p la c e r i g h t

Add MND t o PP and s h i f t PP and MLR one p l a c e to th e r i g h t

S u b t r a c t MND from PP and s h i f t PP and MLR one p l a c e to th e r i g h t

S h i f t PP and MLR one p l a c e t o the r i g h t

(23)

r e l a t i v e l y si mp le . Booth and Booth f u r t h e r o f f e r a r e c u r s i v e formula

f o r the above process and t h i s formula is giv e n i n Equation ( 1 )

below.

an-p = O / 2 ) *an- p + i + ( b n- p + l ~ bn - p ^ M; f o r P=1 > ( h - 1 )

In t h i s equ ati o n a'n i s t he v a lu e o f the accumulator a t t he p

stage o f the proces s, and M i s the v a l u e o f t h e M u l t i p l i c a n d .

On the basis o f t h i s r e c u r s i v e f o r m u l a , Booth and Booth g i v e

a c o n s t r u c t i v e pr oof by means o f a s t a g e - w i s e s u b s t i t u t i o n o f the

v al ues o f 1p 1. A f t e r the s u b s t i t u t i o n s , a l l the equations are

r\ 1

m u l t i p l i e d by a power o f 2 , namely 2 p“ , then t he equa tions are

summed and r ea r ra n ge d to form an equation o f the type a-j = b.M and

i n t h i s way the A l g o ri t h m i s proved.

As noted e a r l i e r , the r e c u r s i v e for mula encountered by Booth

and Booth i s a r e l a t i v e l y simple one due t o t h e f a c t t h a t o n l y two

d i g i t s a r e compare and on ly the f o u r p o s s i b l e combinations must be

accounted f o r . When a t t e n t i o n i s d i r e c t e d t o the Leech A l g o r i t h m ,

i t i s found t h a t t h r e e d i g i t s are compared. Th is g iv e s r i s e to

e i g h t d i f f e r e n t p o s s i b l e patterns-. To show t h i s , the Leech

A l g o r i t h m f o r M u l t i p l i c a t i o n i s now s t a t e d i n t a b u l a r form as shown

below in T a b l e l . b in which a l l a b b r e v i a t i o n s o f Ta b le l . a hold and

a l l s h i f t i n g i s t o the r i g h t .

(24)

TABLE l . b

LEECH ALGORITHM FOR MULTIPLICATION

M u l t i p i i e r D i g i t s

O per ati on Performed

bn - l bn bn+l

0 0 0 F a s t - O p e r a t i o n , 2 P o s t - S h i f t s o n ly

0 1 0 Add MND to PP, 2 P o s t - S h i f t s

1 0 0 1 P r e - S h i f t , S u b t r a c t MND from PP, 1 P o s t - S h i f t

1 1 0 S u b t r a c t MND from PP, 2 P o s t - S h i f t s

0 0 1 Add MND to PP, 2 P o s t - S h i f t s

0 1 1 1 P r e - S h i f t , Add MND t o PP, 1 P o s t - S h i f t

1 0 1 S u b t r a c t MND from PP, 2 P o s t - S h i f t s

(25)

any l i t e r a t u r e , and as a consequence, i t was decided t o c o n s t r u c t a

r e c u r s i v e formula t h a t would com ple te ly d e s c r i b e the A l g o r i t h m . A

more complex for mu la was expected and the equa tion t h a t was f i n a l l y

found i s as shown i n Equation ( 2 ) .

an - 2 p = ( 1 / 8 ) - an - 2 p + 2 ^ 2" ^ 1 / 2 ^ * ^ bn - 2 p + brt-2p+l T 2bn - 2 p - l ^ "

l bn - 2 p " bn - 2 p + l 1 ^ - H + 0 / 2 ) • ( l bn-2 p + 2 + bn-2p+3 "

2bn - 2 p + l ^ * ^ " l bn-2p+2 " bn - 2 p + 3 I ^ + ^ bn - 2 p “ bn - 2 p - l ^

^ " bn - 2 p " bn - 2 p - l ^ * l bn - 2 p “ bn - 2 p + l ^ * M

The n o t a t i o n used f o r Equation ( 1 ) a l s o a p p l i e s f o r Equation ( 2 ) .

The c o e f f i c i e n t , 1 / 2 , i n Equation ( 1 ) appears because a r i g h t s h i f t

i s performed d u ri n g each c y c l e . This r i g h t s h i f t i s the d i g i t a l

e q u i v a l e n t o f m u l t i p l y i n g by 1 / 2 . Thus i t i s not s u r p r i s i n g to f i n d

t he c o e f f i c i e n t 1 / 8 i n Equation ( 2 ) f o r , i f two p o s t - s h i f t s and one

p r e - s h i f t t a k e p la c e b e f o r e the a d d i t i o n or s u b t r a c t i o n , the c o e f ­

f i c i e n t m u l t i p l y i n g the 1 / 8 i s 1. I f o n l y two p o s t - s h i f t s have

occurred be f o r e the a d d i t i o n or s u b t r a c t i o n , t h i s c o e f f i c i e n t i s 2.

Th i s i s a l s o the case i f a p o s t - s h i f t and a p r e - s h i f t haye taken

p l a c e . I f on ly one p o s t - s h i f t occurred b e f o r e the a d d i t i o n or

s u b t r a c t i o n , the c o e f f i c i e n t i s 4 . The m u l t i p l y i n g c o e f f i c i e n t

b e f o r e the accumulator term thus becomes 1 / 8 , 1 / 4 , 1 / 4 or 1 / 2

depending on whether 3 , 2 or 1 s h i f t s have o c c u rre d.

(26)

in a c o n s t r u c t i v e p r o o f , th e equ ati on a t each stage must be

m u l t i p l i e d by the power o f two t h a t has occurred i n t he previous -i, r

s t a g e .a nd to t h a t power must a l s o be added th e number o f p o s t - s h i f t s

and p r e - s h i f t , i f any, t h a t have occurred j u s t b e f o r e the a d d i t i o n

or s u b t r a c t i o n t h a t i s about to t a k e pla ce d u rin g t h i s s t a g e .

Due t o the c o m p l e x it y o f the equations and the d i f f i c u l t i e s

which a r i s e from i t , a c o n s t r u c t i v e pr oo f w i l l not be o f f e r e d here.

However, a sample c a l c u l a t i o n showing the method i s given in the Ap­

pe n di x . The mere purpose o f the above d is c u s s io n i s t o p o i n t out

how the c o m p le x it y Of the r e c u r s i v e for mula in c r e a s es as more

d i g i t s o f the M u l t i p l i e r a re compared a t each stage o f the

M u l t i p l i c a t i o n process. In passing i t may be f u r t h e r mentioned t h a t ,

i f an a l g o r i t h m were designed such t h a t f o u r d i g i t s would be

compared a t a t i m e , t h r e e r i g h t s h i f t s would have t o be c a r r i e d out

a t each stage and the whole M u l t i p l i c a t i o n could be c a r r i e d out in

f o u r c y c l e s . The d i f f e r e n c e in the time r e q u i r e d f o r a M u l t i p l i c a t i o n

i n t h i s way would o f course not j u s t i f y th e c o m p l e x i t y t h a t would

a r i s e i n th e c o n t r o l c i r c u i t s o f the process.

Thus, the Leech A l g o r i t h m was adopted f o r M u l t i p l i c a t i o n

because th e time f o r one M u l t i p l i c a t i o n could be halved i n

comparison to the Booth Method and because the d i f f e r e n c e i n costs

was found to be a c c e p t a b l e even when the in c r e a s e in the c os t o f

the more complex c o n t r o l l e r l o g i c was c on s id e re d.

The Flow Diagram f o r M u l t i p l i c a t i o n i s given i n Fi g ur e 2 where

(27)

16

FIGURE 2.

Flow Diagram f o r M u l t i p l i c a t i o n

CYCLES PULSES OPERATION

F i r s t

5

Cycles

OA Advance CC; Set Add/Sub F F ; O pt io n a l P r e - S h i f t o f BR and DR.

> DRio=t

(Fa«

J

Not (

)Rn =DRb ; t Op. )

DR-, n- D R - . D R . ) n _ - I * *, .

10i 11 b Perform A d d i t i o n or i S u b t r a c t i o n during a l l

(1 2) Long Oper ations

OX Op ti on a l P o s t - S h i f t o f BR and DR

OY

P o s t - S h i f t o f BR and DR; C l e a r Pulse Counter

L a s t

Cycle

OA Advance CC; Set Add/Sub FF; Op tional P r e - S h i f t o f BR and DR.

>

Fas

>

X

Long 0

t Op.

' ieZL

P* Perform A d d i t i o n or S u b t r a c t i o n during a l l

Long Oper ations (1 2)

OX Opti ona l P o s t - S h i f t o f BR and DR

(28)

c y c le s r e q u i r e d and w i t h r e s p e c t to the number o f pulses r e q u i r e d

per c y c l e .

2 . 1 . 2 D i v i s i o n A l g o r it h m s .

To achi ev e D i v i s i o n on a b i n a r y base computer, t h e r e a r e two

a l t e r n a t i v e processes a v a i l a b l e , namely, the standard t r i a l and

e r r o r method and the n o n - r e s t o r i n g method.

In the f i r s t case, the D i v i s o r i s compared w i t h the P a r t i a l

Remainder a t each s u b - o p e r a t i o n , and i f the former q u a n t i t y i s the

l e s s e r , a s u b t r a c t i o n i s performed and a ' 1 ' i s added to the l e a s t

s i g n i f i c a n t b i t o f the Q u o t i e n t R e g i s t e r . I f , however, the D i v i s o r

i s g r e a t e r than the P a r t i a l Remainder, then nothing i s done except

a zero i s added to the l e a s t s i g n i f i c a n t end o f the Q u o ti e n t

R e g i s t e r . The Q u o t ie n t and the P a r t i a l Remainder a re then doubled

( i e . s h i f t e d l e f t one p l a c e ) and the u n i t i s ready f o r the ne x t sub­

o p e r a t i o n i n the D i v i s i o n process.

To ac hieve the above process i n hardware, the e a s i e s t method

t o use i s t o s u b t r a c t the Q u o ti e n t from the P a r t i a l Remainder, t e s t

the sign and, i f n e g a t i v e , add the D i v i s o r back t o the P a r t i a l

Remainder. The l i m i t a t i o n s o f t h i s method a re t h a t only p o s i t i v e

numbers can be handled and the method i s slow c o n s id e r in g the number

o f r e - a d d i t i o n s t h a t must take p l a c e .

The s e c o n d m e t h o d , w h i c h was f o u n d t o b e p r e f e r a b l e an d w h i c h

was adopted f o r t h i s work, i s the n o n - r e s t o r i n g method. As (2)

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18

p o s i t i v e and n e g a t i v e numbers and r e q u i r e s no r e - a d d i t \ o n s t o t a k e

p l a c e . The time o f a l l D i v i s i o n o p e ra t i o n s i s thus f i x e d a t as niany

word le n g th s as t h e r e a r e b i t s i n one word. I n t h i s case a word i s

t w e l v e b i t s long.

L e t i t be assumed t h a t the D i v i s o r (m) i s s t o r e d i n the

A-R e g i s t e r ( A A-R ) , the Dividend ( a ) i n B - A-R e g i s t e r (BA-R ), and the Q u o ti e n t

(b ) w i l l appear i n the D - R e g i s t e r (DR) a t th e completion o f the

D i v i s i o n process. The Booth A l g o ri t h m as s t a t e d by Booth and Booth

i s given in Ta b le 2.

I t should be noted t h a t i n the D i v i s i o n process i n t e g e r s are

not ob tai n ed i n the Q u o t i e n t . The form o f th e answer i s such t h a t

a b i n a r y p o i n t e x i s t s a f t e r the sign b i t . As an example the number

0 . 1 0 000 000 000 r e p re s e n ts the r e s u l t 1 / 2 . T h i s occurs because by

t h e n a t u r e o f the A l g o ri t h m the Q u o t i e n t , a/m = b , i s generated o n l y

i n cases where m > a . I t i s thus r e q u i r e d t o s c a l e th e v a l u e o f m

i n cases where m < a u n t i l m > a. The D i v i s i o n i s then c a r r i e d out

and the Q u o t i e n t may be r e - s c a l e d to o b t a i n the t r u e v a lu e o f the

r e s u l t .

Booth and Booth g i v e a c o n s t r u c t i v e p r o o f i n d e t a i l based on

t he f o l l o w i n g r e c u r s i v e for mu la :

r k = 2 r k - i + 0 - 2bk )-"'

where r^ i s the remainder a f t e r the k o p e r a t i o n and b. i s the ■f* h

k d i g i t o f the P a r t i a l Remainder ( b ) . A s t a g e -w i s e s u b s t i t u t i o n

(30)

TABLE 2.

BOOTH ALGORITHM FOR DIVISION

Sub-Operation R e s u l t o f Comparison O p e r a ti o n Performed

1 to ( n - 1 ) ARo = BR0 a ) Add 2 " ( n_1) t o DR

b) S h i f t BR and DR l e f t

c) S u b t r a c t AR from BR

1 to ( n - 1 ) AR0 f BRq a) Add zero to DR

b) S h i f t BR and DR l e f t

c) Add AR t o BR

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20

a p p r o p r i a t e power o f two. The equ ations thus ob tai n ed a re then added

and the r e s u l t i n g equ ati o n i s r ea r ra n ge d u n t i l an expression is

obt aine d i n the form a/m = Q u o t i e n t . The r e s u l t generated i s c o r r e c t

i n a l l r es p e c ts except f o r the s i g n . To c o r r e c t the sign u n i t y i s

added to the r e s u l t . The above scheme ge n e ra te s the t r u e Q u o t i e n t ,

a/m, r e g a r d l e s s o f the signs o f 'a* and 'm*.

I n T a b l e 2. i t i s shown t h a t 2 - ^n_^ i s added to the Q u o ti e n t

i n t he t w e l f t h or l a s t c y c l e . Th is i s o p t i o n a l s in c e i t s purpose i s

t o g i v e t he l e a s t biased r o u n d - o f f e r r o r as w i l l be discussed in

S e c t i o n 4 . 3 . A sample c a l c u l a t i o n i s given in the Appendix.

The Flow Diagram f o r D i v i s i o n i s given i n F i g u r e 3 , in which

a D i v i s i o n i s de s c ri be d w i t h r e s p e c t t o the number o f cyc les

r e q u i r e d and w i t h r e s p e c t t o the number o f pulses r e q u i r e d per c y c l e .

2 . 2 Basic Timing Requirements: M u l t i p l i e r .

According to the M u l t i p l i c a t i o n A l g o r i t h m , s i x basic cy c le s

a re r e q u i r e d to accomplish the M u l t i p l i c a t i o n o p e r a t i o n . The pulse

req uir eme nts i n each c y c l e are no t n e c e s s a r i l y t he same because 15

pulses a re r e q u i r e d in a c y c l e i n v o l v i n g a Long Op er ati o n and on ly

3 pu ls es a r e necessary i n a c y c l e i n v o l v i n g a Fa s t O p e r a ti o n .

I n both types o f c y c l e s , the f i r s t pulse i s the OA pu ls e .

T h is p u l s e i s n e c e s s a r y i n c a r r y i n g o u t a p r e - s h i f t , an i n i t i a l

r i g h t s h i f t o f BR and DR, f o r s e t t i n g a f l i p - f l o p t o block ou t

the o p t i o n a l OX p u l s e , f o r g e n e r a t i n g the Jam Pulse i n t he Fa s t

(32)

FIGURE 3.

Flow Diagram f o r D i v i s i o n

CYCLES PULSES OPERATION

Fi r s t

10

Cycles

OA

Advance CC; Set Add/Sub FF; Add ' 1 ' or 'O' t o DR

OB L e f t S h i f t BR and DR

OS

( 1 2 ) Perform A d d i t i o n or S u b t r a c t i o n

L a s t

Cycl e

OA Advance CC; Set Add/Sub F F ; Add ' 1 ‘ or 'O' to DR

OB L e f t S h i f t BR and DR

OS (1 2 )

Perform A d d i t i o n or S u b t r a c t i o n

On 0S-|2 Complement DRQ and Produce

(33)

22

de s ir e d s t a t e .

In t he Fast O p e r a t i o n , the Jam Pulse advances the Pulse

Counter by 12. I n the Long O p e r a t i o n , a f t e r t h e OA p u l s e , 12 pulses

a r e produced t o c a r r y out the a d d i t i o n or s u b t r a c t i o n . These tw e lv e

OS pulses a re channeled t o AR and BR, and a l s o t o the A d d e r / S u b t r a c t e r .

A f t e r the OA pulse i n the Fa s t O p e r a t i o n , and a f t e r O S ^ in

the Long O p e r a t i o n , two more pulses a r e produced, OX and OY. Each

o p e r a t i o n r e q u i r e s two r i g h t s h i f t s due to t h e number o f b i t s being

compared. When a p r e - s h i f t has taken pl ac e on pulse OA, the r i g h t

s h i f t o f BR and DR a re blocked out on t he OX p u l s e , and the mand­

a t o r y second r i g h t s h i f t occurs on the OY p u l s e . When no p r e - s h i f t

has taken p l a c e , the r e q u i r e d two r i g h t s h i f t s are performed using

the OX and OY p u ls e s .

In F i g u r e 4 a re shown diagrams o f t he t i m i n g pulses f o r the

d i f f e r e n t types o f cy c le s encountered along w i t h the t o t a l sequence

o f pulses f o r a complete M u l t i p l i c a t i o n .

2 . 3 Basic Timing Requirements: D i v i d e r .

No a l g o r i t h m i c s h o r t c u t s have been i n c o r p o r a t e d i n t o the

D i v i s i o n process, making the f i r s t eleven cy c le s i d e n t i c a l as a l l

pulses a re mandatory.

The process begins w i t h g e n e r a t i n g an OA p u l s e . On t h i s

pulse the A d d / S u b t r a c t F l i p - F l o p is s e t t o t he d e s i r e d s t a t e and

a ls o a ' 1 ' or 'O' i s added i n t o the l e a s t s i g n i f i c a n t b i t o f DR,

(34)

FIGURE 4 .

M u l t i p l i e r Timing

Long O p e r a t i o n , 2 P o s t - S h i f t s

0A

---I

I

I

I

i

I

I I

OS

OX

OY

Long O pe ra tio n w i t h P r e - S h i f t

OA

OS

OX

OY

F a s t O per ati on

OA

OS

OX

OY

Complete T y p i c a l M u l t i p l i c a t i o n

OA

OS

OX

OY

I I

I

I

I

I

I I

1 I

L

I_____ L

I I I J . . J . J 1 1 1 .... 1 1 1

1 1 1 1 1 1

(35)

24

the Cycle Counter by one.

The next pulse t h a t i s generated is t he OB p u l s e , the s o l e

purpose o f which is t o perform a s i n g l e l e f t s h i f t on BR and DR.

T h i s s h i f t could not be performed on the OA pulse s inc e DR-j-j r e q u i r e s

a t l e a s t 400 nanoseconds to s e t t l e when i n i t i a l l y pulsed by OA.

A f t e r OB, the tw e lv e OS pulses are gen e ra te d. These pulses

perform the a d d i t i o n or s u b t r a c t i o n as d i c t a t e d by t he A d d / S u b t ra c t

F l i p - F l o p .

Once the el even i d e n t i c a l cy c le s have been completed, the

* D i v i s i o n i s e s s e n t i a l l y f i n i s h e d . However, as s t a t e d in the

d is c u s s io n o f the a l g o r i t h m , a t the completion o f the D i v i s i o n o p e ra ­

t i o n the sign b i t i s i n c o r r e c t . Thus a t w e l f t h c y c l e i s necessary to

c o r r e c t t h i s c o n d i t i o n . I t c o n s i s t s o f a s i n g l e pulse which changes

the sign o f the Q u o t i e n t by complementing DRQ. A c t u a l l y i t was

found t h a t since the D - R e g i s t e r i s pulsed o n l y on the OB p u l s e s ,

the 0 S-J2 pulse o f the e l e v e n t h c y c l e can be used t o c o r r e c t the

s i g n .

I n F ig u r e 5 a r e shown an example o f t he e le v e n i d e n t i c a l cycles

and an example o f the t w e l f t h c y c l e pulse t i m i n g , w h i c h occurs in

r e a l i t y on the O S ^ pulse and i s used f o r s h u t - o f f and f o r the

(36)

F i r s t Eleven I d e n t i c a l Cycles

OA — I--- :_____ ;______

QB — 1---

---Eleve nth Cycle S h u t - O f f Timing

OA---— ^---

---O B ______ I____________________________

(37)

---26

CHAPTER I I I

SYSTEM LOGIC

3.1 M u l t i p l i c a n d / D i v i s o r R e g i s t e r (AR).

T h i s r e g i s t e r , as i t s name i m p l i e s , i s m a i n l y used f o r the

s t or age o f the M u l t i p l i c a n d and the D i v i s o r . By n e c e s s i t y , the

sto ra g e must be n o n - d e s t r u c t i v e s in c e these two numbers a r e necessary

i n each stage o f the M u l t i p l i c a t i o n or D i v i s i o n o p e r a t i o n s . The

c i r c u i t diagram o f AR i s shown i n FIGURE 6.

The f a c i l i t i e s necessary a r e the d i r e c t c l e a r , load i n , and

t he r i g h t s h i f t o p e r a t i o n s , in a d d i t i o n to which i t must be a

c i r c u l a t i n g s h i f t r e g i s t e r in or de r t o r e t a i n th e 1 2 - b i t number

s tor ed in i t . I t was found t h a t the R-205 F l i p - F l o p was v e r s a t i l e

enough t o meet the above r e q u i r e m e n t s . The bussed d i r e c t c l e a r

t e r m i n a l s achi ev e th e c l e a r o p e r a t i o n . The t h i r d DCD gate in each

F l i p - F l o p achieves the l o a d - i n o p e r a t i o n by bussing the pulse i n p u t .

Also the l e v e l i n p u t o f each DCD gate is the corresponding ou tpu t l i n e

from the Accumulator of t he PDP-8/S.

The DCD gates a t the gated Set and gated C l e a r t e r m i n a l s a re

used f o r s h i f t i n g by cro s s -c o n n e c ti n g the o u t p u t o f the previous

F l i p F l o p t o the l e v e l in p u t o f the DCD gates o f the f o l l o w i n g F l i p

-F l o p . T h u s when t h e p u l s e i n p u t s o f t h e s e DCD g a t e s a r e pu l s e d , t h e

s h i f t i n g o f the con tents o f one F l i p - F l o p t o t he n e x t i s a c hi e v e d.

To c r e a t e the c i r c u l a t i n g r e g i s t e r , the ou t p u t o f the l a s t F l i p - F l o p

(38)
(39)

28

F I i p - F l o p o f AR.

Fur th er m or e, i t i s necessary t o make the conte nts o f A R^

a v a i l a b l e t o the A d d e r / S u b t r a c t e r a t each i n s t a n c e o f s h i f t i n g . AR

thus becomes t he r e q u i r e d c i r c u l a t i n g sto ra g e r e g i s t e r .

3 . 2 Ac c um u la t o r /D iv id e n d /M o s t S i g n i f i c a n t R e s u l t R e g i s t e r ( B R ) .

Beside p r o v i d i n g a f a c i l i t y f o r l o a d in g i n t he D i v i s o r , t h i s

r e g i s t e r i s a l s o used as an accumulator t o hold the P a r t i a l Product

d u ri n g the i n t e r m e d i a t e steps o f M u l t i p l i c a t i o n o p e r a t i o n . The

c i r c u i t diagram o f BR i s shown in FIGURE 7 .

Due t o the f a c t t h a t D i v i s i o n was a l s o include d in the hard­

w a re , i t became necessary t o pro v id e not only the r i g h t s h i f t but

a l s o the l e f t s h i f t f a c i l i t y . Fu rth er m or e, t he d i r e c t c l e a r , load

i n and unload f a c i l i t i e s were a l s o found necessary. Thus, t h e DEC

R201 modules, which pro v id e f i v e DCD i n p u t gates were s e l e c t e d . Two

o f these gates a r e used f o r r i g h t s h i f t i n g as n e c e s s i t a t e d i n

M u l t i p l i c a t i o n , two more a r e used f o r l e f t s h i f t i n g as r e q u i r e d in

D i v i s i o n , and the f i f t h DCD gate i s used f o r lo a d i n g in d a t a .

To achi ev e the unload f a c i l i t y , one o u t p u t ga te had to be

provided f o r each F l i p - F l o p in the r e g i s t e r . The R123 NAND-gate

module was s e l e c t e d f o r t h i s purpose so t h a t , when these gates are

p u l s e d , th e conte nts o f

BR

a re t r a n s f e r r e d t o the PDP-8/S accumulator

through the I / O c a b l e s . The outputs o f th e f i r s t b i t , i e .

B R q ,

a r e

compared i n D i v i s i o n w i t h the outputs o f ARQ t o det erm ine the

o p e r a t i o n t h a t i s to be performed. Thus the out puts o f

B R

q a r e fed

(40)

CO.

o

o

4 ■*.

k.

i I*

(41)

30

must be made a v a i l a b l e t o the A d d e r / S u b t r a c t e r in M u l t i p l i c a t i o n and

i n D i v i s i o n . Furthermore the outputs o f BR^-j must a l s o be s up pl ie d

t o DRq in M u l t i p l i c a t i o n v i a the r i g h t s h i f t l e v e l c o n t r o l , f o r ,

e f f e c t i v e l y in t he process BR and DR form a double l e n g th r e g i s t e r

f o r the 2 4 - b i t r e s u l t o f M u l t i p l i c a t i o n .

A g a in , r i g h t s h i f t i s achieved by the c ro s s -c o n n e c ti o n o f the

o u t p u t of the lower b i t to the l e v e l i n p u t o f the ne x t hig her b i t .

L e f t s h i f t on the o t h e r hand i s accomplished by the c ro s s -c o n n e c ti o n

o f th e out put o f the hi g h e r b i t to t he l e v e l i n p u t o f the DCD ga te

o f the next lower b i t . I n both types o f s h i f t i n g the r e s p e c t i v e p a i r s

o f DCD gates a re pulsed a t the same time when r e q u i r e d v i a the

pulse in p u t s o f these g a t e s .

During the i n t e r m e d i a t e o p e r a t i o n s o f A d d i t i o n or S u b t r a c t i o n ,

the DCD g a t e l e v e l in p u t s o f BRq (on r i g h t s h i f t s ) a re obtained

from t he o u t p u t o f the A d d e r / S u b t r a c t e r . Fu rt h er m o r e, on the r i g h t

s h i f t s p o s s i b l e on OA, OX and OY d u ri n g M u l t i p l i c a t i o n , the f i r s t

b i t , namely BRQ, must remain unchanged. Thus BRQ i s r i g h t s h i f t e d

o n ly on the t w e l v e OS p u l s e s , whereas BR-j t o BR^ a re r i g h t s h i f t e d

on a l l compulsory r i g h t s h i f t s namely on OA and OY, or on OX and

OY. The r i g h t s h i f t DCD gate pulse i n p u t s a r e thus bussed on BR-j to

BR^ whereas the r i g h t s h i f t pulse in p u t s o f BRq a re obtained d i r e c t l y

f r o m t h e OS p u l s e s o u r c e . I n D i v i s i o n , th e l e f t s h i f t pulse inp ut s a re

obtained f o r a l l BR b i t s from t he OB pulse source (with the a i d o f

(42)

3 . 3 M u l t i p l i e r / Q u o t i e n t / L e a s t S i g n i f i c a n t R e s u l t R e g i s t e r (DR).

The o p e r a t i n g c h a r a c t e r i s t i c s o f DR a re indeed s i m i l a r t o

those o f BR, because DR i s e f f e c t i v e l y the lower s e c t i o n o f a double

le n g th r e g i s t e r . The D - R e g i s t e r provides a p l a c e o f sto ra g e f o r the

M u l t i p l i c a n d and f o r the L ea st S i g n i f i c a n t Product in M u l t i p l i c a t i o n

and a l s o f o r the Q u o t i e n t i n D i v i s i o n . The c i r c u i t diagram o f DR i s

give n i n FIGURE 8.

Both r i g h t and l e f t s h i f t c a p a b i l i t i e s are included in DR

f o r M u l t i p l i c a t i o n and D i v i s i o n r e s p e c t i v e l y , as w e l l as the d i r e c t

c l e a r , load i n and unload f a c i l i t i e s . The DEC R201 F l i p - F l o p s were

used and two o f i t s f i v e DCD gates were used f o r the r i g h t s h i f t ,

two f o r the l e f t s h i f t and the remaining DCD g a t e was used f o r

load in g in t he M u l t i p l i c a n d d i r e c t l y from the PDP-8/S Accumulator.

I d e n t i c a l t o BR, the R123 Nand gate module was used f o r

unloading d a t a back to the PDP-8/S Accumulator, thus u t i l i z i n g one

g a t e a t t h e ' I 1 p u tp u t o f each F l i p - F l o p o f DR, DRQ t o DR^-j.

A t t h i s p o i n t however DR's s i m i l a r i t y to BR ends. There

i s a t h i r t e e n t h F l i p - F l o p inclu ded i n DR, namely DR^, making DR a

t h i r t e e n b i t r e g i s t e r . The purpose o f t h i s e x t r a b i t i s t o pro v id e

a f a c i l i t y f o r comparing the l a s t t h r e e b i t s of DR as r e q u i r e d in

th e M u l t i p l i c a t i o n A l g o r i t h m . Thus b i t s DR-j q, DR-j-j and DR^ are

e x a m i n e d d u r i n g e a c h c y c l e , w i t h the understanding t h a t DR^ is zero

a t the f i r s t stage o f the M u l t i p l i c a t i o n process. Because a t o t a l

o f t w e lv e r i g h t s h i f t s o f DR a r e used f o r a complete M u l t i p l i c a t i o n ,

(43)

32 to CD :r P CC

w n

-fc o <r

u

''o t ^ c

^ O

1 z*5 ^

(44)

U o' IU <C r/ Ul

- J

Q U t K

Cg.

o

rf\

cQ

co

FI

GU

RE

8.

co

n

tin

u

e

(45)

34

stage w i l l be found in DRb a f t e r t he completion o f the s i x t h or

f i n a l c y c l e . S h i f t i n g i n DR i s achieved by t h e same cro s s -c o n n e c ti o n

and pu l s in g method as descr ibed f o r BR i n S e c t i o n 3 . 2 .

During M u l t i p l i c a t i o n the ' 1 ' and ' 0 ' outputs o f DR-j q, DR-j^,

and DR^ a r e routed to the M u l t i p l i e r C o n t r o l l e r f o r comparison pu r­

poses, and during the OA, OX, and OY pulse times the contents o f BR^

a r e r out ed to DRq by means o f the r i g h t s h i f t l e v e l c o n t r o l . T h i s

Ri g h t S h i f t Level Control i s de s c ri be d i n S e c t io n 3 . 7 .

L

During t he D i v i s i o n o p e r a t i o n DR^ i s n o t used. C o n s i d e r a ti o n

must n e v e r t h e l e s s be given to i t s conte nts because DR i s l e f t

s h i f t e d i n each c y c l e . I t i s found t h a t DR^ must be s e t to zero a t

a l l times in D i v i s i o n in or der t o have DR ^ i n the zero s t a t e

such t h a t i t w i l l be p o s s i b l e t o add a 1 or 0 t o i t on the OA pulse

w i t h o u t o v e r f l o w . When the l e f t s h i f t occurs on OB, DR-j-| w i l l again

become zero ready to accept a 1 or 0 on the OA pulse o f the next

c y c l e . I t may be mentioned t h a t t he ‘ Add 1 t o DR-^' pulse from the

D i v i d e r C o n t r o l l e r i s a p p l i e d t o the s e t t e r m i n a l o f DR-j-j. Thus when

the pulse i s p r e s e nt a ' 1 ‘ i s added to the D - R e g i s t e r and when the

pulse i n p u t i s absent nothing i s done, t h a t i s , e f f e c t i v e l y a 'O' i s

added to DR-j-j.

Because the D i v i s i o n A lg o ri t h m y i e l d s t h e c o r r e c t magnitude

but th e wrong sign o f the Q u o t i e n t , th e t w e l f t h c y c l e o p e r a t i o n ,

changing the s i g n , must be performed on DRQ. I n s t e a d o f a l l o w i n g

the c l o c k to run any f u r t h e r and having t o f i n d i t necessary to bloc k

Figure

General Arrangement ofFIGURE 1.
TABLE 1 .a
FIGURE 2.Flow Diagram fo r M u ltip lic a tio n
TABLE 2.BOOTH ALGORITHM FOR DIVISION
+7

References

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