SUNIL P.B.
H
ere is a binary-to-hexadecimal de-coder that can decode any binary data (up to 24-bits) into its cor-responding hexadecimal data (up to 6 hexadecimal digits). The binary data to be encoded is supplied via inputs of IC1 through IC3, and the output in hexadeci-mal format is displayed on six 7-segmentdisplays as hexadecimal digits.
A number system with base 2 is known as the binary number system. Only two digits, namely, ‘0’ and ‘1’, are used to represent any number in the binary num-ber system, and these are known as bits.
The system has minimal base and it is a positional system, i.e. every position is
assigned a specific weight.
Most computers use the hexadecimal number system with base 16. There are, infact, 16 combinations of 4-bit binary numbers. Any number is represented by 16 distinct symbols, which include numerals ‘0’ through ‘9’ and alphabets ‘A’
through ‘F’. Since numbers and alphabets
Fig. 1: Circuit diagram of binary-to-hexadecimal decoder
are used to represent the digits, this is an alphanumeric number system. Binary and equivalent hexadecimal numbers are shown in the table; since capital B and D cannot be displayed using 7-segment displays, hence lower-case characters ‘b’
and ‘d’ are used instead.
Circuit description
The circuit of the
binary-to-hexadecimal decoder is shown in Fig.1. It works in scanning mode. Nibbles to be decoded are scan-ned sequentially at
regu-lar interval of time.
The scanning circuit comprises three octal buffers (IC1 through IC3), a Johnson ring counter (IC4), and an astable multi-vibrator (IC5).
The scanning clock pulse is generated by NE555 (IC5), which is config-ured for astable operation in the circuit.
Timing ca-pacitor C1 nor-mally charges through resis-tors R1 and R2, but diode D1 bypasses resis-tor R2 during charging of C1.
It discharges towards gro-Fig. 2: Timing diagram of CD4017
Fig. 3: Alternative circuit for EPROM
Number system Segment data Hex
Decimal Binary Hexadecimal D7 D6 D5 D4 D3 D2 D1 D0 EPROM address Equivalent EPROM data
0 0000 0 0 0 1 1 1 1 1 1 000 3F
1 0001 1 0 0 0 0 0 1 1 0 001 06
2 0010 2 0 1 0 1 1 0 1 1 002 5B
3 0011 3 0 1 0 0 1 1 1 1 003 4F
4 0100 4 0 1 1 0 0 1 1 0 004 66
5 0101 5 0 1 1 0 1 1 0 1 005 6D
6 0110 6 0 1 1 1 1 1 0 1 006 7D
7 0111 7 0 0 0 0 0 1 1 1 007 07
8 1000 8 0 1 1 1 1 1 1 1 008 7F
9 1001 9 0 1 1 0 1 1 1 1 009 6F
10 1010 A 0 1 1 1 0 1 1 1 00A 77
11 1011 b 0 1 1 1 1 1 0 0 00B 7C
12 1100 C 0 0 1 1 1 0 0 1 00C 39
13 1101 d 0 1 0 1 1 1 1 0 00D 5E
14 1110 E 0 1 1 1 1 0 0 1 00E 79
15 1111 F 0 1 1 1 0 0 0 1 00F 71
PARTS LIST Semiconductors:
IC1- IC3, IC6 - 74LS244 octal buffer IC4 - CD4017 Johnson ring counter IC5 - NE555 timer
IC7 - 27C32 EPROM IC8 - CD40106 hex inverter IC9 - CD4067, 16 channel
multi-plexer/demultiplexer T1-T6 - BC547 npn transistor D1-D80 - 1N4148 switching diode Resistors (all ¼-watt, ±5% carbon, unless stated otherwise):
R1, R3 - 10-kilo-ohm R2, R18-R23 - 3.3-kilo-ohm R4 - 22-kilo-ohm R5-R10 - 4.7-kilo-ohm R11-R17 - 330-ohm Capacitors:
C1 - 1μF, 10V electrolytic C2 - 0.01 μF ceramic disk C3 - 22pF ceramic disk C4 - 0.1μF ceramic disk C5 - 470μF, 16V electrolytic Miscellaneous:
DIS1-DIS6 - LTS543 common-cathode 7-segment display
Fig. 4: Actual-size, single-side PCB for binary-to-hexadecimal decoder
und through R2 only. Capacitor C2 by-passes any noise to ground, preventing change in the calculated frequency. Con-sequently, the maximum duty cycle is in-creased beyond the normal 50 per cent.
The clock circuit provides 156Hz clock frequency to Johnson decade counter CD4017 (IC4). The complement of the se-rial output (Q0) of shift register is con-nected back to serial input. The resulting circuit is referred to as Johnson counter.
The combination of capacitor C4 and resistor R4 gives power-on-reset pulse to pin 15 (reset) of IC4. When the circuit is switched on, IC4 starts counting from QO to Q5 depending on the timing of clock pulses generated from IC5 and resets at the next output (Q6). Output pin 5 (Q6) of IC4 is connected to reset pin 15 through diode D2. The timing diagram of CD4017 (IC4) is shown in Fig. 2.
The outputs of IC4 are fed to hex in-verter CD40106 (IC8). The inverted out-puts Q0 through Q5 enable buffers IC1 through IC3, respectively. The binary in-puts to be decoded are applied to the inin-puts
of buffers. Four-bit outputs of all buffers are connected together and given to address pins A0 through A3 of EPROM (IC7).
At a time, only one buffer outputs the binary input. When the enable input (EN) goes low, the corresponding buffer out-puts the binary input and applies the same to the address pins (A0 through A3) of EPROM (IC7). At the same time, the correct hex digit is activated by the same output of IC4 (Q0, Q1,…or Q5) using a transistor (T1, T2,… or T5). Thus the cor-rect hexadecimal equivalent of the applied binary digit is displayed in the correct place on 7-segment display DIS1 through DIS6. When the high output from IC4 is applied to the base of the transistor via a current-limiting resistor, the collector of the transistor goes low and enables the corresponding 7-segment display.
The data to display the hexadecimal equivalent of the binary nibble is preloaded in an EPROM. The EPROM is wired to use only 16 memory locations, i.e. it is addressed by address lines A0 through A3. The rest of address lines, i.e. A4 through A11, are grounded.
You can use a smaller EPROM in place of EPROM 27C32, if desired.
The EPROM 2732 can be pro-grammed and erased. (For EPROM programming, refer to the article
‘Manual EPROM Programmer Cum Verifier’ on page 16 of Electronics Projects Vol. 18. For EPROM eras-ing, refer to the article ‘Make Your Own EPROM Eraser with Elec-tronic Timer’ on page 56 of EFY March 2002 or Electronics Projects Vol-23). The EPROM is erased by exposing the EPROM window to UV light for about 30 minutes.
When a binary input is received at the address input of the EPROM, it generates the correct hex data for displaying the corresponding hexa-decimal digit. The data outputs from the EPROM are buffered and avail-able on the segment inputs of the 7-segment display through current-limiting resistors of 330 ohms.
The data to be programmed into the EPROM is given in Table I with address location. When the common pin (3 or 8) of the 7-segment display goes low via transistor, the data available at the output of IC6 activates the respective segment to display the corresponding hexadecimal digit. To avoid flicker-ing, the scanning frequency is
se-Fig. 5: Component layout for the PCB
For those who can’t program the EPROM, an alternative circuit is shown in Fig. 3. The circuit com-prises demultiplexer CD4067 (IC9), an array of diodes D3 through D80, and resistors R18 through R23. One just needs to replace the circuit within the dotted lines in Fig. 1 with the circuit in Fig. 3.
IC CD4067 contains 16 bidirec-tional analogue switches, which have their one side connected to the array of diodes through independent outputs Y0-Y16, re-spectively, and the other side connected to common input (Z) for +5V supply. With enable pin 15 (E) low, one of 16 switches is selected by A0-A3 and connected to data lines D0 through D6 via the array of diodes. All unselected switches are in the high-impedance state (off state).
The demultiplexer works like a binary-to-decimal decoder. Its de-coded outputs are connected to the array of diodes to generate the cor-responding hexadecimal data for the 7-segment display. Outputs D0 through D6 are connected to the input of buffer IC6.
The actual-size, PCB pattern for the binary-to-hexadecimal decoder is shown in Fig. 4 and its component layout in Fig. 5. The circuit operates off a 5V regulated supply.
lected larger than the persistence of
vi-sion of human eyes. The 7-segment dis-play comprises seven light-emitting diodes
with their cathodes connected together.
This configuration is known as common-cathode 7-segment display.