avail-able discrete ICs, it is cost-effective.
System overview
A gate has been provided at the entry of the parking space, which opens on the arrival or departure of a car.
A display section has been provided, which consists of status signals and a dis-play showing the number of cars present in the parking space at any point of time.
After the maximum number of cars have entered the parking space, the gate is automatically disabled (closed) for vehicles seeking entry into the parking lot.
A logic circuit distinguishes between the cars and persons/two-wheelers, so that persons and two-wheelers aren’t not in-cluded in the count for cars.
Block diagram
Fig. 1 shows the block diagram of the automated car park system. The system consists of transmitter, receiver and demultiplexer, up-counter, down-counter, and display sections.
The transmitter section comprises two
infrared transmitters (IR1 TX1 and IR2 TX2), which transmit infrared beams as shown in Fig. 2. These light beams are incident on the corresponding infrared re-ceiver modules (IR3 RX1 and IR4 RX2), which produce an output of 0V if the beam is received uninterrupted and +5V if the beam is interrupted by a car.
Whenever a car enters the parking area, it interrupts the infrared beams in a definite sequence. This sequence is given to the up-count sequence detector, which generates a high output only if the cor-rect sequence has been detected. Simi-larly, when the car leaves the parking area, it generates a fixed sequence, which is given to the down-count sequence de-tector. The down-count sequence detector generates a high output only if the correct sequence is produced by the exiting car.
The outputs of the up-count and down-count blocks are given to the display sec-tion. The display section has a counter and a 7-segment display along with its driver IC to display the count. Depending on the sequence detector that generates an actuating signal, the count is either incremented or decremented. The display section also consists of status signals, which include:
1. A yellow signal to indicate that a car is currently in the process of entering
or leaving the parking space.
2. A green signal to indicate that the parking lot has not reached its maximum capacity, and that space is available for the parking of a car in the parking area.
3. A red signal to indicate that the parking space is full. The activation of this signal coincides with the disabling of the green signal, and is accompanied by the disabling (closing) of the gate for ve-hicles trying to enter the parking lot.
The circuit
The automated car parking circuit (shown in Figs 2 and 3) primarily uses two NE555 timer ICs, four 74LS74 D flip-flops, 74155 2:4 decoder, up/down binary counter 74193, 7-segment display driver CD4511, miniature motor driver L293D, NAND gate IC 7400, and NOT gate IC 7404. In addition, the circuit uses two TSOP 1738 infrared receiver modules, two infrared transmitting LEDs, 7-segment display, and green, red and yellow LEDs, along with three push-to-on switches.
For easy understanding of the circuit, let’s divide the circuit into the following four basic sections:
1. Sensor
2. Sequence detector 3. Counter and display 4. Gate control
The sensor section. This section senses the movement of objects and transfers that information to IC1 in the main circuit. The sensor section can be further divided into the transmitter sec-tion and the receiver secsec-tion. The promi-TABLE I
Truth Table of 74155 (IC1)
Address/Inputs Enable Outputs Truth Table of 7474 (IC5) PIN 2 PIN 13 PIN 5 PIN 9 State
(D1) (D2) Q1 Q2
0 1 0 0 Default. Lower switch S2 closed.
1 0 1 0 First sensor cut. The gate starts opening and lower switch S2 is released.
1 0 1 0 The gate keeps opening.
1 0 0 0 Upper switch S1 closed. The gate stops opening.
0 1 0 1 Car completely enters the parking area. The gate starts closing and upper switch S1 is released.
0 1 0 1 The gate continues to close.
0 1 0 0 The gate pushes lower switch S2 and stops moving.
Back to default states.
Note. Q1 of IC5 is connected to pin 2 of IC11 and Q2 of IC5 is connected to pin 7 of IC11.
Fig. 4: Actual size, single-side PCB for transmitter
Fig. 5: Component layout for PCB in Fig. 4
nent component used in the design of the transmitter and receiver sections is the IR receiver module TSOP 1738. This is a highly selective receiver, which comprises a photodetector and a preamplifier with IR filter in a single package to provide demodulated output. It works efficiently with 1kHz modulation of 38kHz bursts.
This feature of the receiver determines the composition of the transmitted signal.
For generating approximately 38kHz frequency carrier signal modulated by a 1kHz square wave, we use two NE555 timer ICs in astable mode in the
trans-mitter section. One NE555 timer (IC12) is designed to produce a square wave of 1kHz with 50% duty cycle, while the second timer (IC13) is designed to pro-duce a square wave of 38 kHz with 50%
duty cycle. In order to modulate the 38kHz wave, output pin 3 of the first NE555 (IC12) is connected to reset pin 4 of the second NE555 (IC13). The final output of this cascaded arrangement is given to a pair of IR LEDs through current-limiting resistor R5, which prevents the IR LED from getting heated and thus damaged.
The receiver section consists of two
identical receiver circuits, using one in-frared receiver TSOP 1738 each. The output of this receiver is open-collector type, and hence requires a pull-up resistor, whose value must be much greater than 10k. A 4.7μF electro-lytic capacitor must be connected between the supply and ground for this receiver to minimise the interference of spurious signals in the operation of the receiver.
When the signal is received correctly, the original 1kHz squarewave signal is obtained at the output of the receiver. In the absence of the signal, however, a +5V DC level is obtained.
Since the ICs in the following blocks are of TTL family, the re-ceiver output must be TTL compatible.
The +5V DC level occasionally drops to 0V, even when the signal strength is quite low, due to the very high sensitivity of the receiver. This may lead to false trig-gering of the circuit, which must be elimi-nated. For this, a 22μF electrolytic ca-pacitor is connected between the output of the receiver and ground. This capacitor bypasses the square wave to ground and holds the DC value of the signal (which is 0V) in the normal state and +5V when the signal is blocked.
In place of this capacitor, you may also use any capacitor of comparable value.
The output of the sensor section goes to the sequence detection section.
The sequence detection section. This section is the heart of the entire system. It consists of a 2:4 decoder and flip-flops, which are used for the sequence detection.
The 74155 dual 2:4 decoder IC1 receives Fig. 6: Actual-size, single-side PCB for circuit in Fig. 3
Fig. 7: Component layout for PCB in Fig. 6
its select signals at pins 13 (A) and 3 (B) (for one of the decoders) from receivers RX1 and RX2, respectively. The other decoder is not used. The output lines of the enabled decoder are active-low.
For convenience, the receiver before the entrance to the gate is connected to pin 13 of IC1. In default state, each re-ceiver is active and inputs 0 to the de-coder, making the Y0 output line low.
When the first sensor is blocked, the Y1 line goes low. The low-going Y2 line indicates that only the second sensor is blocked. A low Y3 line indicates that both signals have been blocked. Refer truth table of IC1 74155 given in Table I. The four output lines act as decoding and control signals for the remaining circuit.
The sequence detection logic circuit consists of three flip-flops for detecting incoming as well as outgoing vehicles. The Y0 line is connected to the clear pins of all the flip-flops, which gives 0 at their re-spective outputs. A vehicle entering the parking area must interrupt the first sen-sor (before entrance), then both sensen-sors, and finally just the second sensor (after entrance). Thus it must generate states 1 0, 1 1, and 0 1, necessarily in that se-quence.
For identifying the states and the or-der in which they occur, we give the Y2 , Y3, and Y1 lines after logical inversion to the clock inputs of three successive flip-flops, respectively. A Vcc signal is input to the first flip-flop, while each subsequent input is the output of the previous flip-flop. The logic states of the three decoded output lines are inverted because these are active low, while the 74LS74 D flip-flops are triggered by a rising edge of the clock signal.
Only the proper sequence of logic states will cause a high logic at the output of the third flip-flop. Any other sequence will not allow the transfer of the high signal through the series of flip-flops. The output of the third flip-flop is given to the counter-and-display section, which incre-ments the count. Thus when a vehicle enters the parking area, the Y0 signal clears all the flip-flops, and at this very instant, the count is incremented.
An identical circuit is used for detect-ing a vehicle leavdetect-ing the parkdetect-ing area. In this case, however, the states generated by the vehicle are 0 1, 1 1, and 1 0, neces-sarily in that order. Hence the clock sig-nals for the three successive flip-flops are derived from Y1, Y3, and Y2 lines, respec-tively.
The working of this circuit is identical to the one for detecting a vehicle entering the parking area. In this case, the final D flip-flop output is given to the counter-and-display section for decrementing the count. This occurs at the instant when the outputs of the flip-flops are cleared by the low-going Y0 signal (explained in the counter-and-display section).
The counter-and-display section.
This section consists of up-/down-counter IC 74193, BCD-to-7-segment decoder, display driver IC 4511 (to drive a common-cathode 7-segment display), and three LEDs (red, yellow, and green).
The counter IC 74193 is capable of handling up as well as down counts, if configured for the same. The count is incremented by one when a rising edge is encountered on the up pin (pin 5) and decremented by one when a rising edge is encountered on the down pin (pin 4). In our circuit, the former occurs when the vehicle has entered the parking area and line Y0 clears the output of the final flip-flop, causing a transition from the high to low logic state, which, when passed through an inverter, provides a rising edge.
The count decrements in the same fashion when the flip-flops in question are those used for detecting the vehicle leaving the parking area.
The preset data pins of the counter IC are connected to Vcc, while the load data pin is connected to one end of a push-to-on switch whose other pin is grounded.
Such an arrangement can be used to reset the counter, and consequently all the driv-ers and display unit in the circuit. The four BCD output lines of up-/down-counter (74193) are fed to the corresponding pins in the decoder/driver 4511 (IC9). The ac-tive-high outputs of the decoder are con-nected to their corresponding pins in the 7-segment common-cathode display.
The MSB and LSB lines of the outputs of counter IC10 are ANDed using gates N7 and N8. The output from gate N8 is fed to the anode of the red LED, which indicates that nine vehicles are present in the parking area, and there is no further space. This happens because the output of binary 9 on the lines makes the extreme lines high, which gives a high at the other-wise-low anode of the red LED, thus turn-ing it on.
The same signal after inversion is given to the anode of the green LED, which indicates the availability of space for at least one vehicle in the parking area.
The yellow LED indicates that a ve-hicle is either entering or leaving the park-ing area. Hence, this LED must be on when at least one of the sensors is being cut. For this reason, the Y0 line of the decoder is given at the anode of the LED.
When no signal is being cut, the Y0 line is low, keeping the LED off. But as soon as any of the signals is cut, the Y0 line goes high, turning the yellow LED on. The LED indication for various situations is depicted in Table III.
The gate control section. The gate control section consists of IC5, IC4, and IC11, which provide the appropriate logic used for controlling operation of the gate/
barrier.
Assume that the lower position of the barrier is the default position. Now when-ever the input to motor driver IC11 is 1 0, it causes the motor to rotate, thereby caus-ing the barrier to move such that it opens the entrance.
Similarly, when the input to motor driver is 0 1, the motor rotates in the opposite direction to lower the barrier, thereby closing the gate. When the input to the motor driver is 0 0, the motor does not rotate.
When the car has entered the park-ing area completely, the input to the L293D (IC11) is 0 1, causing the motor to rotate such that the gate begins to close till it pushes the lower switch, at which point it stops moving.
Thus, the movement of the gate is au-tomatically controlled on the arrival or departure of a car. Table II gives a clear picture of the working of the gate control section.
In order to disable the gate from open-ing for a vehicle enteropen-ing the parkopen-ing area after the count of 9, we use a simple com-binational logic circuit consisting of NAND
TABLE III LED Indication
Yellow Car is in the process of parking Red No vacancy
Green Parking space available
TABLE IV
Note. 1. Z is high-impedance output 2. *For channel under consideration
and OR gates, whose output is given to enable pin 1 of the L293D motor driver (IC11). In normal condition, the output of this logic circuit is high, enabling IC11.
When the maximum count of 9 is reached, the output of the logic circuit becomes low, thereby disabling the motor, and keeping the gate closed for all vehicles seeking entry to the parking area.
However, when a vehicle wishes to leave the area, IC11 gets enabled, thus opening the gate. The output current ca-pability per channel of L293D is
approxi-mately 600 mA. The truth table of L293D is given in Table IV.
An actual-size, single-side PCB for the transmitter circuit (Fig. 2) is shown in Fig. 4 with its component layout in Fig. 5.
The actual-size, single-side PCB for the main circuit (Fig. 3) is shown in Fig. 6 with its component layout in Fig. 7.
This circuit is useful for underground parking, company parking, etc. It can even be modified to work on pay-and-park scheme. With a few adjustments, the num-ber of cars that the parking space can
accommodate can be altered.
EFY note. 1. There should be a bat-tery back-up for knowing exact number of cars parked.
2. This project caters for 9 cars only.
It applies for cars only (not for cycles/
scooters).
3. Proper orientation of receiver and transmitter is very important.
4. The distance between the two trans-mitted beams should be less than the length of the longest car to be parked.
Readers’ comments:
Q1. I have the following queries regarding its circuit:
1. What type of motor has been used in the project?
2. What type of gate we should use for a miniature model?
3. How can I demonstrate the working of the circuit in my final-year project?
Renu Chand Through e-mail Q2. I am not getting the output. The display shows only ‘0’ and does not change on giving the right sequence. I want to present this circuit as my mini project for my engineering course. Could you please send me a list of suggestions in order to overcome these problems?
S. Shakeel Through e-mail The authors Atul Apte, Sheetal Kr Ajamera, Rohan D’sa, and Rahul Godbole reply:
A1. 1. The motor used is a 5V DC motor.
2. We had used a rack and pinion kind of arrangement for the gate. A small grooved bar moves in the horizontal direction when the motor shaft rotates.
3. We had constructed a small-scale model of the car parking system, and had demonstrated the actuation of the gate, along with the change in the display, on the entry or exit of a car.
A2. Since the count is remaining at 0, it means that both the receivers are receiving signals continuously. That’s why even though the signals might be getting cut in the correct order, the count is not incrementing. This could be due to a couple of reasons:
1. The strength of the transmitted signal is too large. Reduce the signal strength by increasing the transmitter resistance values.
2. The signal from one transmitter may be getting picked up by the other receiver. Since the TSOP1738 can receive signals at an angle of +45° to –
45° of its axis, i.e. a total receiving angle of 90°, it can easily pick up signals from the other transmitter. To prevent this, enclose both transmitters in long black tubes, which could be easily made from black chart paper. This will ensure that the signal sent from one transmitter travels in a straight line and doesn’t diverge. So the other receiver will not pick up the signal.
Observe the block diagram of the automated car parking system in article’s Fig. 1. It shows both the trans-mitters on one side and both the receivers on the other side. This might increase the probability of cross-pick up, i.e. TX1 signal may incorrectly get picked up by RX2. To avoid this, place TX1 and RX2 on one side, and TX2 and RX1 on the other.
This, along with the use of long black tubes, will most likely solve your problem.
Also, ensure that the transmitters and corresponding receivers are perfectly lined up in front of each other.
SIMPLE 32-BIT RELAY CARD FOR PC’S PARALLEL PORT
VIJAYA KUMAR P.
T
he PC’s parallel port is a very ver-satile port for developing PC-based input and output applications. Con-trolling relays to switch on/off the gadgets is one of these applications, where the computer decides the sequence of switching. But the parallel port has only 12 outputs including 8 data lines and 4 control lines. The card described here can be used to expand the number of data output lines using octal D flip-flops to overcome this limitation. This card provides up to a maximum of four TTL-compatible latched output ports having eight output lines each, i.e. the card can provide up to 32 latched output lines. Each latched bit can be used to control a switching device such as relay.Fig. 1 shows the block diagram of the relay card system. It comprises two
Fig. 1 shows the block diagram of the relay card system. It comprises two