Pad Layout

The pads of an integrated-circuit chip are large areas of metal that are left unprotected by the overglass layer so they can be connected to the leads of the IC package. Although large compared to other circuit elements, the pads are very small and make a difficult surface on which to bond connecting wires.

Automatic wire-bonding machines can make accurate connections, but they must be programmed for each pad configuration. The chip designer needs a tool that will help with all aspects of bonding pads.

The immediate objection of many designers to the offer of automatic pad layout is that they want to place the pads manually. Given that pads consume large areas, the designer often wants total placement control to prevent wasted space. Chips have not typically had many pads anyway, so manual techniques do not

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consume much time.

The answer to such objections is that any task, no matter how simple, must be automated in a complete design system. As the number of special-purpose chips increases and their production volume decreases, it will be more important to design automatically than to design with optimal space. Also, the

programming of the bonding machine can become bottlenecked if it is not directly linked to the CAD system. In modern chips there can be hundreds of pads; placing them manually will lead to tedium and confusion. Finally, there are only a few considerations that must be kept in mind when doing pad layout and these can be easily automated.

One consideration in pad placement is that the pads should be near the perimeter of the chip. The

bonding machine may spatter metal and do damage to the circuitry if it has to reach into the center. Some fabrication processes even require that no active circuitry be placed outside of the pads. Others, however, allow pads anywhere on the chip. Another reason to place pads on the edge is to keep the bonding wires from crossing. The pads must present an uncluttered view from the outside of the chip.

In addition to being located on the edge of the chip, pads should also be placed uniformly. This means that there must be approximately the same number of pads on all four edges and that they must be spaced evenly along each edge. On special chips that have rectangular layout, the pads may be evenly spaced along only two edges. Equal spacing makes automatic bonding easier, and uniform pad density keeps the bonding wires from cluttering and possibly shorting. The proper limitations of pad spacing must also be taken into consideration (currently no less than 200 microns between centers [Keller]).

One algorithm for pad placement is called roto-routing [Johannsen]. This technique starts by sorting the pads into the same circular sequence as are their connection points in the chip. The pads are then placed into a uniform spacing around the chip and rotated through all positions. The one position that minimizes overall wire length to the pads is used.

Another concern in proper pad layout is the location of power and ground pads.

Although some applications demand multiple power and ground pads for high power consumption, there are typically only one of each, and they should generally be on opposite sides of the chip, because they are usually bonded to leads that are on opposite sides of the package. In addition, they must be correctly connected to the other pads in order to get proper

distribution of power and ground. Figure 4.16 shows one configuration of power, ground, and pads. The ground runs outside of the pads because it is less critical than the power rail, which runs just inside. This arrangement allows each pad to have easy access to the supply voltages it needs to function properly. In order to get these voltages to the chip, however, there must

FIGURE 4.16 Pad frame showing power and ground rails.

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be a gap in the inner power rail.

Routing of pad signals to the main chip circuitry can be done automatically with standard switchbox techniques. It is important to try to place the pads close to their destination so that signal wires do not run the length and width of the chip. Techniques for automatically assigning pads to signals can take into account both wire length and the importance of that signal's timing. For example, a two-phase clock brought in from outside should be placed on two pads that have similar distances to the active circuit.

Although bonding-pad placement is a minor aspect of integrated-circuit design, it is a necessary part of any good CAD system. Changing design methodologies call for tools that can do all the work and prevent minor oversights from turning into major failures. There are detailed constraints in pad layout, and failure to observe any one of them can cause the chip to fail totally.

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Steven M. Rubin

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