Register-Transfer Environment

The first component-level environment of interest is register transfer [Bell, Grason and Newell]. In this environment, the components are specific hardware manipulations of control and data with connections showing the flow for the desired algorithm. This environment can be used to describe the instruction set of computers because it shows the flow of control in a processor that effects the machine's operation. It is also useful in the design of algorithms. Actual implementations of these components were used to teach hardware design to university students.

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The components of the

FIGURE 2.15 The components of the register-transfer environment. "K" is control; "D" is data; "M" is memory, and "T" is input/output.

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transfer, as will be

Register transfer has four types of connections between components: bus, control, Boolean, and miscellaneous. The bus is a general-purpose data and control connection that passes synchronized

information between components. Control connections are used to link the control components and also to invoke activity in other components. Boolean connections are special-purpose signals that aid the flow of execution by linking conditions with decision-making control components. Finally, miscellaneous connections exist to link these register-transfer components with external devices.

Every register-transfer design has exactly one K_bus component. This controls the bus connections for all other components and is the source of initial and terminal control that links the design with the outside world. In student hardware laboratories, where register-transfer modules were used most, this component provides the manual interface to the running circuit.

Flow of control is done with four components: K_b, K_sub, K_sm, and K_pm. The K_b component does a

branch, conditional on a Boolean input. Only one of the two output connections will be invoked, causing that control module to execute next. The K_sub component executes a subroutine of control modules by invoking the first module, awaiting a completion signal on the return line, and then invoking the next sequential control component. The K_sm does a serial merge, invoking the next control component when any one input line is raised. This is useful in loops where multiple execution paths enter a single control stream. It is also useful for parallel execution control. Such a situation can exist if a single

control-invocation line connects to multiple control components. Then the synchronization of these control paths can be accomplished with the K_sm or the K_pm components. The K_pm does a parallel merge that waits for all input lines to be invoked before it generates its own output.

All of these control components are used to construct a flow of execution in a register-transfer design.

However, none of them cause any data to be manipulated. All data operations are controlled with the evoke component, K_e. The K_e acts like a subroutine call to a data component: It initiates the data operation, awaits completion, and then invokes the next sequential control component. All data components communicate between each other on the bus and communicate back to the control components via Boolean connections.

There are two internal data components: the DM_gpa and the M. The DM_gpa, or

"general-purpose-arithmetic" component, is able to perform the simplest of arithmetic and logical

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operations. It holds two registers that it can move, add, subtract, complement, logically AND, logically OR, and shift. It generates Boolean signals that indicate numeric test results. This component is the workhorse of any algorithm done in the register-transfer environment. The M is the other internal

component and it stores memory. To use it, both a memory address and a data value must pass across the bus on separate control cycles. The Boolean output signal is used in slower memories to indicate the completion of the operation. This allows other work to proceed in parallel with the memory access. The size and speed of the memory varies, yielding a subclass of these components.

Transducer components are used to convert between bus data and analog signals for external use. Input transducers can handle analog input, switch bank sensing, and keyboards. Output transducers can print, plot, and produce general analog signals.

Figure 2.16 shows

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restore negative values.

FIGURE 2.16 Register-transfer layout to normalize a floating-point number.

Shown complete with bus connections (thick) and data-evocation lines (dotted).

The bus-control

component links the data buses and controls the execution of the algorithm.

Many register-transfer designs are done without explicitly showing the data and K_bus components or any bus connections.

Figure 2.17 shows the same algorithm without these datapath

complexities. This makes the design simpler without sacrificing the detail of this environment, because the data components and their connectivity can be

inferred from the control components.

FIGURE 2.17 Register-transfer layout to normalize a floating-point number. Shown without bus or data-evocation connections.

In addition to being a useful environment for algorithm specification, register-transfer designs are able to be built in hardware. Every component in the environment has associated electronic modules that can be wired together. Thus a working register-transfer machine can be built directly from these designs.

Although these register-transfer modules are no longer used, the concepts in this environment are still valid and can be realized with other implementation methods.

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Many hardware-description languages textually capture the same information as the register-transfer environment does. One language separates data structure from control [Baray and Su], similar to the distinction made in register transfer.