The only difference between the EPROM-and RAM-based circuits is the use of RAM chip in place of EPROM and a key-board for programming the RAM in RAM-based circuits. Besides, an LED panel is used for displaying the selected RAM ad-dress.
Switch S2 is used to manually pro-vide clock pulses to IC2. Similarly, switch S3 is used to manually reset IC2 before and after programming. Both switches (S2 and S3) are integrated into Fig. 2. The connector K1 in between IC2 and IC3 is used to connect to K5(M) connecter along tor VR101 for 446 Hz (refer Table I).
In this way all the variable resistors are adjusted one by one by connecting +5V from the probe to the corresponding di-odes.
With the help of a musician. You can seek the help of a musician if you don’t have access to a frequency meter or a digital multimeter. Connect the output from the tone oscillator to the speaker and switch on the power supply. First, choose the main notes in the middle oc-tave. Connect the probe to the respective diode of SA and tell the musician to adjust the variable resistor to the fre-quency of SA. Now connect the probe to the respective diode of RE and adjust the variable resistor to the frequency of RE, and so on. After adjusting main notes, adjust half notes. (In Table I, music notes shown in small letters are half notes.) This method will be success-ful only if the musician is well trained in music.
Using digital multimeter. First, as-semble only preset resistors VR101 through VR128. Now adjust the variable resistors to their respective values (shown in column 6 of Table I) using a digital multimeter. Use the variable resistors with maximum value as given in column 7 of Table I. You can also use the values shown Fig. 8: Component layout for PCB-1
with the associated LEDs as shown in Fig. 14. EPROM 2732 (IC3) is replaced with an 8-bit, 2k SRAM (6116).
Pin 21 of 6116 is WE (write enable – active low). Switch S6 is to be kept in position ‘b’ while working with RAM.
At the time of writ-ing (programmwrit-ing) data into the RAM, there is no connection between connectors K2(F) and K3(M). Also, jumper J1 is removed. To program the RAM, K4(M) is to be mated with K2(F). After programming is over, K2(F) is connected to K3(M).
IC6 (CD4011) con-tains four NAND gates, of which NAND gate N1 is used for stop-clock sig-nals. It functions in the
same man-ner as in an E P R O M -based cir-cuit. The in-puts of N1 output of N1 b e c o m e s the input of NAND gate N1, its out-put goes low. When switch S1 is pressed, the output of N1 goes high and IC1 starts oscil-lating again.
Gates N2 and N3 are used to provide read and write logic for RAM. In read condi-tion, the output of N3 is at logic 0
be-cause its inputs are at logic 1. Press-ing of switch S5 provides ‘write’
condition, since the output of gate N3 is at logic 1 and that of gate N2 at logic 0.
LED connector. A separate male connector K5(M) is fabricated with LEDs as shown in Fig. 14. This con-nector should be connected to K1(F).
The LEDs indicate addresses of memory locations of RAM. Glowing of LED1 through LED11 together means that last RAM location is be-ing addressed. (We are using a 2kB RAM.)
Keyboard. The circuit diagram of keyboard is shown in Fig. 15. Male con-nector K4(M) should be connected to K2(F) during pro-gramming. The circles shown with the corresponding hex values are simple metallic contacts (or tabs) that avoid the use of a large number of switches.
To enter the hex data, the probe is touched to the corresponding metallic con-tact tab.
The keyboard can be easily wired us-ing a general-purpose board. To test the keyboard after wiring, connect point ‘A’
to the ground via a 100-ohm resistor (R18) as shown in Fig. 15. Now touch each and every tab one by one using the metallic probe and verify that the data shown by the LEDs (LED13 through LED20) is con-sistent with the hex value shown on the tab/circle. After checking, disconnect re-sistor R18.
Connector K3 should be soldered to the PCB by using a ribbon cable of adequate length, so that it could be easily connected to K2(F) after programming. The out-puts from IC4 and IC5 go to preset-array part of the tone oscillator.
Wiring is done similar to that in an EPROM ver-sion.
Fig. 10: Flow chart for re-adjustment
Fig. 12: Flow chart of car-reverse horn
Fig. 13: Wiring connections for car-reverse horn Fig. 9: Component layout for PCB-2
Fig. 11: Power supply
TABLE I
Music Frequency Data Hex Variable Variable Maximum
note of music character value resistor resistor value of
note (preset) in-circuit variable
(Hz) number value (ohm) resistor
Lower octave
DHA 1000 L 02 VR115 2910 5k
ni 1062 M 03 VR116 2655 5k switch S3 mo-mentarily to reset IC2. No LED glows on the LED con-nector, indicat-ing the initial address as zero. Now touch the tab marked ‘00’
with the probe.
Press S5 momentarily and lift the probe.
Glowing of no LED on the keyboard indi-cates that ‘00’ is entered in the initial memory location. (It is good to enter ‘00’
in the first memory location.)
Now get the hex dump values of the tunes. Press switch S2 to go to the next memory location, indicated by LED1 (cor-responding to address line A0), on the LED connector strip. Touch the appropri-ate tab with the probe to enter the corre-sponding hexadecimal value at memory location 1. Press switch S5 and lift the probe. The data entered into memory lo-cation 1 is shown by keyboard LEDs in binary form.
Hex data values (refer Table I) are such that any of the four LEDs corre-Fig. 14: LED indicator
circuit
Fig. 15: Keyboard and probe for programming RAM
#include <stdio.h>
#include <dos.h>
#include <stdlib.h>
#include <conio.h>
#include <ctype.h>
void play(char *str,int d);
void main() {
int f,d=200;
char ch1[180],ch2;
clrscr();
printf(“\n Enter delay value:”);
scanf(“ %d” ,&d);
while(1) {
printf(“\n enter tune :”);
scanf(“ %s” ,&ch1);
play(ch1,d);
void play(char *str,int d) {
sponding to either D0 through D3 bits or D4 through D7 bits would glow to show the data entered. So it is easy to identify whether the data entered is correct or not. If necessary, make a table of binary data along with corresponding hex val-ues.
After entering all the tunes, discon-nect keyboard from K2(F) and condiscon-nect K3(M) to K2(F). Now connect external jumper J1 as shown in the circuit dia-gram.
Switch S4 across jumper J1 terminals (Stay tuned for the next issue)
is not necessary but it may prove useful if any readjustment of variable resistors is needed (as in the case of EPROM), or for checking each and every tune one by one.
The programming steps are summarised as below:
1. Press switch S3.
2. Touch tab 00 with the probe.
3. Press and release switch S5.
4. Lift the probe.
5. Press S2 to go to the next memory location.
6. Repeat from step 2 onwards for the
next hex value programming.
7. After last data is entered, press S3.
8. Keep S4 pressed to check all the tunes that have been entered.
9. Connect jumper J1 if all tunes are entered.
The data table (Table I), writing of musical notes, conversion of notes to hex values, preset-array alignment, and flow charts for door-bell and car-reverse tune are also applicable for the RAM version.
S.C. DWIVEDI
AJAY SUBRAMANIAN AND NAYANTARA BHATNAGAR
TELEPHONE LINE-INTERFACED GENERIC SWITCHING SYSTEM
PART II
I
n Part I we had covered the inter-face and control unit and the au-thentication unit. Before we proceed with the description of the next unit (main device selection and switching unit) shown in the block diagram of Fig. 1, the follow-ing modifications may be incorporated in Part I:1. In the interface unit (Fig. 2), re-place 2-input AND gate IC6A (7408) with a 3-input AND gate (7411) and connect Reset signal from pin 13 of IC5 (1Q) to the third input of the new 3-input AND gate. This modification has been done so that when Reset signal is low (active), no part of the circuit is active. All ICs will be asynchronously reset. To avoid any con-fusion, change in the input connections of IC6A AND gate is shown in Fig. 6.
2. In the authentication circuit (Fig.
3), CLR2* pin 13 of IC12B is to be discon-nected from +5V rail and joined with
CLR1 pin 1 of IC12A, so that authentica-tion signal AUTH is deactivated on sys-tem reset.
Main device selection and switch-ing unit (Fig. 7). This circuit receives StD control signal after a successful au-thentication of the four-digit code by the authentication unit. The AUTH and its inverse AUTH signals available on code authentication are used in this circuit for enabling various chips such as IC23 and IC24 (74LS195), IC25 (CD4017), IC27 through IC29 (74LS154), and StD gate IC19C (7408).
A combinational logic circuit, compris-ing three 3-input NOR gates inside 7427 (IC16) and two inverter gates (IC17B and 17C) of 7404, has been used to discrimi-nate between an address (numeric digit) and a switching signal (‘*’ for ‘on’ and ‘#’
for ‘off’). DTMF digit switches 1 through 9 and 0 (0 on the telephone keypad stands for decimal 10 and the de-coded output from MT8870 is the equivalent binary number 1010) gen-erate a logic-1, R_EN (register enable) signal, while keys marked ‘*’ and
‘#’ generate a logic-1, S_EN (switching enable) signal. Thus this combi-national logic differenti-ates between register en-able (R_EN) and device switching enable (S_EN) signals. The R_EN and S_EN outputs for various key depressions of the telephone keypad are shown in Truth Table.
The combinational logic circuit is followed Fig. 6: Modification
PARTS LIST Semiconductors:
IC1 - NE555 timer
IC2, IC13, IC25 - CD4017 decade counter IC3, IC9, IC12,
IC21, IC22 - 7474 dual ‘D’ flip-flops IC4 - MT8870 DTMF decoder IC5 - 74123 dual retriggerable
monostable multivibrator IC6 - *7411 triple 3-input AND
gates
IC7 - 7432 quad OR gates IC8 - 74LS85 4-bit magnitude
comparator
IC10, IC19 - 7408 quad 2-input AND gates
IC11, IC17 - 7404 hex inverters IC14, IC15 - 74LS244 octal buffers/line
drivers
IC16 - 7427 triple 3-input gates IC18 - 7400 quad 2-input NAND
gates
IC20 - 74125 quad bus buffers IC23, IC24 - 74195 4-bit parallel access
shift registers
IC26 - 7414 hex Schmitt inverters IC27-IC29 - 74LS154 4-line to 16-line
decoders
Opto-1 - MCT2E opto-coupler T1,T2 - 2N2222 npn transistor D1,D2 - 1N4001 rectifier diode D3, D4 - 1N4148 switching diode ZD1, ZD2 - Zener diode 5.1V LED1-LED10 - Red LEDs
Resistors (1/4W ± 5% carbon, unless speci-fied otherwise)
R1, R2, R5, R29 - 10-kilo-ohm R3, R12, R30 - 100-kilo-ohm
R4 - 220-ohm
R6-R9 - 51-kilo-ohm
R10 - 39-kilo-ohm
R11 - 56-kilo-ohm
R13 - 330-kilo-ohm
R14-R18 - 1.2-kilo-ohm
R19 - 20-kilo-ohm
R20, R27, R28 - 1-mega-ohm R21-R24,
R31-R34 - 470-ohm R25,R26 - 1-kilo-ohm R31-R34 - 4.7-kilo-ohm Capacitors:
C1 - 0.47µF, 160V polyester C2,C4-C6 - 0.01µF ceramic disc C3, C9, C13 - 10µF, 16V electrolytic C7, C8, C14 - 0.1µF ceramic disc C10 - 100µF, 16V electrolytic C11, C12 - 47µF, 16V electrolytic Miscellaneous:
Xtal - 3.57946MHz quartz crystal RL1 - Relay 6V, 100-ohm, 1 C/O
- 5V, 1A regulated power supply
- Berg stick/FRC connectors - Ribbon cable etc.
*Note. IC 7408 is replaced with 7411 (refer Fig. 6).
Fig. 7: Main device selection and switching unit
by the RCLK and SCLK generation cir-cuitry comprising ICs 18, 19, 25, and 26, which allows the following functions to be performed:
• After AUTH signal at Q (pin 8 of IC12B in Fig. 3) goes low (active), one can select a group and a device within the selected group by next two DTMF switch depressions on the telephone key-pad, while a third key depression of ‘*’ or
‘#’ results into switching ‘on’ or ‘off’ of the desired device.
• Multiple devices can be switched on/off one after the other, once authorisation signal AUTH becomes ac-tive (low) without a system reset.
• The system can be reset after or before switching ‘on’/‘off’ of the desired device with the help of remote telephone keypad. This feature can also be used for avoiding switching on/off of a device if the user perceives that he has selected a wrong device.
When R_EN signal is logic 1, IC25 (CD4017) is clocked at the leading edge of StD pulse, while one of the 74LS195 registers (IC23 or IC24, as enabled by one of the Q outputs of IC25) is latched at the trailing edge of the delayed Std pulse (RCLK) as indicated by the direc-tion of arrow on RCLK pulse in Fig. 7.
The resistor-capacitor combinations R26-C11 and R25-C12 wired around Schmitt inverter gates A through D of IC26 (7414) provide the necessary delay for reliable latching of the data in IC23 and IC24.
Resistors R27 and R28 across capacitors C11 and C12, respectively, serve as bleed-ers for discharging the respective capaci-tors.
When S_EN signal is logic 1, clocking of 7474 ‘D’ flip-flops via active 74LS125 gates occurs corresponding to the leading edge of Std (SCLK) pulses, while the trail-ing edge resets IC25 via capacitor C14, to enable receiving of fresh group and de-vice selection data.
(EFY note. The circuit comprising IC25 and IC26 includes some modifica-tions by EFY Lab to improve the timing of RCLK and SCLK for reliable operation of the RCLK and SCLK generation part of the circuit.)
Group selection. When any of DTMF numeric keys 1 through 9 and 0 on the remote telephone keypad is depressed im-mediately after AUTH signal goes active low, R_EN signal goes to logic 1 (while S_EN is logic 0). As a result, Std pulse passing through NAND gates IC18B and Fig. 9: Actual-size, single-sided PCB for the circuit in Fig. 7
Fig. 8: Actual-size, single-sided PCB for the circuits in Figs 2 and 3
IC18C clocks IC25 with its leading edge.
IC25 is in reset condition before code au-thentication due to ‘high’ AUTH signal, and its Q0 (pin 3) is ‘high’. On clocking, shifting of ‘high’ state from Q0 to Q1 (pin 2) enables AND gate IC19B, while AND gate IC19 is still disabled. Thus the trail-ing edge of RCLK passes through IC19B to latch the MT8870-decoded data corre-sponding to the mentioned numeric key depression, which is available at the in-put of group select register IC24, at its output. This is the group select address.
The group select address is applied to the address lines of 4-line-to-16-line decoder IC29 (group selector). In the nor-mal telephone keypad, we use only ten numeric keys (1 through 9 and 0) and hence only ten outputs (Y1 through Y10) are available from IC29. The other six outputs Y0 and Y11 through Y15 are not used. Thus we can select any of the groups 1 through 10 via outputs marked Y1 through Y10 of IC29.
The output corresponding to the ad-dress present at IC29’s input pins goes low (active). This low (active) output se-lects/enables another IC 74LS154 repre-senting the corresponding group. (Please note that this is only a demo version circuit, wherein only two groups, out of ten possible groups, can be accessed us-ing IC27 and IC28. Pin 19 of IC27 and IC28 can be connected to any of the group select pins Y1 through Y10 of IC29, as desired. Once connected, the specific group numbers will get allocated to IC27 and IC28.)
Device selection within the se-lected group. The next DTMF number key depression (i.e. the sixth after energisation of relay RL1 or the second after the 4-digit authentication code) causes shifting of ‘high’ on pin 2 (Q1) of IC25 to pin 4 (Q2) in synchronism with the leading edge of StD pulse clocking IC25. As a result, AND gate IC19A is enabled while AND gate IC19B is dis-abled.
The trailing edge of delayed StD pulse (RCLK) causes the data corresponding to the mentioned numeric key to be latched at the output of device select register IC23. This device select address is ap-plied to address input pins of all group ICs (IC27 and IC28, here) in parallel.
However, since only one group IC is in selected condition (as explained earlier), the device control output corresponding to the device select address present at Fig. 11: Component layout for PCB-2
Fig. 10: Component layout for PCB-1
Switching on or off refers to Q out-put of the corre-sponding ‘D’ flip-flop (7474) going high or low, respectively.
You may suitably use the flip-flop out-puts to energise a re-lay or fire a triac or control the corre-sponding device/de-vices.
If you press any number key (1 through 9 or 0) instead of ‘*’ or ‘#’ key on the DTMF keypad, IC25 will receive a clock pulse via AND gates IC18B and IC18C, and the ‘high’ state will shift from Q2 to Q3 (pin 7 of IC25). Since Q3 output is coupled to the base of transistor T2 via diode D4, it will re-sult into a system reset (as explained in Part I). A system reset implies that you have to redial the local telephone number from remote telephone. When re-lay RL1 again energises, redial the four-digit authentication code, followed by group select, device select, and switch on (*) or switch off (#) codes, as explained earlier.
Thus, after dialing two digits identi-fying the group and the device within that group, if we press a third numeric digit instead of ‘*’ or ‘#’ on the remote tele-phone keypad, a system reset can be achieved remotely. This feature can also be utilised to bypass switching operation if the user realises that he has selected a wrong group/device.
Operation summary. The entire op-eration can be summarised as below:
• Using the remote telephone key-pad, dial the local number of the telephone to which the circuit is con-nected.
• If the local handset is lifted before the programmed number of rings, a nor-mal conversation can ensue.
• If the handset is not lifted before the programmed number of rings, wait for simulated off-hook status of the local telephone handset (indicating energisation of relay RL1).
• Now dial the four digits of the pre-set authentication code in a proper se-quence from the remote keypad within the preset duration. A system reset will occur in case the 4-digit code is not dialed within the preset duration or
the code used is wrong, which causes de-energisation of the relay and creates conditions similar to on-hook state of the local telephone handset. So you will have to repeat all steps from the begin-ning.
• If the 4-digit authentication code matches the preset code, you can dial the next two digits identifying the group and the device within that group selected for the purpose of switching on or off (or even as a dummy operation for the purpose of forcing a system reset).
• Dialing ‘*’ from the remote tele-phone keypad will result into switching on of the selected device, while dialing ‘#’
will result into switching off of the se-lected device. (Dialing any number, 1 through 9 or 0, causes a system reset.
Relay RL1 will be de-energised, and you will have to restart from the initial step.) You can proceed with the same procedure to switch on/off the next selected device.
The procedure can be repeated for any number of devices (one-at-a-time) with-out affecting the status of non-selected devices.
Testing. It is recommended that the circuit be built in stages, verifying proper operation at each stage. The main switch-ing circuit may be assembled convention-ally, with logic operation tested at vari-ous points. The authentication circuit is also self-contained and may be assembled and debugged independently.
However, care must be taken while assembling the interface and control unit.
The ASIC must be assembled first and tested for proper operation and output lev-els, followed by rigging and testing of monostable multivibrators in the 74123.
The ring pulse generator and decade counter, CD4017, comes next. Finally, in-terface connections between the various
The ring pulse generator and decade counter, CD4017, comes next. Finally, in-terface connections between the various