Skeletonisation by Lookup Table for Binary Images

The second algorithm employs lookup tables to perform skeletonisation in binary images. Skeletonisation is utilised in different character recognition problems (see Chapter 6) during the pre-processing stage. The skeleton of an object can be obtained by successively removing the outer layer of pixels from shapes, whilst retaining any pixels whose removal would alter connectivity or which are the ends of branches of the skeleton. The process is complete when no further pixels can be removed without altering connectivity or shortening the skeleton.

The Arcelli algorithm [53] works by comparing each pixel and its neighbours with a series of masks as shown in Fig. 5.2. In Fig. 5.2, the zeros are pixels which must have value 0, the ones are pixels which must have value 1, and the values of the remaining pixels are immaterial (or don’t care) represented by Xs. The masks are applied in the sequence A l, B l, A2, B2, A3, B3, A4, B4. When the pattern formed by a pixel’s eight neighbouring elements matches with a mask’s pattern then the pixel is removed. The masks are applied repeatedly until no further pixels are deleted.

In the CLIP7A array, the matching between a mask and a pixel’s neighbours is achievable using hardware. The binary gate (see Chapter 4 Section 4.2) is the device, embedded in the CLIP7 chip, which can perform the matching. The binary gate has two sets of input lines (see Fig. 4.2), one for neighbourhood data and the other for control. The neighbourhood input comes from a PE’s pseudo-nearest neighbours - two directly and six from special registers (edge registers), as shown in Fig. 4.8. The mask pattern is applied as the control inputs. Because of the structure of the binary gate, the pattern of ‘1’ and ‘0’ are compared in two separate operations. A combined result is generated in order to determine whether a pixel should be retained or deleted. If the binary gate is not utilised then to match a mask requires reading the neighbouring pix­ els one by one via the D-chains and comparing it with the corresponding bit in a mask. Since each Arcelli mask contains three immaterial pixels, only five neighbouring pix­ els are required to perform a match. Alternatively, the comparison between a mask and a pixel’s neighbours can be implemented as a lookup table function.

In the Arcelli algorithm, the pattern formed by a pixel’s eight nearest neighbours is compared with a set of eight masks. Each mask can be represented by a lookup table comprising 256 elements, this includes all the possible patterns can be formed from the eight nearest neighbours. The patterns are utilised as addresses to locate data within the table. To create an address from a pixel’s eight nearest neighbours, the con­ vention shown in Fig. 5.3 is applied. Due to three don’t care locations in each mask, this gives rise to eight situations in which a match can be made with a pixel’s nearest

0 0 X 0 1 1 X 1 X X 0 0 1 1 0 X 1 X X 1 X 1 1 0 X 0 0 X 1 X 0 1 1 0 0 X A1 A2 A3 A4 0 0 0 X 1 X 1 1 X 1 X 0 1 1 0 X X 0 X 1 1 X 1 X 0 0 0 0 X X 0 1 1 0 X 1 B1 B2 B3 B4

Figure 5.2 The Arcelli masks

NE NW SE SW NE NW N SW SE LSB MSB

neighbours. Because of that, there are eight locations in each lookup table containing information that represents a match. A match is represented by a ‘O’, whilst *1’ means a mis-match. A total of eight lookup tables is required to implement the Arcelli algo­ rithm and each table is given a unique table number (high-byte address) so that half local and half global addressing mode can be applied. The lookup tables are gen­ erated, first, by setting every location to a default value - 255. Locations in each table representing a match are calculated and ‘Os’ are placed in those locations. After the setup of the lookup tables, the skeletonisation process takes the following steps:

1. An address is created from a pixel’s eight nearest neighbours, using the conven­ tion shown in Fig. 5.3;

2. The high-byte address for Table 1 (representing mask 1) is broadcast from the controller and the address generated in (1) is used to address the Table;

3. The value is read from the location pin-pointed and is logically ‘ANDed’ with the pixel under consideration;

4. The result of the logical ‘AND’ replaces the pixel under consideration;

5. Steps from (1) to (4) are repeated for seven times but with the table number altered;

6. If the skeleton of the input image is not obtained then repeat from (1) again, oth­ erwise the operation ceases.

In addition to the Arcelli algorithm, a fast parallel algorithm [54] employing two lookup tables to thin an image was also implemented in CLIP7A. Differing from the Arcelli algorithm, the fast parallel algorithm is devised to be implemented with two lookup tables comprising 256 entries each. The lookup tables represent two subitera­ tions: the first aiming at deletion of south-east boundary points and the north-west comer points whilst the second removes north-west boundary points and south-east comer points. A set of rules is devised for the setup of the tables and includes:

1. Counting the number of non-zero pixels in a pixels’ eight nearest neighbours; and

2. Counting the appearance of the 0-1 sequence in a pixel’s eight nearest neigh­ bours in a clockwise orientation beginning from the North direction.

As discussed above, there are two methods to perform a mask matching opera­ tion, similarly, two methods exist for the generation of an address and they concern the exploitation of the binary gate.

T o generate an address through the binary gate, data is first stored in the edge registers and the N out registers. The control inputs for the binary gate are altered so that only one neighbour pixel is exam ined at each time. T he bits are then com bined into a single address by m anipulating the shifting property o f the S-register.

I f the binary gate is not exploited then neighbouring pixels have to be shifted in from adjacent PEs via the D -chains and exam ined one by one. In order to create an address, the shifting ability of the S-register is utilised. In tw o consecutive 3x3 w in­ dow s there are six pixels in com m on (see Fig. 3.4). It is, therefore, possible to reduce the num ber o f shift operations performed by m anipulating the address form ed in the previous w indow and a new convention for creating an address is adopted, as shown in Fig. 5.4. In T able 5.2 the timing results obtained from the different skeletonisation m ethods described above are given.

A rcelli m asks by m atching w ithout using binary gale A rcelli m asks by m atching using binary gate A rcelli m asks by lookup table u sin g binary gale Fast parallel algorithm using binary g a le Fast parallel algorithm address g en ­ erated w ithout u sin g binary gale

lim e taken per cy c le (m s) 3220 333 193 49 1040 no. o f m asks or tables per c y c le 8 8 8 2 2 p ro cess tim e (m s) to obtain the sk eleto n o f Fig. 5 .5 (a ) 45080 4662 2702 490 10400 tables set up tim e (m s) 0 0 20 20 20

Table 5.2 Tim ing results for different skeletonisation algorithm s

From the results shown in Table 5.2, it is possible to deduce the tim e required to im plem ent the A rcelli algorithm in lookup tables w ithout utilising the binary gate: it will take about 58 seconds to obtain the skeleton o f the im age depicted in Fig. 5.5(a).

From the data presented in Table 5.2, it can be seen that the fast parallel algo­ rithm exploiting the binary gate is most effective. This is because only tw o lookup tables are em ployed. W hen com paring other algorithm s which also utilise the binary gate, the lookup table version o f the Arcelli algorithm achieves a 42% im provem ent over the m ask m atching approach. This dem onstrates the advantage o f the lookup table m echanism .