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low-power digital communication

Ultra Low Power Consumption Military Communication Systems

Ultra Low Power Consumption Military Communication Systems

... wireless communication, Viterbi decoder which consumes more power plays an important role in communication ...many digital systems like Viterbi decoder, multiplexers and XOR gates are the ...

6

RF low power subsampling architecture for wireless communication applications

RF low power subsampling architecture for wireless communication applications

... highly power-hungry blocks such as LO and RF PLL are still existing in the ...reduce power consumption of the system without using RF/analog blocks, it increases the memory of ADC which cannot be achieved ...

15

Design of Digital Circuit for Low Power
Communication Centric RF Transceiver in
Wireless Sensor Node using VHDL

Design of Digital Circuit for Low Power Communication Centric RF Transceiver in Wireless Sensor Node using VHDL

... less power without affecting the functionality like speed, range and standard ...The power breakdown of wireless sensor node shows that the hungriest part is RF transceiver ...total power consumed by ...

10

Automated EB Billing and Supply Control using Power Line Communication

Automated EB Billing and Supply Control using Power Line Communication

... inputs, digital temperature compensation, precision voltage reference and 32-bit computation engine (CE) supports a wide range of poly-phase metering applications with very few low cost external ...a ...

7

FPGA IMPLEMENTATION OF LOW POWER DIGITAL FREQUENCY SYNTHESIZER

FPGA IMPLEMENTATION OF LOW POWER DIGITAL FREQUENCY SYNTHESIZER

... a Digital Frequency Synthesizer (DDFS) in our system to generate a sampled sinusoidal wave of ...of Digital Frequency Synthesizer (DFS) is that its output frequency, phase and amplitude can be precisely and ...

10

Evaluation of Different Parameters of IEEE 802.15.4 and Other Short Range Networking Technology Satveer *1 , Bhart Bhushan 2

Evaluation of Different Parameters of IEEE 802.15.4 and Other Short Range Networking Technology Satveer *1 , Bhart Bhushan 2

... level communication protocol based on IEEE ...for communication between hand held devices like cell phone or tabs etc, with small, low-power digital radios such as for home automation, ...

5

Synthesization of Low Power Digital Signal Processor Architecture

Synthesization of Low Power Digital Signal Processor Architecture

... Abstract: A Wireless Sensor Networks spatially distributed autonomous sensors to monitor physical or environmental conditions, such as temperature, sound, pressure, etc. Radio communication exhibits the highest ...

10

A Survey of Secure General Self- Organised Tree Based Energy-Balance Routing Protocol for Wireless Sensor Network

A Survey of Secure General Self- Organised Tree Based Energy-Balance Routing Protocol for Wireless Sensor Network

... technology, low-power wireless communication[2], [3], [4] and low-power digital electronics; it is now feasible to produce wireless sensor nodes in quantity at low ...of ...

10

Low Power Embedded DSP Core for Communication Systems

Low Power Embedded DSP Core for Communication Systems

... parameterized digital signal processor (DSP) core for an embedded digital signal processing system designed to achieve demodulation/synchronization with better performance and ...accelerating ...

16

Evaluation of low power Schmitt Trigger for communication system

Evaluation of low power Schmitt Trigger for communication system

... the digital signal, for some reasons it may have slow rise or fall time and may have the small noise sense by proceeding circuitry, so all of these critical conditions required a specified device that will “clean ...

5

Virtual Circuit Switching Based Smart NOC

Virtual Circuit Switching Based Smart NOC

... and Communication from ANNA University, Chennai, ...Wireless Communication and Sensor Networks, Digital VLSI Design and Low Power Memory Design and Fault ...& Communication ...

8

Design of a LNA in the frequency band 1.8–2.2 GHz in 0.13 m CMOS Technology

Design of a LNA in the frequency band 1.8–2.2 GHz in 0.13 m CMOS Technology

... and low power con- sumption, the possibility to change the operating frequency of the RF part of the receiver with a minimum amount of component is ...the digital market, and to the consequent cost ...

5

BASICS OF ENERGY-EFFICIENT DIGITAL DESIGN

BASICS OF ENERGY-EFFICIENT DIGITAL DESIGN

... in power being the major concern for digital system ...and power no longer scale proportionally leading to increasing power ...less power dissipation. The less the power ...

9

Optimal Power Scheduling Scheme for Adhoc Network

Optimal Power Scheduling Scheme for Adhoc Network

... the communication time period elapse, the node life time is observed to be diminished for linear ...abrupt power dissipation. However with the utilization of HDS [1], the power consumption is ...

7

Design of Future Substation

Design of Future Substation

... market power will trigger an ...in power flows, LMPs and other economic indices is calculated and ...physical power system and the market is ...

6

Ultra-Low Power Design of Digital CMOS Logic Circuits

Ultra-Low Power Design of Digital CMOS Logic Circuits

... The power consumption is today the major issue in design of integrated circuits for portable ...medium power consumption design region, numerous optimization efforts have been made ...CMOS power ...

5

Low Power VLSI Architectures for Digital PID Controller Applications

Low Power VLSI Architectures for Digital PID Controller Applications

... novel digital proportional–integral–derivative (PID) controller architecture, based on the adder and multipliers which consumes lower ...requires low power and fast acting PID controllers with a ...

8

LOW POWER AND AREA EFFICIENT MULTIPLIERS FOR DIGITAL SIGNAL PROCESSING

LOW POWER AND AREA EFFICIENT MULTIPLIERS FOR DIGITAL SIGNAL PROCESSING

... In above comparison table, different multipliers like Booth multiplier, Floating point multiplier and Q Point multiplier are compared and by observing different parameters of each multiplier and comparing them, it can be ...

7

Implementation of Low Power All Digital Phase Locked Loop

Implementation of Low Power All Digital Phase Locked Loop

... for digital designs. Small-area and low-voltage designs are mandated by market ...of digital PLL is easy to redesign with the process ...of digital and mixed-signal ICs, their redesign is an ...

7

THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY

THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY

... of digital circuits like adders, magnitude comparators ...achieve low power and high speed is that, avoid the two level realization, eliminating the inverting inputs to pass through source/drain ...

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