low-power high-speed digital applications
A Low Power VLSI Design of an All Digital Phase Locked Loop
5
Analysis of Low Power, Area and High Speed Multipliers for DSP Applications
5
High-Speed and Low-Power Flash ADCs Encoder
9
Low Power High Speed Differential Current Comparator
7
Design of 45nm Switched Inverter Scheme (SIS) ADCs for Low Power and High Speed Applications
8
Sigma Delta Modulators: A Review
9
Design and Implementation of Energy Efficient and High Throughput Vedic Multiplier
6
Digital Ultra Low Voltage High Speed Logic
5
Low Power High Speed Dynamic Comparator
5
Low Power and High Speed 4-Bit Flash Analog to Digital Converter Using Dynamic Latch Comparator Technique
6
Performance Analysis of CMOS and GDI Comparators
5
High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications
10
VLSI design of high-speed adders for digital signal processing applications.
180
A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS
7
Adiabatic Logic Circuits for Low Power, High Speed Applications
8
Review on Design Approach for FPGA Implementation of 16-Bit Vedic Multiplier
5
Low Power Analysis of Double Tail Comparator for ADC by Using Hspice A Murali, E Mahesh & N Vijaya Babu
10
VLSI Implementation of an Approximate Multiplier using Ancient Vedic Mathematics Concept
12
Dual Edge Adaptive Pulse Triggered Flip-Flop for a High Speed and Low Power Applications
8
NEW METHODOLOGY FOR LOW POWER HIGH SPEED CLA.
7