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reduced MOST threshold voltage

High Gain Enhanced CMOS Charge Pump with Reduced Leakage and Threshold Voltage

High Gain Enhanced CMOS Charge Pump with Reduced Leakage and Threshold Voltage

... gate-to-source voltage of 2VDD instead of ...higher voltage gain due to lower Ron of pMOS pass transistors under low input voltage condition compared to the case of using VDD ...gate-to-source ...

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Hybrid Domino XOR Gate with Dual Threshold Voltage Transistors

Hybrid Domino XOR Gate with Dual Threshold Voltage Transistors

... In this paper, two new domino XOR circuits are proposed in which by using a combination of N-type and P- type transistors could benefit from high-speed N-type and low power consumption P-type transistors together. In ...

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Implementation of floating gate MOSFET in inverter for threshold voltage tunability

Implementation of floating gate MOSFET in inverter for threshold voltage tunability

... low voltage and low power analog circuit ...low voltage and low power circuit design, a distinct number of techniques have been approached by researchers, such as bulk-driven, self-cascode, current mirror, ...

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A Nanoscale Low Power Resistorless Voltage Reference with High PSRR

A Nanoscale Low Power Resistorless Voltage Reference with High PSRR

... low-power voltage reference with high PSRR is presented in this paper, which is suitable for nanoscale applications and can be extended to more advanced ...MOSFET voltage divider, the re- quired CTAT ...

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Static Noise Margin Analysis of Various SRAM Topologies

Static Noise Margin Analysis of Various SRAM Topologies

... the threshold voltage, and gate leakage due to the reducing gate-oxide ...supply voltage is reduced drastically which reduces the threshold voltage of the ...the threshold ...

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SRAM Cell Leakage Control Techniques for Ultra Low Power Application: A Survey

SRAM Cell Leakage Control Techniques for Ultra Low Power Application: A Survey

... In this paper, the origin of leakage currents in a short-channel device has been discussed when a device is in conduction and non-conduction state. The various leakage control techniques proposed for low power SRAM cell ...

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Nanometre Regime Era:An Assessment of FinFET Based Low Power Digital Circuits

Nanometre Regime Era:An Assessment of FinFET Based Low Power Digital Circuits

... of threshold voltage with declined channel length is a well-acknowledged as short channel effect entitled the “threshold voltage roll-off”’ & can be easily control using double gate ...

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Investigation of threshold voltage variations in NMOS

Investigation of threshold voltage variations in NMOS

... The scaling process refers to a process that reducing the gate length of MOSFET to improve the device performance. It also implies reduction of other structure parameters of MOSFET to maintain the device aspect ratio. By ...

5

Dual Edge Adaptive Pulse Triggered Flip-Flop for a High Speed and Low Power Applications

Dual Edge Adaptive Pulse Triggered Flip-Flop for a High Speed and Low Power Applications

... Abstract- Pulse-triggered flip-flops are mainly used to improve speed of operation (pipeline speed), though flip-flop robustness and system timing closure are challenging in a wide range of supply voltages. Usually ...

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High Performance and Low Power 8 bit 16T full adder using MTCMOS Technique

High Performance and Low Power 8 bit 16T full adder using MTCMOS Technique

... as threshold voltage need to be reduced when the transistor size has been scaled As Vth is reduced leakage currents increase exponentially Earlier dynamic power was the major concern but as ...

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Effect of gate dielectric on threshold voltage of Nanoscale MOSFETS

Effect of gate dielectric on threshold voltage of Nanoscale MOSFETS

... are reduced beyond 180 nm, however, hundreds of millions of transistors are assembled on a single chip, leading to the increase of RC delay, power consumption, and wire cross-talk between multilevel interconnects ...

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A Proposed 0.4V Bulk Driven CMOS Inverter

A Proposed 0.4V Bulk Driven CMOS Inverter

... supply voltage and supply voltage ...supply voltage is the most efficient method to reduce dissipation of power of digital ...supply voltage such as decreased MOS Transistor ...

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Leakage Power in CMOS and Its Reduction Techniques

Leakage Power in CMOS and Its Reduction Techniques

... State-destructive techniques cut off transistor networks from supply voltage or ground using sleep transistors. Multithreshold CMOS (MTCMOS) technology uses high-Vth sleep transistors between pull-up networks and ...

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Stability Analysis of 6T SRAM at 32 Nm Technology

Stability Analysis of 6T SRAM at 32 Nm Technology

... supply voltage, transistor scaling, word line voltage, threshold voltage, and temperature on SRAM stability is analysis in Standby and Read ...Retention Voltage(DRV) during standby and ...

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Mathematical Modelling of Threshold Voltage based Resistive Memory

Mathematical Modelling of Threshold Voltage based Resistive Memory

... The parameter ‘x’ represents the at the most value that ‘x’ may be able to grow to in the oxide layer. Tunneling barrier width (x) is within the bound range only, for that reason fitting constant m and function ...

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A 10 BIT 50 MS/S LOW POWER PIPELINE ADC FOR WIMAX/LTE

A 10 BIT 50 MS/S LOW POWER PIPELINE ADC FOR WIMAX/LTE

... multipactor threshold of the ideal ...resonator. Most of the energy in the 3-rd order filter is stored in the second resonator according to electric circuit ...multipactor threshold can be directly ...

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ANALYSIS OF SUB THRESHOLD DEVICES TO LOW VOLTAGE FAULT ATTACKS

ANALYSIS OF SUB THRESHOLD DEVICES TO LOW VOLTAGE FAULT ATTACKS

... A. Barenghi, C. Hocquet, D. Bol, F.-X. Standaert, F. Regazzoni, and I. Koren, ``Exploring the feasibility of low cost fault injection attacks on sub-threshold devices through an example of a 65 nm AES ...

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A Transformerless Boost Converters with High Voltage Gain and Reduced Voltage Stresses on the Active Switches

A Transformerless Boost Converters with High Voltage Gain and Reduced Voltage Stresses on the Active Switches

... The fig.7 shows the circuit configuration of proposed converter III , which is the proposed converter I with two voltage-lift circuits. Thus , two inductors (L1 and L2) with the same level of inductance are also ...

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Modified Diode Assisted Extended Boost Quasi Z Source Inverter for PV Applications

Modified Diode Assisted Extended Boost Quasi Z Source Inverter for PV Applications

... the most efficient to- pology that provides a single stage conversion for PV systems by providing high input voltage gain, reduced number of components count, increased voltage boost property, ...

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Optimization of Power in C-MOS Circuit

Optimization of Power in C-MOS Circuit

... DVS very well manages the dynamic switching power, with shrinking feature size the static (leakage) power has increased exponentially which it cannot control. Particularly, at low activity levels, leakage power is ...

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