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General Overview

In document I/O Master (Page 45-49)

5. Accepted Technical Design

5.1.1 General Overview

The I/O Master hardware consists of three main subsystems and three voltage regulators. Figure   7 shows a level 1 block diagram of the system and the various connections between the  

subsystems. The hardware can be broken down into two separate signal domains. So-called “low   voltage” signals are 3.3V-level signals and include the computer interface and microcontroller   subsystem. So-called “high voltage” signals are at the voltage level of the target device, which   depending on the signal may be anywhere from -15V to +15V and include the signals that pass   through the circuit protection subsystem to the target device. As the I/O Master consists of   multiple I/O pins, the level shifter and circuit protection subsystems are repeated for each I/O   pin, giving each individual pin full configurability and circuit protection independent from other   pins. There is one level shifter subsystem for each pair of I/O pins, and there is one circuit   protection subsystem for each I/O pin.  

 

The microcontroller subsystem has two tasks: configuring the other hardware subsystems and   transferring data between the digital interface and the computer. Depending on the protocol   selected, the level shifter subsystem must be configured for the electrical requirements of the   protocol, including logic voltage levels, pull-up/pull-down resistors, and single-ended/differential   communication modes. The adjustable regulator must also be configured for the correct voltage   to power the target device. The microcontroller takes configuration commands from the  

computer and outputs the correct signals, whether a digital signal or analog voltage, to configure   the hardware. Once configured, the microcontroller is responsible for taking digital data from the   computer and generating the proper digital signal for the protocol selected as input to the level   shifter. Conversely, the microcontroller must read received signals from the level shifter and send   the received digital data to the computer.  

The level shifter subsystem separates these two signal domains and shifts signals from the   low-voltage domain to the high-voltage domain and vice versa. Based on a configuration signal   from the microcontroller, the level shifter generates two logic voltage rails, V H and V L , used for  

high-voltage signalling. Since a low-voltage signal state can be either 0V or 3.3V, the  

corresponding high-voltage signal state is either V L or V H , respectively. The logic voltage rails are  

also used to generate a threshold voltage for interpreting the state of received signals. As all   microcontroller signals are single-ended, the level shifter subsystem is also responsible for   converting single-ended signals to differential signals and vice versa. For this reason, there is one   level shifter subsystem for each pair of I/O pins. In differential mode, I/O pins are paired together   and two pairs of logic voltage rails, V H1 , V L1 and V H2 , V L2 , are used to generate differential voltages.  

The circuit protection subsystem is designed to protect the target device from over-current and   over-voltage related failures. To achieve this, the voltage is limited using zener diodes to clamp   the voltage while the over-current protection is made of op-amps, an NMOS transistor and a   voltage divider to control the gate voltage.  

To power the various subsystems, there are three separate voltage regulators. The 3.3V regulator   generates a 3.3V voltage rail for powering the microcontroller subsystem and low-voltage side of   the level shifter subsystem. The ±15V regulator generates two opposite voltage rails, +15V and   -15V, used for powering the high-voltage side of the level shifter subsystem and circuit  

protection subsystem. Finally, the adjustable regulator is used solely for powering the target   device, as long as the target device’s power requirements are small. A control signal from the   microcontroller can set the output voltage anywhere between 3.3V and 15V.  

Tables 5, 6, 7, 8, 9, and 10 list the functional requirements for the subsystems shown in Figure 7.  

Table 5: Microcontroller Subsystem Functional Requirements  

Module   Microcontroller Subsystem  

Designer   Ian Glen & Nik Untch  

Inputs   - 3.3V power input  

- USB interface  

- Low-voltage signals from level shifter subsystem  

Outputs   - USB interface  

- Low-voltage signals to level shifter subsystem   - Control signals to level shifter subsystem   - Control signal to adjustable regulator  

Description   The microcontroller is responsible for configuring the level shifter hardware for the protocol that   the user has selected and transferring data between the USB interface and low-voltage digital   I/O.  

   

Table 6: Level Shifter Subsystem Functional Requirements  

Module   Level Shifter Subsystem  

Designer   Ian Glen  

Inputs   - 3.3V power input  

- ±15V power input  

- Low-voltage signals from microcontroller subsystem   - Control signals from microcontroller subsystem   - High-voltage signals from circuit protection subsystem  

Outputs   - Low-voltage signals to microcontroller subsystem   - High-voltage signals to circuit protection subsystem  

Description   The I/O level shifter is responsible for translating digital signals between the low voltages   required by the microcontroller and the high voltages required by the target device. For protocols   that require differential signalling, this module also converts the high voltage signals to  

single-ended signalling as required by the microcontroller. This module accepts control signals   from the microcontroller so that its hardware can be configured in specific ways depending on   the protocol selected.  

 

Table 7: Circuit Protection Subsystem Functional Requirements  

Module   Circuit Protection Subsystem  

Designer   Nik Untch  

Inputs   - ±15V power input  

- High-voltage signals from level shifter subsystem   - High-voltage signals from target device  

Outputs   - High-voltage signals to level shifter subsystem   - High-voltage signals to target device  

Description   The I/O circuit protection module protects the Target Device against issues such as overcurrent   and overvoltage, and protects the I/O Master from reverse polarity  

 

Table 8: 3.3V Regulator Functional Requirements  

Module   3.3V Regulator  

Designer   Nik Untch  

Inputs   - 5V to 12V power input  

Outputs   - Regulated 3.3V power rail  

Description   The 3.3V regulator is designed to provide a 3.3V power rail for the microcontroller subsystem   and low-voltage side of the level shifter subsystem.  

Table 9: ±15V Regulator Functional Requirements  

Module   ±15V Regulator  

Designer   Ian Glen  

Inputs   - 5V to 12V power input  

Outputs   - Regulated +15V power rail  

- Regulated -15V power rail  

Description   The ±15V is designed to provide both +15V and -15V power rails for the high-voltage side of the   level shifter subsystem and the circuit protection subsystem.  

 

Table 10: Adjustable Regulator Functional Requirements  

Module   Adjustable Regulator  

Designer   Nik Untch  

Inputs   - 5V to 12V power input  

- Control signal from microcontroller subsystem  

Outputs   - Regulated power rail, adjustable between 3.3V to 15V  

Description   The adjustable regulator is designed to provide a regulated power rail for the purpose of   powering the target device. Depending on the control signal, the output voltage is adjustable   between 3.3V and 15V.  

 

In document I/O Master (Page 45-49)

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