HIGH VOLTAGE EFFICIENT LIGHTING BASED ON THE LOSS-FREE
RESISTOR CONCEPT.
Antonio León Masich
Dipòsit Legal: T 1338-2015
ADVERTIMENT. L'accés als continguts d'aquesta tesi doctoral i la seva utilització ha de respectar els drets de la persona autora. Pot ser utilitzada per a consulta o estudi personal, així com en activitats o materials d'investigació i docència en els termes establerts a l'art. 32 del Text Refós de la Llei de Propietat Intel·lectual (RDL 1/1996). Per altres utilitzacions es requereix l'autorització prèvia i expressa de la persona autora. En qualsevol cas, en la utilització dels seus continguts caldrà indicar de forma clara el nom i cognoms de la persona autora i el títol de la tesi doctoral. No s'autoritza la seva reproducció o altres formes d'explotació efectuades amb finalitats de lucre ni la seva comunicació pública des d'un lloc aliè al servei TDX. Tampoc s'autoritza la presentació del seu contingut en una finestra o marc aliè a TDX (framing). Aquesta reserva de drets afecta tant als continguts de la tesi com als seus resums i índexs.
ADVERTENCIA. El acceso a los contenidos de esta tesis doctoral y su utilización debe respetar los derechos de la persona autora. Puede ser utilizada para consulta o estudio personal, así como en actividades o materiales de investigación y docencia en los términos establecidos en el art. 32 del Texto Refundido de la Ley de Propiedad Intelectual (RDL 1/1996). Para otros usos se requiere la autorización previa y expresa de la persona autora. En cualquier caso, en la utilización de sus contenidos se deberá indicar de forma clara el nombre y apellidos de la persona autora y el título de la tesis doctoral. No se autoriza su reproducción u otras formas de explotación efectuadas con fines lucrativos ni su comunicación pública desde un sitio ajeno al servicio TDR. Tampoco se autoriza la presentación de su contenido en una ventana o marco ajeno a TDR (framing). Esta reserva de derechos afecta tanto al contenido de la tesis como a sus resúmenes e índices.
WARNING. Access to the contents of this doctoral thesis and its use must respect the rights of the author. It can be used for reference or private study, as well as research and learning activities or materials in the terms established by the 32nd article of the Spanish Consolidated Copyright Act (RDL 1/1996). Express and previous authorization of the author is required for any other uses. In any case, when using its content, full name of the author and title of the thesis must be clearly indicated. Reproduction or other forms of for profit use or public communication from outside TDX service is not allowed. Presentation of its content in a window or frame external to TDX (framing) is not authorized either. These rights affect both the content of the thesis and its abstracts and indexes.
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Perquè només van ser necessaris set anys per mostrar-me
tot allò que es necessita al llarg d’una vida sencera.
En primer lugar, dar las gracias a mis directores de Tesis, el Dr. Hugo
Valderrama-Blavi y el Profesor Luis Martinez-Salamero, por haber confiado en mí desde el primer
día en que llegue al grupo de automática y electrónica industrial (GAEI), darme la
oportunidad de realizar ésta tesis, y por la multitud de consejos y conocimientos que
me han aportado a lo largo de estos años.
Como no, agradecer a todos los miembros actuales y pasados que han formado parte
del GAEI, con los que tantas horas de laboratorio hemos compartido, y se ha acabado
formando un gran vínculo de amistad que ha hecho que el trabajo diario sea muy
ameno: Josep Maria Bosque, X. Alsina, M. Muñoz, L. Albiol, F. Flores, S. Mendez,
H. Ramirez, T. Martínez, C. Restrepo, O. Avinyo, P. Gaona, A. Teixido, J.I. Talpone,
C. Olalla, R. Haroun, M. Bodetto, C. Torres, J.F. Reynaud, R. Bonache, D. Kos,
S. Wu-Fu y A. Marcos.
También un reconocimiento especial a todos los profesores del departamento, que
siempre han estado disponibles para cualquier consulta o duda.
I would also like to thank Professor Miro Milanovic, for his guidance and his discussion
during the time when I was visiting the Faculty of Electrical Engineering and
Computer Science in Maribor (Slovenia). Also, the team that helped me in the work
and did my stay one of the best experiences of my PhD: T. Konjedic, L. Korosek,
M. Truntic, and M. Rodic.
Finalmente, agradecer a mis padres y hermano el soporte incondicional y fe que han
tenido en mí desde el primer momento, dándome los ánimos y apoyos necesarios para
conseguir cualquier objetivo. A mis tíos y primos más cercanos, que siempre han
confiado en mí. Y por último a mis amigos, esa familia que se escoge que me ha
ayudado a desconectar cuando ha sido necesario.
xiii
Contents
List of figures ... xv
List of tables... xix
List of abbreviations ... xxi
Abstract ... xxiii
1 Switched-Power Converters Used in Efficient Lighting ... 25
1.1 Why using of efficient lighting? ... 25
1.2 Electronic drivers used to supply Light Emitting Diodes (LEDs). ... 26
1.3 Electronic ballasts to supply High-Intensity Discharge (HID) lamps. ... 28
1.4 Electronic ballasts for supplying Induction Electrode-less Fluorescent Lamps (IEFL). ………..30
1.5 Motivation and goal of the thesis. ... 32
1.5.1 Loss-Free Resistor (LFR) approach applied to the efficient lighting. ... 32
1.5.2 Sliding-mode control in switched power converters. ... 34
2 LFR-based ballasts for high-voltage low-power LED lighting. ... 35
2.1 Sliding-mode control-based boost converter for high-voltage-low power applications. 35 2.1.1 Converter description and operation. ... 37
2.1.2 Sliding-mode control analysis... 39
2.1.3 Single-stage boost converter implementation. ... 44
2.1.4 Experimental results. ... 46
2.1.5 Conclusion of the high-gain single stage boost converter. ... 50
2.2 Efficiency comparison between Si and SiC-based implementations in a High-Gain DC-DC boost converter. ... 51
2.2.1 Use of SiC devices in power converters. ... 51
2.2.2 Developed application and comparison efficiency. ... 52
2.2.3 Experimental set-up. ... 53
2.2.4 Losses estimation. ... 55
2.2.5 Experimental results. ... 61
2.2.6 Conclusions of the efficiency investigation in the single-stage boost converter. ... 65
2.3 A high voltage SiC-based boost PFC for LED applications. ... 66
2.3.1 Grid-supplied lighting systems. ... 66
2.3.2 Sliding-mode operation analysis in the PFC-boost converter. ... 67
2.3.3 Normal mode vs. burst mode in the PFC-boost converter. ... 71
2.3.4 PFC-boost converter implementation. ... 74
2.3.5 Experimental results. ... 77
xiv
3 Dimmable Electronic ballast based on Loss-Free Resistor (LFR) approach to
supply High-Intensity Discharge (HID) Lamps. ... 85
3.1 Battery-Supplied DC-ballast for high Intensity Discharge (HID) Lamps. ... 86
3.1.1 DC-Electronic Ballast description and analysis. ... 86
3.1.2 DC Electronic Ballast Implementation. ...101
3.1.3 Experimental results. ...105
3.1.4 Conclusions of the DC Electronic Ballast with LFR behaviour. ...110
3.2 High-Frequency Electronic Ballast for HID lamps with LFR behaviour based on sliding mode control implemented in FPGA. ...111
3.2.1 Loss-Free Resistor approach implemented by FPGA. ...111
3.2.2 Resonant Inverter Design. ...116
3.2.3 Electronic Ballast Stability Analysis. ...118
3.2.4 Electronic Ballast Implementation. ...119
3.2.5 Experimental Results. ...124
3.2.6 Conclusions of the high frequency electronic ballast for HID lamps. ...126
4 Dimmable electronic ballast with LFR behaviour to supply Induction Electrode-less Lamps (IEFL). ... 127
4.1 Introduction ...127
4.2 IEFL Electrical Equivalent Model. ...127
4.3 LFR Based Dimming Methodology ...130
4.3.1 Sliding Mode converter Analysis. ...131
4.4 LSCSCP Resonant Inverter Analysis ...132
4.4.1 LSCSCP response under dimming operation. ...132
4.5 Electronic Ballast Stability Analysis...135
4.6 Electronic Ballast Implementation. ...136
4.6.1 Boost converter design. ...136
4.6.2 LSCSCP Resonant Inverter Design. ...138
4.7 Experimental results ...139
4.8 Conclusions of the LFR ballast to supply IEFLs ...142
5 Conclusions and future works ... 145
5.1 General Conclusions ...145
5.2 Future works ...146
xv
List of figures
Fig 1. Illumination level in Europe illustrated by the European Space Agency (ESA). ... 25
Fig 2. Types of LED lighting in the market. ... 27
Fig 3. (a) Analogue dimming, (b) PWM dimming. ... 28
Fig 4. Diverse types of HID lamps available in the market. ... 29
Fig 5. IEFL lamps. (a) External-inductor lamp. (b) Internal-inductor lamp. ... 31
Fig 6. (a)Two port model of the LFR. (b) Power source characteristics. ... 33
Fig 7. Boost converter with LFR behaviour controlled by means of sliding mode control. ... 33
Fig 8. Boost regulator with parasitic elements for LED lighting ... 37
Fig 9. Inductor current at CCM, boundary, and DCM operation. ... 38
Fig 10. DC gain of the boost converter for different output loads. ... 39
Fig 11. a) Boost converter with parasitic elements, b) ON state, c) OFF state ... 40
Fig 12. Boost converter with hysteretic control of the input current ... 43
Fig 13. Dynamic model of the switching regulator depicted in Fig. 9. ... 43
Fig 14. Power stage scheme. ... 44
Fig 15. Control implementation schematic circuit. ... 44
Fig 16. Typically JFET driver. (a) n-on (b) n-off. ... 45
Fig 17. Implementation of the driver prototype circuit. ... 46
Fig 18. Driver prototype. ... 46
Fig 19. Effficiency (cont.line) and switching frequency (dis. ine). ... 47
Fig 20. Converter waveforms for a resistive load of 60 k. ... 48
Fig 21. LED-based Spot light and boost converter with SiC devices. ... 48
Fig 22. Converter waveforms for a 320 LEDs load. ... 49
Fig 23. Start-Up transient of SiC JFET device. ... 49
Fig 24. Peak current in start-up transient of SiC JFET. ... 50
Fig 25. Turn-off transient of SiC JFET device. ... 50
Fig 26. Boost converter supplying a series connection of LEDs. ... 53
Fig 27. Tested switching cells. A) Si MOSFET/Si diode. B) SiC JFET/Si diode. c) SiC JFET/SiC Schottky (A), d) JFET/ SiC Schottky (B). ... 53
Fig 28. Experimental set-up: a) boost converter b) Input voltage probe c) DC power supply d) Power supply for control circuitry e) Oscilloscope f) Output resistive load g) Output voltage probe h) Output voltage multi-meter i) LED spot load with 320 LEDs in series. .. 54
Fig 29. Steady-state waveforms of high-voltage low-power experiment in a boost converter operating in the DCM-CCM boundary. ... 54
Fig 30. (a) inductance vs. frequency. (b) Parasitic resistance vs. frequency ... 58
Fig 31. Efficiency and switching frequency with different switching cells. (a) Si/Si, (b) SiC/Si, (c) SiC/SiC A, (d) SiC/SiC B. ... 62
xvi
Fig 32. Switching losses illustration. (a) Steady-state for SiC/Si and detailed zoom for (b)
SiC/Si, (c) SiC/SiC A, (d) SiC/SiC B. ... 64
Fig 33. SiC-SiC (B)-based boost converter supplying a high voltage LED-spot. ... 65
Fig 34. Boost converter with a hysteretic control of the input current. ... 67
Fig 35. Boost converter states. A) ON-state; and b) OFF-state ... 67
Fig 36. Input current of the PFC-boost converter. ... 68
Fig 37. Dynamic model of the switched regulator depicted in Fig. 32. ... 71
Fig 38. Steady-state response of: a) Output current io(t). b) Rectified line voltage v1(t), c) inductor current iL(t), d) zoom of the inductor current iL(t). ... 72
Fig 39. Burst mode control block diagram. ... 73
Fig 40. Input current of the PFC-boost converter under burst operation compared with input current envelope in normal mode (NA=2, NT=4). ... 74
Fig 41. Power stage scheme ... 74
Fig 42. Losses comparison among Si and SiC devices. ... 75
Fig 43. Detailed circuit implementation of the sliding mode control. ... 76
Fig 44. Detailed circuit implementation of the burst mode control. ... 77
Fig 45. Single-stage PFC boost converter prototype. ... 78
Fig 46. (a) Practical sliding mode control implementation. (b) Practical burst operation implementation (c) LED array with bypass Zener on the bottom side. ... 78
Fig 47. (a) Converter waveforms for a LED spot load. (b) Converter with LED spot-light ... 79
Fig 48. Converter waveforms for a 60 k load. ... 80
Fig 49. Input current harmonic content for a 60 k resistive load in normal mode. ... 80
Fig 50. Converter waveforms with burst operation for a 60 k load. ... 81
Fig 51. Input current harmonic content for a 60 k resistive load in burst mode. ... 81
Fig 52. Converter response for input voltage variations IEC 77A Class 2. ... 82
Fig 53. Converter response for input voltage variations of triangular type. ... 82
Fig 54. Converter response for a highly distorted input voltage. ... 82
Fig 55. Converter response for a sinusoidal input voltage with sub-harmonics. ... 83
Fig 56. Block diagram of the LFR-based ballast. ... 86
Fig 57. DC Electronic Ballast with LFR behaviour for HID Lamps. ... 86
Fig 58. Sequence of ballast conduction states. ... 87
Fig 59. DC Electronic Ballast in start-up operation. ... 88
Fig 60. Topology A of the DC Electronic Ballast in start-up operation. ... 88
Fig 61. Topology B of the DC Electronic Ballast in start-up operation. ... 88
Fig 62. Topology C of the DC Electronic Ballast in start-up operation. ... 89
Fig 63. Topology D of the DC Electronic Ballast in start-up operation. ... 89
Fig 64. Dynamic model of the switched converter. ... 96
Fig 65. (a) DC Electronic ballast in warm-up and steady-state operation. (b) ON-state. (c) OFF-state. ... 97
Fig 66. Dynamic model of the boost converter in warm-up and steady –state operation. ...100
xvii
Fig 68. Power stage circuit scheme of the proposed DC Electronic ballast. ... 104
Fig 69. Experimental set-up with three HID lamps. ... 105
Fig 70. DC-Electronic Ballast start-up transient with Metal Halide Lamp Pulse start Lamp. 106 Fig 71. DC-Electronic Ballast warm-up operation with Metal Halide Pulse Start Lamp. ... 106
Fig 72. DC-Electronic Ballast steady-state operation with Metal Halide Pulse Start Lamp. .. 107
Fig 73. DC-Electronic Ballast start-up transient with Vapour Sodium Lamp. ... 108
Fig 74. DC-Electronic Ballast warm-up operation with Vapour Sodium Lamp. ... 108
Fig 75. DC-Electronic Ballast steady-state operation with Vapour Sodium Lamp. ... 108
Fig 76. DC-Electronic Ballast Start-Up transient with Dual Metal Halide Lamp. ... 109
Fig 77. DC-Electronic Ballast Warm-up operation with Dual Metal Halide Lamp. ... 110
Fig 78. DC-Electronic Ballast Steady-State operation with Dual Metal Halide Lamp. ... 110
Fig 79. Boost converter-based LFR plus full bridge resonant inverter and FPGA control implementation. ... 111
Fig 80. Electronic ballast block diagram with boost-based LFR. ... 111
Fig 81. Inductor current iL(t), and discretized inductor current iL(n). ... 112
Fig 82. Boost converter states. a) ON-state; and b) OFF-state ... 113
Fig 83. Switched converter dynamic model. ... 115
Fig 84. Start-Up transient and steady-state operation ... 116
Fig 85. H(s)FILTER transfer function after ignitionconsidering the lamp parameters set. z=(1,10,100) Hz, and p=(100,1000,10000) Hz. ... 118
Fig 86. Electronic ballast small-signal circuit to stability analysis. ... 118
Fig 87. Modules of boost ZO(s) and resonant tank Zi(s) impedances considering Ro=50, and different values of lamp poles and zeros. ... 119
Fig 88. Boost converter stage implementation. ... 120
Fig 89. (a)Full bridge implementation. (b) Driver used in the four MOSFETs of the full bridge. ... 120
Fig 90. Resonant filter implementation and output voltage protection. ... 121
Fig 91. Input current and voltage measurements implementation. ... 122
Fig 92. Flowchart of the switching algorithm implemented in the FPGA for the boost converter with LFR behaviour. ... 123
Fig 93. Flowchart of the full bridge soft-start and steady-state operation. ... 124
Fig 94. Electronic Ballast with LFR to supply HID lamps experimental prototype. ... 124
Fig 95. Start-up transient. ... 125
Fig 96. Warm-up operation of the electronic ballast in HFSW. ... 125
Fig 97. Steady-state operation of the electronic ballast in HFSW. ... 126
Fig 98. Electronic Ballast block diagram with boost LFR. ... 127
Fig 99. (a) IEFL Electrical Equivalent Model. (b) Model with the lamp parameters referred to the primary. (c) IEFL simplified model considering the lamp core parameters [59]. ... 128
Fig 100. RLAMP as function of the lamp active power. ... 129
Fig 101. RCORE as function of the lamp active power. ... 130
xviii
Fig 103. LCORE as function of the lamp active power. ...130
Fig 104. Total ballast block diagram. Boost converter with LSCSCP full bridge inverter and IEFL Electrical Equivalent Model. ...131
Fig 105. Filter and IEFL Electrical equivalent model impedances. ...133
Fig 106. LSCSCP Resonant inverter Bode diagram for different lamp power levels. ...134
Fig 107. Measured I-V curve of the IEFL Endura 150 W. ...134
Fig 108. Electronic ballast small-signal circuit to stability analysis. ...135
Fig 109. Electronic ballast impedance stability analysis. ...136
Fig 110. Power stage circuit scheme of the proposed boost-based LFR. ...136
Fig 111. Sliding-mode controller circuit scheme. ...137
Fig 112. Power stage circuit and logic circuitry scheme of the proposed LSCSCP resonant inverter. ...139
Fig 113. Picture of the electronic ballast experimental prototype. ...139
Fig 114. Start-up transient. ...140
Fig 115. Warm-up transient. ...140
Fig 116. Lamp coil and boost input variables. ...141
Fig 117. Resonant inverter detail. ...141
Fig 118. Boost converter detail. ...142
xix
List of tables
Table I. Types of lamps and corresponding features ... 26
Table II. Inductor RMS currents in different conduction modes. ... 38
Table III. Power switches used in the single stage boost converter. ... 47
Table IV. Parameters of the evaluated devices ... 55
Table V. Coefficients for the polynomial fitting of EON (IDS) and EOFF (IDS) ... 57
Table VI. Estimated semiconductor losses in the boost converter at DCM-CCM operation ... 58
Table VII. Total system losses at VS=9 V. ... 60
Table VIII. Total system losses at VS=12 V. ... 60
Table IX. Total system losses at VS=14 V. ... 61
Table X. Design specifications. ... 71
Table XI. Power switches used in the PFC-boost converter. ... 75
Table XII. Power switches of the DC-Electronic ballast for HID lamps. ... 102
Table XIII. Power switches used in the boost converter. ... 121
Table XIV. RLAMP(P) Calculated Data. ... 129
Table XV. RCORE(P) Calculated Data. ... 129
Table XVI. CLAMP(P) Calculated Data. ... 129
Table XVII. LCORE(P) Calculated Data. ... 129
xxi
List of abbreviations
AR Acoustic resonances.
ADC Analogue to digital converter
SiC Silicon carbide.
Si Silicon.
C Converter output capacitor
CRI Colour rendering index
CCM Continuous conduction mode.
CDS Drain to source parasitic capacitance
CGS Gate to source MOSFET/JFET parasitic capacitance Ciss MOSFET/JFET input capacitance
Cj Diode junction capacitance D Converter duty-cycle
DCM Discontinuous conduction mode.
D1 Converter diode
Eoff Energy losses in the JFET “off” transient Eon Energy losses in the JFET “on” transient fsw Boost converter switching frequency FL Fluorescent lamp.
FPGA Field programmable gate array
gfs MOSFET/JFET transconductance HFSW High-frequency sinusoidal waveform.
HID High-intensity discharge.
IEFL Induction electrodeless fluorescent lamps.
iD Diode instantaneous current ID Diode average current
iDS Drain to source MOSFET/JFET instantaneous current IDS Drain to source MOSFET/JFET average current iL Instantaneous inductor current
IL Average inductor current
iM MOSFET/JFET instantaneous current IM(rms) MOSFET/JFET root mean square current io Converter instantaneous output current Io Converter average output current Iref Control reference current
L Converter inductance
LED Light-emitting diode.
LFR Loss-free resistor.
LFSW Low-frequency square waveform.
PWM Pulse-width modulation.
rC Capacitor series resistance Rds(on) MOSFET/JFET on resistance rL Inductor series resistance
xxii
RO Load resistance
RSENSE Input current sensor resistance S1 Converter main switch
toff MOSFET “off” switching transient duration ton MOSFET “on” switching transient duration VDS Drain to source MOSFET/JFET average voltage vF Diode instantaneous forward voltage
VF Diode average forward voltage
VGG Average differential voltage applied to the MOSFET/JFET gate vo Converter instantaneous output voltage
Vo Converter average output voltage VS Converter input voltage
xxiii
Abstract
In this thesis, the notion of loss-free resistor (LFR) is used systematically to design power supplies for efficient lighting, namely light emitting diodes (LEDs), high intensity-discharge lamps (HID) and induction electrode-less fluorescent lamps (IEFLs) with the aim of reducing the electrical energy consumption in domestic or industrial applications.
The different lamps previously mentioned are supplied at constant power independently of the lamp type and impedance, taking advantage of the LFR nature, i.e. an emulated resistance in the input port and a power source in the output port.
The sliding -mode control technique is applied in the boost converter to impose the LFR behaviour in continuous conduction mode (CCM) in some cases, and in the boundary between CCM and discontinuous conduction mode (DCM) in other cases. This control technique has been implemented throughout the thesis by either analogue or digital controllers and allows regulating the light emitted by the lamps.
LFR behaviour is indirectly achieved in the case of LEDs lighting, in which a high voltage is obtained from both a low DC voltage (12 V) and the electrical grid. With only one boost converter and a 12 V battery, voltage gains around 100 are attained resulting in an output voltage of 1.2 kV. In the case of grid supply, two operation modes are realized, i.e. the normal mode like in battery supply and the burst mode, which intends to improve the efficiency without introducing changes in the converter and control.
Regarding the HID lamps a double-stage converter is presented in order to supply this type of lamps by a DC voltage. The first stage is a boost converter with LFR behaviour, and the second one a switched-capacitor boost converter. When the lamp is off, the two converters are operating in cascade sharing the same control signal and achieving voltages around 6 kV from a 12 V battery. Once the lamp is on, only the boost converter with LFR is working, delivering always the selected power to the HID in the warm-up and in steady-state operation irrespective of the lamp impedance. As a consequence, both output voltage and current values are automatically adjusted by the lamp impedance level.
Supplying HID lamps from a high-frequency AC voltage is also investigated by studying a boost converter with LFR behaviour in cascade with a full bridge LCC resonant inverter. In this case, the control technique is realized in the boost converter by means of a FPGA-based digital controller. The full bridge resonant inverter is used to generate the necessary gain to provoke the lamp start-up. Subsequently, the inverter operates at high frequency avoiding acoustic resonances (AR).
Finally, a boost converter with LFR behaviour in cascade with a full bridge LCC inverter is presented in order to supply an IEFL lamp by means of a high-frequency AC voltage. As in the previous cases, the converter supplies the lamp at constant power irrespective of the lamp
xxiv
impedance. In this case, due to the IEFL operation, the full bridge resonant inverter is always working at high frequency.
All the converters presented in the thesis are first analysed, then simulated and finally tested experimentally showing the feasibility of LFR-based switching regulators in the field of efficient lighting.
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com our s w gene amp mai Ds o of by pab n th um ort a no efor n ofss-Los tim LFR po npu def he t put erbo thes er c rter IE
vat
mmo of with eral ps w in h or I f th S. S ble t his po was on-d re, t f poFr
ss F me -R i wer ut p fine tota por ola) sis, can sta EFLtio
on the the l ap woul hyp IEF he c Sin to s typ int s ca diss this oweee
Free -var is a rs a port ed a al p rt. an a n be age L inon
cha e di e ai ppro ld b poth FLs, con ger supp pe o det alle sipa s th r suRe
e R riab an i are t an as a pow Th nd a new ea . T ndepan
arac iffer im oac be d hesi , ca nec et ply of s term ed l ativ hesi uppesis
Resis ble dea equ nd an wer e eq a str lig sily Ther pennd
cter rent to h le desi is o an cted t al a c yst min loss ve el s ex pliessto
stiv tra al tw ual a p elem pro qui raig ght y ad refo ndengo
risti t la con ead rab f th hav d st lt. con ems ned -fre lect xplo s foror (
ve ( nsfo wo-, w pow men ovid libr ght reg djus ore, ntlyoal
ic in amp ntro ding ble. his ve i tage in nsta s, t by ee r tron ores r ef(LF
LFR orm - po whic wer nt t ded rium line ula sted th y ofl o
n a ps, i ol ac g to wo in c e a ref nt he the resis nic s th fficiFR
R) mer ort ch c sou tha in m p e de tion d w he b f tof t
all t i.e., ccu o a rk com at it fere pow out e ou stor ball he u entR) a
pri (TV pow can urce at d the poin efin n m witho ball hethe
the , th urat fle is t mmo ts nce wer tput utpu r (L last use t ligapp
ncip VT wer be e at deliv e ou nt in ning meth out ast loae t
pre he e ely xib that on out es [ reg t vo ut i LFR t su of d ghtipro
ples ) [6 r pr mo t th vers utp n F g th hod co he adthe
evio elect the le b t po a c tput [60, gard olta imp R), uppl diff ngoac
s w 64] c roce ode he o s po put Fig. he lo is ontr ere chaesi
ous tric e su ball owe con t. T 61 dles age peda an lyin feren emh a
wer con essin elled outp owe is e 6 ( oad pre rolli pro aracis.
wo cal upp last er s ver Thi 1], ss o an ance d w ng d nt c ployapp
re p ntro ng d [6 put er t equ (b) res esen ing opo cter orks cha plied t wi supp ter s id wh of th d c e an was dive circ yinplie
pres lled elem 67] b po to t ual t is t sista nted the sed risti s is arac d vo ith plie sta dea here he c curr nd t pr erse cuit g Led
ent d by men by ort the to t the anc d to e in d wi ics, th cter olta com es fo age a is e a con ent the ropo ga s w LEDto
ted y a nt o me as ou the int ce. o su nput ill i.e he n risti age mm or e su clo tw nnec t va po osed as di with Ds, Hth
by sign of P eans sho utpu tot ters ppl t cu alw e. r need ics o or mon effic uppl osel wo-p cted alue wer d as isch LF HIDhe e
S.S nal POP s of own ut, tal sect ly IE urre ways rega d to of e cur ele cien lyin ly port d ou es a r ha s a harg FR Ds oeffi
Sing pro PI f an n Fi irre pow ion EFL ent s d ardl o un each rren eme nt li ng a rela t p utpu are t and po ge l cha or Iicie
ger oces typ n em ig. espe wer of L la or eliv less nde h o nt r ents ight a c ated powe ut i the dled ossib lam arac EFent
[60 ssin pe [ mul 6 ( ecti r ab a p amp vo ver s of erst one requ s fo ting cons d to er-c imp co by ble mps cter L lat li
0, 6 ng c 66] ate (a). ive bsor pow ps, oltag the f th and at uire or t g em stan o t con peda ord y th sol [62] risti ampgh
63] circu , i d r Th of rbed wer in w ge o e d he d ex diff d b the mpl nt p the serv anc dina e ci luti ]. ics i ps.tin
from uit i.e. esis he p the d b con whi of t esir IEF xact ffere by t thr loyi pow wo vati ce w ates ircu ion in tng.
m t [65 inp stan pow e lo by t nsta ich the red FL tly ent the ree ing wer ork ive was of uit. to the the ]. put nce wer oad the antco co bu th in w ce im R ba onve ondu uck-he l n ph ay erta mple e·I ased T erte uct -bo iter hoto N to i ain s eme IL, a T d-L The ers ion oost ratu ovol Neve imp slid ente as d Fig This FR no exh mo SE ure ltai erth plem ding ed depi g 7. s typ R as F otio hibi ode EPIC in c sy hele men g mo by icte Boo pe o a ig 6 n o it i e (D C, a hig yste ess, nt a otio im d in ost of L com (a 6. (a of L npu DCM and gh q ems bu LF ons mpos n F con LFR mm a) a)T LFR ut r M) d Ću qual s [69 uck-FR. in sing ig. nvert R sy mon wo R w resi und uk c lity 9]. boo A w the g a 7. ter ynth ele por was istiv der con rec ost, wel e ap sli with hes eme t m s or ve i pu nver ctif SE ll kn ppro din h LF is is nt mode rigi imp ulse rter ficat EPI now opri ng m FR s st for el of inal peda wi s. D tion IC, w m iate mod beh tudi eff f the ly anc dth Dive n [6 and meth e co de c havi ied ficie e LF lim ce i h m erse 68], d Ć hod onve con our in ent FR. mited n s modu e ap and Ćuk for erte ntro con this lig (b) d t stea ulat ppli d p k co r th ers l w ntro s w htin Po to t ady-tion cat powe onve e re [70-with olled ork ng ower the -sta n te ion er i erte eali -72] h a d by k, i.e of r sou re ate echn s us inte ers zat ]. A con y me e. t LED urce ecog wh niqu sing erfa in ion As a ntro eans he D, e ch gnit hen ues g th ace PW of an e ol s s of emp HID (b harac ion ope [62 hese in D WM the exam surf slid ploy D o b) cter n th era 2], t e cir DC M-DC e LF mp face ding y o of I risti hat ting this rcui im CM FR le, e gi mo f sli IEF cs. cer g in s be its mped M ar is t a L iven ode idin L l rtai n d eing can dan re n the LFR n b con ng m lam in disco g th n be nce not ind R ca by s trol mod mps swi onti he c e fou ma th duct an a s(x) l. de c is c itch inu case und atch e o tion also ) = cont clos 33 hing ous e of d in hing only n of o be =VS -trol sely 3 g s f n g y f e -l y
34 exa va