An Efficient Deadlock-free NARCO based Fault Tolerant Routing Algorithm in NoC Architecture

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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 2, February 2012)

227

An Efficient Deadlock-free NARCO based Fault Tolerant

Routing Algorithm in NoC Architecture

Amit Zinzuwadia

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, Parag Parandkar

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, Renu Verma

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,

Sumant Katiyal

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Subject Matter Expert, Amdocs, Gurgaon, Haryana,

2_{Assistant Professor, ECE dept, NIIT Univ., Rajasthan} 3 _{Assistant Professor, CSE Dept, Rama Institute of Tech., Kanpur, U.P.} 4_{Professor, School of Electronics, Devi Ahilya University, Indore, M.P.}

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Abstract— Network-on-chip is a scalable and flexible communication medium for the design of multi-core based System-on-chip. Communication performance of NoC depends heavily on efficient routing algorithms. Deterministic and adaptive routing techniques have been widely promoted in all current NoC architectural proposals. Reliability and deadlock freedom are one of the keyconcerns in today’s scenario in presence of fault. There are number of probable ways that can cause faults in NoC. Fault-tolerant routing is the ability to survive failure of individual components and usually uses several virtual channels (VCs) to overcome faulty nodes or links. We proposed a deterministic fault-tolerant, deadlock-free routing protocol in two-dimensional (2D) mesh which uses two virtual channels based on a novel and modified low-overhead neighbor aware, turn-model based fault tolerant routing scheme (NARCO) for NoCs which combines threshold based replication in network interfaces, a parameterizable region-based neighbor awareness in router and the odd-even and inverted odd-even turn models. The proposed scheme enables better packet arrival rates and reduces overall average latency and network power compared with fault tolerant XY and NARCO.

Keywords— Network-on Chip, Fault tolerant Routing,

Neighbor-aware turn-model based, NARCO.

I. INTRODUCTION

The continuing decrease in feature sizes of core Very Large Scale Integration (VLSI) circuits enables the integration of dozens, and in future hundreds of processing elements (cores, resources) on a single chip.

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Traditional on-chip buses can no longer sustain the increasing demand for communication between these cores. In order to overcome the performance gap, network-on-chip is being researched. It is being considered as the most suitable candidate for implementing interconnections in core based System-on-chip (SoC) design. In NoC paradigm cores are connected to each other through a network of routers and they communicate among themselves through packet-switched communication. The protocols used in NoC are generally the simplified versions of general communication protocols used in data networks. This makes it possible to accept mature concepts of communication networks routing algorithms, switching techniques, congestion control etc. in NoC. It allows significant reuse of resources and provides highly scalable and flexible communication infrastructure for SoC design. Cores in NoC operate in Globally Synchronous Locally Synchronous (GALS) mode.

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Faults in NoC can be categorically described as follows: The inherent redundancy of NoCs with multiple alternative routes between packet sources and sinks bears the potential to compensate faults. By the interfaces, transient and permanent faults may occur. Permanent faults are mostly caused by the accelerated aging effects such as electro-migration, instability of technology, etc. In the method of circuit design it is hard to eliminate or avoid faults completely, so the subject of reliability of NoCs must be concerned. The first measure against NoC faults are their detection and diagnosis. Diagnosis results are stored in on-chip structures that represent information of a detailed functional fault model. This information is utilized by new fault-adaptive deflection routing algorithm to avoid defective parts of the switch but still utilize its remaining functionality. Thereby, a more graceful degradation of network operation, even in the presence of huge number of permanent faults, achieved. The fault model allows detailed characterization of faults with respect to its crossbar switching functionality and discriminated transient from permanent faults.

One possibility to make NoC fault-tolerant and reliable is to design a fault-tolerant routing algorithm. A good fault-tolerant routing algorithm not only guarantees performance of the network but also greatly reduces the packet latency under faulty circumstance. Fault–tolerant routing can be classified as stochastic verses deterministic. Stochastic algorithm, e.g. gossip flooding, directed flooding, random-walk etc., soffer fault tolerance through data redundancy by replicating packets and sending them over different routes [1]. The approach of gossip flooding [2] permits a network switch to advance a packet to any of its neighbors with some predetermined probability. Directed flooding [3] refines this principle by preferring hopes that bring the packets closer to its addressed sink. Random walk limits the number of packet copies by allowing replication at the source only. In the remaining network, these copies probabilistically take different routes without further replication. The drawback of this kind of algorithmis when amount of faults in NoC is large; it may lead to huge performance degradation. Fault-tolerant routing avoids bandwidth consuming data redundancy by utilizing the structural redundancy of NoCs.

In this paper, we propose to develop and evaluate efficient distributed deadlock free and fault-tolerant routing for 2-D mesh topology NoC. We do this by first performing the general analysis of NoC fault-tolerant routing. After that, a method would be developed to compute path, source-destination, for general application.

The proposed fault-tolerant routing algorithm outperforms over other algorithms for each type of selected traffic and link load utilization. The proposed algorithm is implemented by doing modification in a network on chip simulator named ‗NIRGAM‘ [4]. Using simulator, performance of different routing algorithms for different traffics are analyzed and compared and dominance of proposed algorithm is laid out.

In this paper we present an efficient routing algorithm to deal with the main issues of fault-tolerance, power efficiency and latency reduction. We discuss the Related Work in Section II, Motivation in section III, Definitions of key terms in section IV and proposed method in Section V. The Proposed algorithm is described in Section VI. In Section VII experimental results are revealed and compared with existing algorithms and finally we conclude the paper in Section VIII.

II. RELATED WORK

To ensure reliability NoC must be fault-tolerant. One way to make NoC fault-tolerant is by making routing algorithm fault-tolerant. A good fault tolerant routing algorithm guarantees the performance of the network; at the same time significantly reduce the packet latency under faulty circumstance. Fault-tolerant routing most generally, can be classified as stochastic verses deterministic.

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If-cube3 [14] fault-tolerant routing algorithm is improved version of fcube3 algorithm to reduce message latency. It shows some improvements to make use of VCs. Logic based distributed routing [16] removes the need of routing tables at every switch for most practical irregular topologies. There are three bits per each output port (two of them are routing bits and one is connectivity bit) implemented with a small logic block which uses two INVERTER gates, four AND gates and an OR gate which helps to take routing decision. Any routing algorithm is applicable to LBDR. Topologies with several disable regions are not suitable for LBDR. LBDR does not work where some pairs of end-nodes cannot communicate through a minimal path in presence of fault in 2-D mesh topology. Extended LBDR [17] is an extension of LBDR algorithm in which extra logic is added for more flexibility to receive maximum number of packets and to reduce the routing restriction. Proposed fault tolerant routing algorithm removes deadlock, reduce the latency and power outperforms than the other mentioned routing algorithms.

III. FAULT TOLERANT ROUTING ALGORITHMS

Key fault-tolerant routing algorithms in network on chip have been described as follows:

A. Probabilistic Flooding

The probabilistic flooding [2, 3] algorithm is a variant on a simple flooding protocol. In this algorithm, every time a message is generated it will be supplied to all of its neighbors with probability p, and will be dropped with probability 1-p. Passing probability p must be carefully chosen to obtain near flooding performance without sending as many redundant copies of the message. Given enough time to every node in the mesh and itshould have received multiple copies of the message, with a high probability.

The failure condition is being most susceptible in this mode during its primary phase of transmission, when only a limited amount of nodes need not pass the message in order for message propagation to halt. It should be validated that message does not die off during this period, and is ensured by an initial flooding phase of two cycles so that all the activated functional nodes within two hopes receive the copies of the original message.

Implementation of hardware design for this algorithm requires a pseudo-random number to determine whether or not to replicate a given message.

B. Directed Flooding

The directed flooding algorithm makes use of NoC‘s highly regular structure to direct a flood towards the destination [2, 3]. Thus reducing the resources being used to send out the packets to the region of the chip where it will not be needed. In this algorithm passing message probability p to each outgoing link is not fixed, but instead varies based on the destination of the packet.

At the algorithm‘s onset packets have high probability of routing towards the destination node, allowing for packets to get in the neighborhood of the destination node.

C. Gossip Flooding

More exactly in gossip flooding [2, 3] the probability of the message being sent out on a given output port is computed as follows: First the manhattan distance Dc between the current node and destination node is computed. This distance is also computed for all nodes adjacent to the current node, giving DN, DS, DW and DE. A multiplicative factor Mx is set to 1 for any direction where Dx is greater than Dc.

For the remaining nodes (where Dx ≤ Dc), the multiplicative factor Mx is equal to the min (Dx, 4). This min function prevents the scenario where distant destination weighs the multiplicative factors heavily, resulting in all packets following similar paths. Using a maximum multiplicative factor of 4 allows the most heavily favored ports to be followed more often and results in lower latencies, while forwarding each packet on less favored ports an appreciable amount of time. Finally each of the multiplicative factors Mx is multiplied by gossip rate, G to find the probability of transmission to that particular link. G is a user defined constant that can be varied to control the level of performance verses fault-tolerance.

This algorithm, like the probabilistic flood, has a statistical chance of not replicating a given message received. Therefore there is an initial two cycle flood to seed the area, resulting in all fractional nodes within two hopes receiving a copy of the message.

D. Redundant Random Walk

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These messages follow a non-deterministic path, where every node that receives one of these messages must forward it to one of its output links. To simplify the creation of these redundant packets, an preliminary flooding stage can be used, just as in the other proposed algorithms. This initial flooding stage allows for a finite number of packets to be generated easily, while limiting the impact of any local faults.

The choice of output link is determined by random probabilities pN, pS,pW, and pE, where the sum of probabilities is 1. Therefore, every incoming message is paired with exactly one outgoing message, as in a standard network. Though normalization is often considered to be large and slow operation, due to the limited number of possible values for the multiplicative factors, a reasonable approximation can be fashioned out of combinational hardware. The values of all probabilities (pN etc.) are computed as follows:

First, the multiplicative factors Mx are computed as in the discussion of directed flooding above. The multiplicative factors are then normalized to create the probabilities pN, pS, pW, and pE. A random number is than generated, choosing one output port of the four to follow. Only one random design unit is required per input port, rather than multiple required for the directed flooding algorithm. This reduction in random decision units helps compensate for the additional logic required for the normalization process.

In general, each message in the network will tend towards the same destination, but will follow slightly different paths to reach it. Thus even if a few links on the way are broken, at least one message will arrive intact.

E. Fault Tolerant XY

Fault tolerant routing algorithm for NoC based on Dynamic XY routing proposed by Yang and Liwei [5]. Algorithm implements detour routing when there are both static and dynamic permanent faults in the network. In addition multi level congestion control mechanism is also used. Constructing 2-dimensinal mesh topology NoCs without using virtual channels becomes attractive approach to building future massive multi-core computer systems because of its large amount of bandwidths, less design complexity, and less consumption of routers. When there is no fault in NoC, FTXY algorithms follows the way of dynamic XY routing algorithm to select a less congested path. Otherwise, it selects the path according to the position of faults and the congestion states of the neighboring routers.

Every output port connected to faulty router or link is marked as unsafe, and the packet can not be sent from the unsafe ports. In order to deal with unexpected dynamic permanent faults in the network, for every packet sent, the sending router waits for an acknowledgment signal from the receiving router before deleting the packet from its input buffer. If it does not receive the signal, the packet is re-sent. When the times of resending are more than predetermined threshold, it is thought that there is fault in this direction; thus the corresponding output port is marked as unsafe and the packet is sent from the other ports.

Considering the severe congestion around faults, congestion control mechanism based on multi-level congestion scheme is design in the algorithm. Every router owns a penalty table, which stores the penalty value for each output port. The corresponding penalty value is generated by its neighboring routers, and it represents the amount of packets in the input buffers of the routers.

The fault-tolerant algorithm can greatly affect the performance of NoC. In the mean time congestion control mechanism makes the load distributed over the entire network. The FTXY routing algorithm gets much less packet latency and lower packet loss rate compared with NF algorithm and DyAD algorithm in the presence of permanent faults.

F. NARCO: Neighbour- aware Turn model based Fault Tolerant routing for NoCs

It is based on low overhead neighbor aware, turn model based fault-tolerant routing scheme for NoCs which combines threshold based replication in network interfaces, a parameterizable region based neighbor awareness in routers, and odd-even and inverted odd-even turn models.

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Fig. 2 Neighborhood awareness in NARCO algorithm

When forwarding packet from a router, the probability of occurrence of fault reduces in neighborhood awareness model. It can be achieved with small buffer in the router for the purpose of keeping the fault status in the router‘s neighborhood beyond its adjacent links.

After the turn restriction checks, it is possible for a packet to have multiple valid directions that it can follow from its current location. To ensure low-energy transfers, directions in minimal paths are always given high priority in our scheme. If however, two valid directions in the minimal paths exist to the destination to the current router, the algorithm gives high priority to the direction that allows for greater path diversity so that the packet can still route around faults downstream. In NARCO, given two minimal paths, to the destination, we prioritize the north and south directions over the east and west directions.

For higher fault rates NORCO configurations have higher energy consumptions than the XY-YX and single virtual channel schemes. Thus it can be seen that the proposed NARCO fault tolerant routing scheme not only provides a much high fault tolerance compared to existing schemes, but also enables a trade-off between reliability and energy consumption that can be turned on a per-application basis by the designer by setting the replication threshold and neighborhood awareness parameters.

G. Definitions

Definition 1 : Consider a directed mesh topology graph G(V,L), where each vertex via V represents an IP core and each directed arc l(vi,vj ) via L represents the communication link from vi to vj.

Definition 2 : Consider the congestion control parameter δ which will measure the congestion in the network and respectively provide the intimation to the router that which routing algorithm (FTXY, XY, OE) would be suitable.

Definition 3 : Consider the fault tolerant parameter γ which will measure the fault in the network and respectively provide the intimation to the router that which routing algorithm (FTXY, XY, OE) would be suitable.

IV. MOTIVATION

To increase the reliability and fault tolerance of the multicore NoC many researchers have used virtual channels and routing tables. Use of routing tables is also not a prominent solution because it reduce the scalability of various measurement parameters such that latency, power, hardware cost etc. We can use turn model based routing algorithms to avoid deadlock and to increase fault tolerance. If fault rate increases in the NoC with more number of prohibited turns then throughput decreases (more number of packets are lost) because packets may not find alternate path to reach to destination. The proposed fault tolerant routing algorithm is inspired to replication of packet on the bases of threshold values of congestion rate and fault rate. This algorithm is to be developed for an efficient fault tolerant routing which combines threshold based replication in network interfaces, congestion control mechanism, uses buffer of faulty nodes and supersedes over OE, XY and Fault-tolerant XY routing algorithms.

V. PROPOSED ROUTER ARCHITECTURE

Virtual channels are implemented by modifying the source code for IP core in SystemC in NIRGAM simulator [4]. The simulator can output performance metrics (latency and throughput) for a given set of choices as has been clear from the architecture.

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Third bit indicates west and forth bit indicates south direction. If the first bit of the faulty buffer is zero at the output side then North Channel is faulty connected to that processing element. And if the first bit of the faulty link buffer is zero at the input side then the flits cannot be received from the north channel of that processing element. Congestion flag buffer indicated in which direction congestion is more. Multi level congestion mechanism is used. If at the output side forth bit of congestion buffer is zero and flit has to traverse through south direction then it will find another possible path to avoid congestion. Mode controller selects virtual channel to be accessed. Routing algorithm decides the next hop.

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Our methodology is based on NARCO. Router architecture should be modified which uses mode controller to dynamically make switching between routing algorithms.

Fig. 3 Proposed Router Architecture

VI. PROPOSED ROUTING ALGORITHM

Neighborhood aware scheme is used same as above. Two virtual channels are used if fault rate and congestion rate increase above its threshold. Fault tolerant parameter is considered to be δ and congestion control parameter is considered to be γ. If γ is threshold value, then fault tolerant XY algorithm is used and if δ is threshold value, NARCO is used. Also it uses buffers of faulty nodes which give efficient buffer utilization.

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If fault rate and congestion rate both are greater than the threshold defined then we used two virtual channels. FTXY algorithm runs through one virtual channel and odd even algorithm run through second virtual channel. FTXY performs better when faults are more. If the fault rate is greater than threshold and congestion is normal then only FTXY runs through single virtual channel. In this case more number of packets is received. If congestion is higher, we used Odd-even algorithm. And if both the parameters are low than we used XY algorithm because XY always performs better in normal condition where there are minimum faults and low congestion rate. Proposed algorithm is shown in Fig.4.

Fig. 4. Proposed Algorithm

Function: Proposed_Algorithm()

Let /*dest_yco is destination Y co-ordinate*/ Let /*dest_xco is destination X co-ordinate*/ Let /*src_yco is source Y co-ordinate*/ Let /*src_xco is source x co-ordinate*/ inputs: Source_node, Destination_node, Congestion_rate, Fault_rate output: Next_node_direction

1: if fault_rate > fault_threshold and congestion_rate congestion_threshold then

2: FTXY(); // send flits through 1st virtual channel 3: Odd_Even(); // send flits through 2nd virtual channel 4: //both algorithms run parallel

5: else if fault_rate > fault_threshold and congestion_rate < congestion_threshold then

6: FTXY();

7: else if fault_rate < fault_threshold and

congestion_rate > congestion_threshold then 8: Odd_Even();

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VII. EXPERIMENTAL RESULTS

In this section evaluate the performance of proposed algorithm based on NARCO algorithm and compare it with existing routing algorithms such as original NARCO, FTXY and Odd-Even. SystemC based NIRGAM simulator is used for simulation. Fault in mesh topology is considered manually by failed links among nodes which are to be merged. Each input channel and each output channel has ten buffers. Size of flit is five bytes and clock frequency is one GHz. Traffic pattern can be varying at each node. Several nodes are using bursty traffic with maximum packet injection rate and interval between successive flits in clock cycle is very low. Several nodes are using constant bit rate traffic with average load on them. Some nodes are hotspot nodes, with very high probability to be a destination. Destination can be random, transpose or butterfly.

Table 1 shows the comparisons of overall average latency among proposed routing algorithm and existing routing algorithms for constant bit ratetraffic in irregular mesh topology and destination consider as transpose. Overall average latency is reduced significantly as compared to NARCO, FTXY and Odd-Even routing algorithm in the case of faulty nodes using mesh topology. Total network power is increased as number of cores increases in irregular mesh but compared to NARCO, FTXY and Odd-Even proposed algorithm reduces total network power drastically. Results in different traffic conditions are as follows:

Case I: Result with Transpose destination Topology: Mesh 9 X 9

Traffic type : Constant Bit rate (Uniform)

Failed Nodes : 1,2, 11, 15, 24, 26, 34, 45,46, 47, 67, 76.

TABLEI

RESULT WITH TRANSPOSE DESTINATION (9X9)

Parameter Proposed NARCO FTXY OE

Overall average latency ( in clock cycles

per flit)

2.74303 2.79036 11.1388 9.50448

Overall average latency ( in clock cycles

per packet)

8.2291 8.37108 33.4761 28.5135

Overall Average latency ( in clock cycles

38.2634 40.5886 135.537 113.615

per flit)

Total flits generated

2826 2673 2127 2163

Total flits received

1302 948 1052 717

Total Network power in watts

0.633713 0.57896 0.4481 0.432756

Case II: Result with Random Destination (9 X 9) Topology: Mesh 9 X 9

Number of buffers per channel: 10 Traffic type: Constant bit rate (Uniform)

Failed Nodes: 1,2, 11, 15, 24, 26, 34, 45, 46, 47, 67, 76 Hotspot nodes: 7, 10, 50, 55

TABLEIII

RESULT WITH RANDOM DESTINATION (9X9)

Parameter Proposed NARCO FTXY OE Overall average

latency ( in clock cycles per flit)

3.08629 2.54819 5.7902 2.89915

Overall average latency ( in clock cycles per packet)

9.25886 7.64456 17.9761 8.69745

Overall Average latency ( in clock cycles per flit)

53.7371 41.3354 77.5762 41.5886

3183 2799 2573 2765

966 474 741 525

0.714579 0.559204 0.573502 0.543811

Case III: Results with butterfly Destination (Mesh 9 X 9) Results with Butterfly destination Mesh 9 X 9

Topology: Mesh 9 X 9 No. of buffers per channel: 3 Traffic Type: Bursty

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TABLEIIIII

RESULT WITH BUTTERFLY DESTINATION (9X9)

Parameter Proposed NARCO FTXY OE

Overall average latency ( in clock cycles per flit)

8.52391 10.6779 9.98567 11.9784

Overall average latency ( in clock cycles per packet)

25.5717 32.0336 29.957 35.9353

Overall Average latency ( in clock cycles per flit)

215.307 300.729 227.084 303.242

2503 2343 2026 1883

1437 1260 1284 975

0.271857 0.257365 0.216661 0.20662

VIII. CONCLUSION

As has been cited from the results, it is evident that the proposed new fault-tolerant algorithm performs better than the NARCO algorithm. Latency is minimized and more number of packets is received. The proposed algorithm works at its best under butterfly and transpose traffic pattern. With dynamic fault tolerance in NoC, it is difficult to find minimal routes that can avoid deadlock and also to minimize power and latency.

The future work targets fault-tolerant routing implementation without using virtual channels.

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