Flash architecture with symmetric error-correcting codes
A Novel Architecture for Matching of Data Encoded with an Error-Correcting-Codes Technique
7
AN EFFICIENT DECODING ARCHITECTURE WITH IMPROVED ERROR CORRECTING TECHNIQUE FOR NAND FLASH MEMORY
7
Error Correcting Codes for Distributed Control
39
Improved Architecture for Tag Matching in Cache Memory Coded with Error Correcting Codes
8
Improved NAND Flash Memories Storage Reliability using Nonlinear Multi Error Correcting Codes
11
Boolean Functions for Cryptography and Error Correcting Codes
186
Efficient decoder design for error correcting codes
151
Improved Architecture for Direct Comparison of Data Encoded With Hard Systematic Error Correcting Codes
6
Architecture with reduced Latency And Complexity For Matching of Data Encoded With Hard Systematic Error- Correcting Codes
8
Low-Complexity Low-Latency Architecture for Identical of Data Encoded With Hard Systematic Error-Correcting Codes
6
Error Correcting Codes and their
11
An introduction to error correcting codes
52
Error-correcting codes and genetics
13
The Development of Error-Correcting Codes
46
Analog Error-Correcting Codes
Error-correcting codes and neural networks
10
On products of linear error correcting codes
149
A Survey of the Theory of Error-Correcting Codes
8
Quantum error-correcting output codes
14
ERROR-CORRECTING CODES AND LATIN SQUARES
8