low-power digital applications
Low Power VLSI Architectures for Digital PID Controller Applications
... novel digital proportional–integral–derivative (PID) controller architecture, based on the adder and multipliers which consumes lower ...control applications requires low power and fast acting ...
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Progress on the Use of Commercial Digital Optical Disc Units for Low-Power Laser Micromachining in Biomedical Applications
... many applications such as microfluidics, biomimetic cell cultures, ...laser power densities, as profilometry showed large protrusions inside the etched ...
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ADIABATIC LOGIC FOR LOW POWER DIGITAL DESIGN
... Adiabatic is a Greek term and it is related with Thermodynamics. In adiabatic system transition occurs without energy (in form of heat) lost or gains from the system. In our design we used adiabatic logic to reduce the ...
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Design of Low Power CMOS Based PTAT/R Circuit for TDC (Temperature-to-Digital Converter) Applications
... a low power CMOS based PTAT/R circuit design for TDC (Temperature-to-Digital Converter) ...in power supply, circuit loading from a device and change in ...for low power ...
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An Ultra Low Power Digital to Analog Converter Optimized for Small Format LCD Applications
... Table of Contents Acknowledgements iii Abstract iv Table of Contents List of Figures List of Tables List of Publications Chapter 1: v vi viii and Patents ix Introduction 1 1.1 Liquid Cry[r] ...
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Low Noise Amplifier Design for Digital Television Applications
... exhibits low dis- tortion in a lead-free miniature surface mount plastic package ...of low noise figure (NF) and high reverse isolation level across a wide bandwidth despite the resis- tive feedback ...
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Low Power Demodulator Design for RFID Applications
... The final block in the demodulator is a comparator, and just as the name says, it compares two input voltages and switches its output to indicate which is larger. Different comparator circuits were tested and simulated ...
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Reconfigurable Adder Architectures for Low Power Applications
... attracted, which helps in achieving the real time signal processing of the multi-media applications [4-7]. Furthermore the research will integrate the programming and reconfigurable computations on the chips. ...
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A Novel Latch design for Low Power Applications
... complex, power consuming and indispensible components among the various building blocks in digital ...total power in the system is dissipated due to clocking network, and the flip-flops ...the ...
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Synthesization of Low Power Digital Signal Processor Architecture
... 2. Entity types are represented, and are named after, the underlying nature of a thing, not the role it plays in a particular context. Entity types are chosen. Thus a result of this principle, any occurrence of an entity ...
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Design of 3t Gain-Cell for Low-Voltage Low-Power Applications
... standard digital CMOS ...is low (data 0). To achieve a reasonable tradeoff between speed, area, power, and reliability, a dynamic sense inverter is used on the readout path (Section ...
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Design of a LNA in the frequency band 1.8–2.2 GHz in 0.13 m CMOS Technology
... and low power con- sumption, the possibility to change the operating frequency of the RF part of the receiver with a minimum amount of component is ...the digital market, and to the consequent cost ...
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Design And Analysis Of Low Power Single Edge Triggered D Flip Flop Based Shift Registers
... Thus low power design is the need of today's integrated ...The low power design is also needed for the applications operated by batteries such as pocket calculators, wrist watches, ...
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RF low power subsampling architecture for wireless communication applications
... highly power-hungry blocks such as LO and RF PLL are still existing in the ...reduce power consumption of the system without using RF/analog blocks, it increases the memory of ADC which cannot be achieved ...
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A Survey of Secure General Self- Organised Tree Based Energy-Balance Routing Protocol for Wireless Sensor Network
... technology, low-power wireless communication[2], [3], [4] and low-power digital electronics; it is now feasible to produce wireless sensor nodes in quantity at low ...many ...
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A Low Power VLSI Design of an All Digital Phase Locked Loop
... All Digital Phase locked loop (ADPLL), as the present applications requires a low cost , low power and high speed Phase locked ...a digital multiplier, simulation results proves ...
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A Review on Design and Analysis of Low Power PLL for Digital Applications
... The authors would like to thank all the researchers who have already contributed in this field of PLL for low power consumption, their work and experiments will be beneficial and also they have provided us ...
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A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS
... Successive approximation register (SAR) analog to digital converters are widely utilized for low speed and low power applications. This paper shows a configuration of a 8 bit SAR ADC ...
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Design & Simulation of Low Power Analog to Digital Converter for Medical Applications
... medical applications. In this work, a design of Analog to Digital converter for pressure sensor application has been ...implement low power, high-resolution A/D converter that can be used for ...
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Design and Analysis of Low Power High Performance 13T SRAM for Ultra Low Power Applications
... causes low leakage current and hence low leakage ...get low leakage power due to low leakage ...the power connection is again established in uncorrupted ...
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