Another method to address signals that emit excessive radiation is clock modulation. Clock modulation, also known as Spread Spectrum, began to appear in computer system designs as early as 1995. Most personal computers designed today use spread spectrum technol- ogy to reduce EMI. Spread spectrum provides a cost effective method to keep EMI low. Clock modulation is a technique whereby an input reference clock at some frequency is modulated so that the frequency of the output clock varies slightly. For example, a 40 MHz reference clock with spread spectrum applied can produce an output swing from 39.60 to 40.40 MHz. This would represent a spread spectrum clock that has a 2% bandwidth centered on the reference frequency of 40 MHz. The purpose of modulating the frequency of a clock is to distribute the energy of a single or narrow band over a much wider band of frequencies. This reduces the amount of peak energy at any one frequency in the spectrum. The amount of EMI reduction is affected by the modulation profile, the percentage of frequency variation (bandwidth), and the modulation rate.
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Termination Resistor Filter Cap
When a modulated clock changes from its minimum frequency to its maximum frequency, the spread spectrum logic applies a specific profile to the envelope that will best reduce EMI. This profile can be seen using several different types of equipment. The most effective piece of equipment to view the profile of a modulated clock is the modulation domain analyzer, which displays frequency over time. As the clock generator is increasing in frequency, the spread spectrum logic will cause the frequency to change only at predeter- mined times in the profile. The waveform of this profile is important in producing the maximum amount of dB reduction. Figure 9.6 illustrates the profile of a spread spectrum clock generator using the Lexmark profile, which is commonly referred to as a Hershey Kiss as it resembles the shape of the chocolate candy. Other profiles, such as a linear ramp are sometimes used to reduce EMI. However, they are found not to be as effective across the frequency spectrum as the Lexmark profile.
Figure 9.6. Lexmark Modulation Profile
In this particular profile example, spread spectrum is applied to a 65 MHz clock. The output frequency is sweeping from a minimum of 63.797 MHz to a maximum of 66.311 MHz. This is known as center spread because the 65 MHz clock is spread equally above and below its frequency. Notice that the rate of change in frequency is faster at the minimum and maximum peak frequencies and changing more slowly at the center of the frequency spectrum due to the profile.
The total amount of spread is called the bandwidth of the clock and is calculated by subtracting the minimum frequency from the maximum frequency:
The amount of spread of a modulated clock is most commonly represented in terms of a percentage of the reference frequency. The bandwidth, in percent, can be calculated by dividing the total spread amount by the reference frequency times 100:
BW% = (BW/FREF) * 100
For the example in Figure 9.6, the BW and BW% are calculated as:
BW = 66.311 MHz – 63.797 MHz = 2.514 MHz BW% = (2.514 MHz/65 MHz) * 100 = 3.87%
This same 65 MHz clock can be observed on a spectrum analyzer for the purposes of determining dB reduction in the EMI of this clock. Figure 9.7 is a spectrum analyzer display of the 65 MHz clock with and without spread spectrum applied. The clock with no spread spectrum has a very narrow frequency range centered on 65 MHz. The energy peak is also higher than the other waveform. The wider scan is the clock with Spread Spectrum active. The center frequency is still 65 MHz as it is using a center spread technique. From this display, the amount of EMI dB reduction can be determined by measuring the difference between the peak energy in each of these clocks. This view shows a dB reduction of 6.48 dB at the fundamental frequency of 65 MHz. The one parameter in a spread spectrum clock that has the largest impact on dB reduction is the bandwidth of the modulated clock. If the bandwidth of this clock were increased, the dB reduction would increase.
Figure 9.7 Spectrum Analysis of 65 MHz
Another key aspect with a modulated clock is the modulation rate. This is the rate at which the modulation profile repeats itself. The modulation rate of the clock in Figure 9.6 is 27.86 kHz. There are several reasons why this low frequency modulation rate is important. If the modulation rate is below 20 kHz, it is possible to generate audible noise in the system. If the modulation rate is to high, in excess of 200 kHz, the effect of modulation might be defeated by the loop bandwidth of the filters used in downstream PLL’s. The Spectrum analyzer scan in Figure 9.7 is of the fundamental frequency of this 65.00 MHz clock. Most high-speed digital designs have problems complying with EMI regulations at harmonic frequencies rather than at the fundamental frequency. Since this 65.00 MHz clock, like most of the high-speed digital clocks, is a 50/50 duty cycle clock, the odd harmonics will contain higher energy levels than the even harmonics. Performing a Fourier transform on the relative energy level of digital clocks with duty cycles from 0 to 50% can prove this fact. Figures 9.8 through 9.11 show this analysis in graph form on the first, second, third and fourth harmonics of a frequency. These graphs plot relative energy against the duty cycle of the clock.
Figure 9.8 1st Harmonic Figure 9.9 2nd Harmonic
Figure 9.10 3rd Harmonic Figure 9.11 4th Harmonic
As can be seen in Figures 9.8 and 9.10, the odd harmonics have maximum energy levels at the 50% duty cycle and diminish as the duty cycle changes. However, as seen in Figures 9.9 and 9.11, the even harmonics have minimum energy levels when the duty cycle is exactly 50%. 0.11 0.105 0.1 0.095 0.09 0.085 0.08 0.075 0.07 0.065 0.06 40 42 44 46 48 50 52 54 56 58 60 Duty Cycle (%)
Magnitude of Fourier Coef
. (lakl) 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.0 40 42 44 46 48 50 52 54 56 58 60 Duty Cycle (%)
Magnitude of Fourier Coef
. (lakl) 0.32 0.318 0.316 0.314 0.312 0.31 0.308 0.306 0.304 0.302 40 42 44 46 48 50 52 54 56 58 60 Duty Cycle (%)
Magnitude of Fourier Coef
. (lakl) 0.1 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 40 42 44 46 48 50 52 54 56 58 60 Duty Cycle (%)
Magnitude of Fourier Coef
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Spread spectrum provides a clear difference in the peak energy of a 65 MHz digital clock at the fundamental frequency. However, the problems faced by many digital systems often occur at the higher harmonic frequencies.