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By far, Source Termination is the most popular form of termination for the typical clock circuit. Source termination, or more commonly known as Series Termination, uses a resistor placed in series with the trace as close to the source as possible. The intent of the resistor is to match the output impedance of the clock driver to the impedance of the trace. This allows the reflected wave to be absorbed when returning.

There are several key advantages to Series Termination. First, it is simple to implement and requires little board area. Second, it does not create a constant DC current flow and therefore doesn’t consume excessive power. And third, it is relatively easy to calculate the necessary resistor values.

However, there are a few drawbacks for Series Termination. Series Termination can only be used if the load devices are at the end of the trace. We will see why when we discuss the wave propagation. The other drawback is that it may be difficult to achieve a perfect termination since we are trying to match the output impedance of a clock driver, and the output driver impedance changes throughout its I-V curve, therefore the impedance value is variable.

Figure 7.5 Series Termination

Since we want to match the impedance of the trace to the impedance of the driver, we add the resistor RSto the trace, as shown in Figure 7.5. We want to set the value such that

the output impedance of the driver (RD) plus the Series resistor (RS) is equal to the trace

impedance (ZO). This can be expressed in the following equation:

RD+ RS= ZO

7 - 5 RD RS

Clock drivers have some amount of impedance, and in general, the lower the output impedance, the faster the signal will transition. To determine RSwe need to know RD. Some

component datasheets will specify the value to be used for RDfor a particular driver. It can

also be derived from the IBIS model of the device. Many IBIS model simulators extract the value for easy access or you can browse the model itself to get the value.

Figure 7.6 Series Terminated Trace

Single Clock Driver (19.8 Output Impedance), 31.9-ohm Series Resistor, 6-inch Long Trace, 51.7 ohm Stripline (Effective), Single Load

When the output buffer drives the clock signal, the wave will propagate along the trace. Since there is an impedance mismatch at the point of RSand ZO, we have both reflected

and accepted properties. Since RS was chosen such that RS plus RD is equal to ZO, the

transmitted voltage will be half that of the output driver—a voltage divider. The half wave will propagate down the trace to the end where it will experience its reflected and accepted functions. The amount that will be accepted and reflected is:

AL= 2 * 1 M/(1 M+ ZO) * 1/2 V = V

RL= (1 M– Zo)/(1 M+ ZO) * 1/2 V = 1/2 V

The input of the load device will have the full voltage V and the 1/

2V is propagated back

to RS.

Notice we have several different impedance changes in our model. There is the output driver impedance, the series resistor, and the trace impedance. Reflections and acceptances will occur at every impedance boundary. It is therefore imperative that RS is sufficiently

close to the output driver or a complex set of reflecting waves will occur. The distance that is tolerable is dependent on the rise time of the signal. The faster the rise time, the closer the resistor needs to be to the source. In order to have the reflections become a non-factor, the trace propagation time between the source and RSshould be one-tenth of the signal

rise time. For example, if we have a clock signal that has a 2 ns rise time, the flight time between the driver and the resistor should be no greater than 200 ps. If the trace characteristics are such that the propagation delay is 175 ps/inch, the maximum distance

Vertical: 1V/div Offset: –2.0V Horizontal: 1 ns/div Delay: 0.00 ns

In a Series Terminated trace, the receiver “sees” driver impedance equal to the trace impedance ZO. Knowing this relationship, we can determine the rise time of the signal at

the receiver based on the RC time constant.

tR= 2.2 ZOCL

where: tr = Rise time of the signal from 10% to 90% ZO= Trace impedance

CL= Load capacitance

This equation gives us the fastest rise time possible at the receiver with a series terminated trace. Further, we can add the rise time of the driver (tD) to provide us with the actual rise

time at the receiver (t):

t = (tD2+ tR2) 1/2

The power dissipated by series termination is small compared to other types of termination. However, it isn’t easily derived. To calculate the power dissipated by RT, our series

termination resistor, we need to determine its voltage drop. The difficulties are due to the fact that the voltage across the resistor is changing based on several factors. The first reason is obvious: VOHand VOLare changing. However, since the series termination resistor acts

as a voltage divider when the signal first propagates down the line, and remains in that condition until the wave returns, we have a dependency on the length of the trace. Once the reflected pulse returns, we no longer have the same voltage drop, hence a changed power dissipation. In conjunction with the length of the trace, clock frequency is also of importance. For every clock cycle, a voltage drop is presented across the resistor. We can then express the power dissipated as:

PT= f * 2T * (VOH– VOL)2/2RT

Where: PT = Power dissipation in the termination resistor f = Clock frequency

T = Trace delay time

RT= Value of the termination resistor